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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-014 / c47465c16119e2a5b826946182947a6a38467cd5
commitc47465c16119e2a5b826946182947a6a38467cd5[log] [tgz]
authorTim Edwards <tim@opencircuitdesign.com>Fri Oct 09 16:30:22 2020 -0400
committerTim Edwards <tim@opencircuitdesign.com>Fri Oct 09 16:30:22 2020 -0400
tree9ba82f469af9e25375db6fe89a204bbe7243b4c5
parentd418fddfe98a4865df5d0730f7c0767db46541a3 [diff]
Corrected the counter/timer and made an enhancement to respond to a
disable/enable sequence as a counter reset.  Generated testbenches
for both counter/timers.
10 files changed
tree: 9ba82f469af9e25375db6fe89a204bbe7243b4c5
  1. doc/
  2. verilog/
  3. README.md
README.md

CIIC Harness (Phase 1)

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware taht can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below

Mega Project Area

This is the user space. It has limitted silicon area (???) as well as a fixed number of I/O pads (???). The repoo contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.