Google Git
Sign in
foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-014 / 16ae3821a8b8481b42830c0ec3183d6d8a64c1c2
commit16ae3821a8b8481b42830c0ec3183d6d8a64c1c2[log] [tgz]
authorTim Edwards <tim@opencircuitdesign.com>Mon Oct 12 17:25:12 2020 -0400
committerTim Edwards <tim@opencircuitdesign.com>Mon Oct 12 17:25:12 2020 -0400
tree20b06e561c8193d70fbd9f7c30156f2402c37ef0
parentc2258f01d7e7d6a781c690d734274bd402a63966 [diff]
Additional corrections to the pads and connections for sky130_fd_io.
3 files changed
tree: 20b06e561c8193d70fbd9f7c30156f2402c37ef0
  1. doc/
  2. verilog/
  3. README.md
README.md

CIIC Harness (Phase 1)

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware taht can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below

Mega Project Area

This is the user space. It has limitted silicon area (???) as well as a fixed number of I/O pads (???). The repoo contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.