Fix another 36->37 typo in mem_tb.v
diff --git a/verilog/dv/caravel/mgmt_soc/mem/mem_tb.v b/verilog/dv/caravel/mgmt_soc/mem/mem_tb.v index f0fbcae..eac5e68 100644 --- a/verilog/dv/caravel/mgmt_soc/mem/mem_tb.v +++ b/verilog/dv/caravel/mgmt_soc/mem/mem_tb.v
@@ -30,7 +30,7 @@ wire gpio; wire [15:0] checkbits; - wire [36:0] mprj_io; + wire [37:0] mprj_io; wire flash_csb; wire flash_clk; wire flash_io0;