| commit | 7a78bd88305f47e3e3f4baad816d3b1f9250a184 | [log] [tgz] |
|---|---|---|
| author | Tim Edwards <tim@opencircuitdesign.com> | Wed Oct 14 16:29:04 2020 -0400 |
| committer | Tim Edwards <tim@opencircuitdesign.com> | Wed Oct 14 16:29:04 2020 -0400 |
| tree | 6a6b37f8cf6051ed21d5a8b9b00a52263fdbabad | |
| parent | 9a630cafc643e3a087adb52a2b5fec6255753a0e [diff] |
Added a placeholder padframe layout, and added an almost-complete first draft of a datasheet for the chip.
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware taht can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:
