| commit | 07a8a0592faa358514b78fe12f3b53785d79826c | [log] [tgz] |
|---|---|---|
| author | Manar <manarabdelatty@aucegypt.edu> | Wed Nov 04 16:22:59 2020 +0200 |
| committer | Manar <manarabdelatty@aucegypt.edu> | Wed Nov 04 16:22:59 2020 +0200 |
| tree | f3d30f6fe89740d77650b25bea54a645f7c471a2 | |
| parent | 2c3075ac28993b568f435e0eeb2c8baa798a6e92 [diff] |
Connected WB MI A port outputs to the wb bus
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: