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foss-eda-tools/third_party/shuttle/sky130/mpw-001/slot-013/c0cd7c226d540e6fc75150ae3236116f12341734^!/./qflow
commit
c0cd7c226d540e6fc75150ae3236116f12341734
[log]
author
Tim Edwards <tim@opencircuitdesign.com>
Tue Nov 24 20:36:36 2020 -0500
committer
Tim Edwards <tim@opencircuitdesign.com>
Tue Nov 24 20:36:36 2020 -0500
tree
f9593aad1d4d1dd91a6552d0168bf9d4738ebb9b
parent
99dbc249f8d9b17242220a367a68379643e3ada7 [diff]
Moved the simple_por ngspice simulations into directory ngspice/simple_por/.
Added new directory ngspice/digital_pll/ containing simulation testbenches for
the digital PLL and trimmable ring oscillator.  Added qflow directories for
both;  this was done only to get a valid xspice file for the controller and
a valid SPICE netlist for the ring oscillator.

diff --git a/qflow/README b/qflow/README
new file mode 100644
index 0000000..f58340e
--- /dev/null
+++ b/qflow/README

@@ -0,0 +1,26 @@
+The qflow directory entries are only used to verify the all-digital frequency
+locked loop circuit by running the verilog modules ring_osc2x13 and
+digital_pll_controller seperately through synthesis.
+
+The ring_osc2x13 module is all gate-level except for a small amount of trivial
+glue logic, so the fact that it is synthesized in qflow instead of openlane
+(with a different setup passed to yosys) does not change the core part of the
+ring oscillator that needs to be simulated.  The synthesis results in a SPICE
+netlist that can be simulated.
+
+For the digital_pll_controller, it is only needed to have a functional xspice
+circuit of the digital part that can be used in the ngspice simulation.
+
+See the caravel/ngspice/digital_pll directory for the ngspice simulations.
+
+None of the files in this tree are used for the actual synthesis, placement,
+and routing.  The source files for qflow are pointers back to the verilog
+module files in caravel/verilog/rtl/ directory.
+
+Qflow was only run through the "synthesis" stage to obtain the necessary
+netlists.  These can be recreated on demand from qflow, so the required
+netlists were copied back to caravel/ngspice/digital_pll and the qflow
+directory cleaned out.
+
+To reproduce the results, it is necessary to have the "tech" directory as a
+symbolic link pointing to the open_pdks installation of sky130A.

diff --git a/qflow/digital_pll_controller/layout/.magicrc b/qflow/digital_pll_controller/layout/.magicrc
new file mode 100644
index 0000000..122229c
--- /dev/null
+++ b/qflow/digital_pll_controller/layout/.magicrc

@@ -0,0 +1,75 @@
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch.  This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+    scalegrid 1 2
+}
+
+# drc off
+drc euclidean on
+
+# Allow override of PDK path from environment variable PDKPATH
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+    set PDKPATH "/home/tim/projects/efabless/tech/SW/sky130A"
+}
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/current/sky130A.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/current/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/current/sky130A-BindKeys
+
+# set units to lambda grid 
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+   set MAGTYPE mag
+}
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc_t18
+} else {
+    addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc_t18/${MAGTYPE}
+}
+
+# add path to GDS cells
+
+# add path to IP from catalog.  This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space.  Defined in the PDK script.
+catch {magic::query_my_projects}

diff --git a/qflow/digital_pll_controller/layout/.magicrc.orig b/qflow/digital_pll_controller/layout/.magicrc.orig
new file mode 100644
index 0000000..122229c
--- /dev/null
+++ b/qflow/digital_pll_controller/layout/.magicrc.orig

@@ -0,0 +1,75 @@
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch.  This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+    scalegrid 1 2
+}
+
+# drc off
+drc euclidean on
+
+# Allow override of PDK path from environment variable PDKPATH
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+    set PDKPATH "/home/tim/projects/efabless/tech/SW/sky130A"
+}
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/current/sky130A.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/current/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/current/sky130A-BindKeys
+
+# set units to lambda grid 
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+   set MAGTYPE mag
+}
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc_t18
+} else {
+    addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc_t18/${MAGTYPE}
+}
+
+# add path to GDS cells
+
+# add path to IP from catalog.  This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space.  Defined in the PDK script.
+catch {magic::query_my_projects}

diff --git a/qflow/digital_pll_controller/layout/digital_pll_controller.par b/qflow/digital_pll_controller/layout/digital_pll_controller.par
new file mode 100644
index 0000000..ce7c105
--- /dev/null
+++ b/qflow/digital_pll_controller/layout/digital_pll_controller.par

@@ -0,0 +1,94 @@
+# sky130A.par --- Parameter file for GrayWolf
+# NOTE:  all distance units are in centimicrons unless otherwise stated
+# WARNING: this is NOT tcl syntax! No Comments on end of actual data line.
+# The vast majority of quantities here are not used (read instead from techLEF, etc.)
+
+RULES
+    # values are resistance in ohms/sq and capacitance in fF/um^2
+    # TODO: properly pick directions
+    layer metal1 0.105 0.0001 horizontal
+    layer metal2 0.105 0.0001 vertical
+    layer metal3 0.105 0.0001 horizontal
+    layer metal4 0.105 0.0001 vertical
+    layer metal5 0.105 0.0001 horizontal
+
+    via via12 metal1 metal2
+    via via23 metal2 metal3
+    via via34 metal3 metal4
+    via via45 metal4 metal5
+
+              # 0.5 um
+    width metal1 50
+    width metal2 60
+              # 0.6 um
+    width metal3 60
+    width metal4 60
+    width metal5 60
+
+    # TODO verify these two numbers
+    width via12 50
+    width via23 50
+    width via34 50
+    width via45 50
+
+    # Set spacing = track pitch - width, so that GrayWolf places pins
+    # on the right pitch.
+    # Pitches are (in um):
+    # metal1 = 200,  metal2 = 160,  metal3 = 200,  metal4 = 320
+## pitch m1: 1.3um  m2: 1.4um  m3: 1.3um
+## width m1: 0.5um  m2: 0.6um  m3: 0.6um
+## space     0.8        0.8        0.7     (pitch calc)
+## fab-space 0.45       0.5        0.6
+
+    spacing metal1 metal1 80
+    spacing metal2 metal2 80
+    spacing metal3 metal3 80
+    spacing metal4 metal4 80
+    spacing metal5 metal5 80
+
+    # (WAS:) Stacked vias allowed
+    # spacing via12 via23 0
+
+    # To disable Stacked?: give non-zero spacing (centimicrons = 10 nanometer = 1/100 of micron)
+    # TODO need real value here:
+    spacing via12 via23 0
+    spacing via23 via34 0
+    spacing via34 via45 0
+
+                       # .2um .15um
+    overhang via12 metal1 20
+    overhang via12 metal2 15
+
+    overhang via23 metal2 20
+    overhang via23 metal3 15
+
+    overhang via34 metal3 14
+    overhang via34 metal4 16
+    overhang via45 metal4 14
+    overhang via45 metal5 16
+ENDRULES
+
+*vertical_wire_weight : 1.0
+*vertical_path_weight : 1.0
+*padspacing           : variable
+*rowSep		      : 0.0   0
+# min pitch of m1,m2,m3 (FIXME):
+*track.pitch	      : 130
+*graphics.wait        : off
+*last_chance.wait     : off
+*random.seed	      : 12345
+# TODO: proper track.pitch number above, plus feedThruWidth below
+
+TWMC*chip.aspect.ratio : 1.0
+
+# FIXME:  Change width to width of minimum fill cell
+TWSC*feedThruWidth    : 280 layer 1
+TWSC*do.global.route  : on
+TWSC*ignore_feeds     : true
+TWSC*call_row_evener  : true
+TWSC*even_rows_maximally : true
+# TWSC*no.graphics    : on
+
+GENR*row_to_tile_spacing: 1
+# GENR*numrows		: 6
+GENR*flip_alternate_rows : 1

diff --git a/qflow/digital_pll_controller/log/qflow.log b/qflow/digital_pll_controller/log/qflow.log
new file mode 100644
index 0000000..377c273
--- /dev/null
+++ b/qflow/digital_pll_controller/log/qflow.log

@@ -0,0 +1 @@
+Starting new log file Tue Nov 24 20:34:58 2020

diff --git a/qflow/digital_pll_controller/project_vars.sh b/qflow/digital_pll_controller/project_vars.sh
new file mode 100644
index 0000000..2fa3d92
--- /dev/null
+++ b/qflow/digital_pll_controller/project_vars.sh

@@ -0,0 +1,66 @@
+#!/bin/tcsh -f
+#------------------------------------------------------------
+# project variables for project ~/gits/caravel/qflow/digital_pll_controller
+#------------------------------------------------------------
+
+# Flow options:
+# -------------------------------------------
+set synthesis_tool = yosys
+set placement_tool = graywolf
+set sta_tool = opensta
+set router_tool = qrouter
+set migrate_tool = magic_db
+set lvs_tool = netgen_lvs
+set drc_tool = magic_drc
+set gds_tool = magic_gds
+set display_tool = magic_view
+
+# Synthesis command options:
+# -------------------------------------------
+# set hard_macros =
+# set yosys_options =
+# set yosys_script =
+# set yosys_debug =
+# set abc_script =
+# set nobuffers =
+# set inbuffers =
+# set postproc_options = "-anchors"
+# set xspice_options = "-io_time=500p -time=50p -idelay=5p -odelay=50p -cload=250f"
+# set fill_ratios = "0,70,10,20"
+# set nofanout =
+# set fanout_options = "-l 200 -c 20"
+# set source_file_list =
+# set is_system_verilog =
+
+# Placement command options:
+# -------------------------------------------
+# set initial_density =
+# set graywolf_options =
+set addspacers_options = "-stripe 2.5 50.0 PG"
+
+# Router command options:
+# -------------------------------------------
+set route_show = 1
+# set route_layers = "5"
+# set via_use =
+# set via_stacks =
+# set qrouter_options =
+# set qrouter_nocleanup =
+
+# STA command options:
+# -------------------------------------------
+
+# Minimum period of the clock use "--period value" (value in ps)
+# set opensta_options =
+set vesta_options = "--long"
+
+# Other options:
+# -------------------------------------------
+# set migrate_options =
+# set lef_options =
+# set drc_gdsview =
+# set drc_options =
+# set gds_options =
+
+#------------------------------------------------------------
+

diff --git a/qflow/digital_pll_controller/qflow_exec.sh b/qflow/digital_pll_controller/qflow_exec.sh
new file mode 100755
index 0000000..3a547d6
--- /dev/null
+++ b/qflow/digital_pll_controller/qflow_exec.sh

@@ -0,0 +1,17 @@
+#!/bin/tcsh -f
+#-------------------------------------------
+# qflow exec script for project ~/gits/caravel/qflow/digital_pll_controller
+#-------------------------------------------
+
+# /usr/local/share/qflow/scripts/yosys.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller ~/gits/caravel/qflow/digital_pll_controller/source/digital_pll_controller.v || exit 1
+# /usr/local/share/qflow/scripts/graywolf.sh -d ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/opensta.sh  ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/qrouter.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/opensta.sh  -d ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/magic_db.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/magic_drc.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/netgen_lvs.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/magic_gds.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/cleanup.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+/usr/local/share/qflow/scripts/cleanup.sh -p ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1
+# /usr/local/share/qflow/scripts/magic_view.sh ~/gits/caravel/qflow/digital_pll_controller digital_pll_controller || exit 1

diff --git a/qflow/digital_pll_controller/qflow_vars.sh b/qflow/digital_pll_controller/qflow_vars.sh
new file mode 100644
index 0000000..1ff7b43
--- /dev/null
+++ b/qflow/digital_pll_controller/qflow_vars.sh

@@ -0,0 +1,17 @@
+#!/bin/tcsh -f
+#-------------------------------------------
+# qflow variables for project ~/gits/caravel/qflow/digital_pll_controller
+#-------------------------------------------
+
+set qflowversion=1.4.80
+set projectpath=~/gits/caravel/qflow/digital_pll_controller
+set techdir=~/gits/caravel/qflow/digital_pll_controller/tech
+set sourcedir=~/gits/caravel/qflow/digital_pll_controller/source
+set synthdir=~/gits/caravel/qflow/digital_pll_controller/synthesis
+set layoutdir=~/gits/caravel/qflow/digital_pll_controller/layout
+set techname=sky130Ahd
+set scriptdir=/usr/local/share/qflow/scripts
+set bindir=/usr/local/share/qflow/bin
+set logdir=~/gits/caravel/qflow/digital_pll_controller/log
+#-------------------------------------------
+

diff --git a/qflow/digital_pll_controller/source/digital_pll_controller.v b/qflow/digital_pll_controller/source/digital_pll_controller.v
new file mode 120000
index 0000000..c9b260b
--- /dev/null
+++ b/qflow/digital_pll_controller/source/digital_pll_controller.v

@@ -0,0 +1 @@
+../../../verilog/rtl/digital_pll_controller.v
\ No newline at end of file

diff --git a/qflow/digital_pll_controller/tech b/qflow/digital_pll_controller/tech
new file mode 120000
index 0000000..b210657
--- /dev/null
+++ b/qflow/digital_pll_controller/tech

@@ -0,0 +1 @@
+/home/tim/projects/efabless/tech/SW/sky130A/libs.tech/qflow
\ No newline at end of file

diff --git a/qflow/ring_osc2x13/layout/.magicrc b/qflow/ring_osc2x13/layout/.magicrc
new file mode 100644
index 0000000..122229c
--- /dev/null
+++ b/qflow/ring_osc2x13/layout/.magicrc

@@ -0,0 +1,75 @@
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch.  This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+    scalegrid 1 2
+}
+
+# drc off
+drc euclidean on
+
+# Allow override of PDK path from environment variable PDKPATH
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+    set PDKPATH "/home/tim/projects/efabless/tech/SW/sky130A"
+}
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/current/sky130A.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/current/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/current/sky130A-BindKeys
+
+# set units to lambda grid 
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+   set MAGTYPE mag
+}
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc_t18
+} else {
+    addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc_t18/${MAGTYPE}
+}
+
+# add path to GDS cells
+
+# add path to IP from catalog.  This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space.  Defined in the PDK script.
+catch {magic::query_my_projects}

diff --git a/qflow/ring_osc2x13/layout/.magicrc.orig b/qflow/ring_osc2x13/layout/.magicrc.orig
new file mode 100644
index 0000000..122229c
--- /dev/null
+++ b/qflow/ring_osc2x13/layout/.magicrc.orig

@@ -0,0 +1,75 @@
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch.  This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+    scalegrid 1 2
+}
+
+# drc off
+drc euclidean on
+
+# Allow override of PDK path from environment variable PDKPATH
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+    set PDKPATH "/home/tim/projects/efabless/tech/SW/sky130A"
+}
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/current/sky130A.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/current/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/current/sky130A-BindKeys
+
+# set units to lambda grid 
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+   set MAGTYPE mag
+}
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc_t18
+} else {
+    addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc_t18/${MAGTYPE}
+}
+
+# add path to GDS cells
+
+# add path to IP from catalog.  This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space.  Defined in the PDK script.
+catch {magic::query_my_projects}

diff --git a/qflow/ring_osc2x13/layout/ring_osc2x13.par b/qflow/ring_osc2x13/layout/ring_osc2x13.par
new file mode 100644
index 0000000..ce7c105
--- /dev/null
+++ b/qflow/ring_osc2x13/layout/ring_osc2x13.par

@@ -0,0 +1,94 @@
+# sky130A.par --- Parameter file for GrayWolf
+# NOTE:  all distance units are in centimicrons unless otherwise stated
+# WARNING: this is NOT tcl syntax! No Comments on end of actual data line.
+# The vast majority of quantities here are not used (read instead from techLEF, etc.)
+
+RULES
+    # values are resistance in ohms/sq and capacitance in fF/um^2
+    # TODO: properly pick directions
+    layer metal1 0.105 0.0001 horizontal
+    layer metal2 0.105 0.0001 vertical
+    layer metal3 0.105 0.0001 horizontal
+    layer metal4 0.105 0.0001 vertical
+    layer metal5 0.105 0.0001 horizontal
+
+    via via12 metal1 metal2
+    via via23 metal2 metal3
+    via via34 metal3 metal4
+    via via45 metal4 metal5
+
+              # 0.5 um
+    width metal1 50
+    width metal2 60
+              # 0.6 um
+    width metal3 60
+    width metal4 60
+    width metal5 60
+
+    # TODO verify these two numbers
+    width via12 50
+    width via23 50
+    width via34 50
+    width via45 50
+
+    # Set spacing = track pitch - width, so that GrayWolf places pins
+    # on the right pitch.
+    # Pitches are (in um):
+    # metal1 = 200,  metal2 = 160,  metal3 = 200,  metal4 = 320
+## pitch m1: 1.3um  m2: 1.4um  m3: 1.3um
+## width m1: 0.5um  m2: 0.6um  m3: 0.6um
+## space     0.8        0.8        0.7     (pitch calc)
+## fab-space 0.45       0.5        0.6
+
+    spacing metal1 metal1 80
+    spacing metal2 metal2 80
+    spacing metal3 metal3 80
+    spacing metal4 metal4 80
+    spacing metal5 metal5 80
+
+    # (WAS:) Stacked vias allowed
+    # spacing via12 via23 0
+
+    # To disable Stacked?: give non-zero spacing (centimicrons = 10 nanometer = 1/100 of micron)
+    # TODO need real value here:
+    spacing via12 via23 0
+    spacing via23 via34 0
+    spacing via34 via45 0
+
+                       # .2um .15um
+    overhang via12 metal1 20
+    overhang via12 metal2 15
+
+    overhang via23 metal2 20
+    overhang via23 metal3 15
+
+    overhang via34 metal3 14
+    overhang via34 metal4 16
+    overhang via45 metal4 14
+    overhang via45 metal5 16
+ENDRULES
+
+*vertical_wire_weight : 1.0
+*vertical_path_weight : 1.0
+*padspacing           : variable
+*rowSep		      : 0.0   0
+# min pitch of m1,m2,m3 (FIXME):
+*track.pitch	      : 130
+*graphics.wait        : off
+*last_chance.wait     : off
+*random.seed	      : 12345
+# TODO: proper track.pitch number above, plus feedThruWidth below
+
+TWMC*chip.aspect.ratio : 1.0
+
+# FIXME:  Change width to width of minimum fill cell
+TWSC*feedThruWidth    : 280 layer 1
+TWSC*do.global.route  : on
+TWSC*ignore_feeds     : true
+TWSC*call_row_evener  : true
+TWSC*even_rows_maximally : true
+# TWSC*no.graphics    : on
+
+GENR*row_to_tile_spacing: 1
+# GENR*numrows		: 6
+GENR*flip_alternate_rows : 1

diff --git a/qflow/ring_osc2x13/log/qflow.log b/qflow/ring_osc2x13/log/qflow.log
new file mode 100644
index 0000000..be8f5fe
--- /dev/null
+++ b/qflow/ring_osc2x13/log/qflow.log

@@ -0,0 +1 @@
+Starting new log file Tue Nov 24 20:36:00 2020

diff --git a/qflow/ring_osc2x13/project_vars.sh b/qflow/ring_osc2x13/project_vars.sh
new file mode 100644
index 0000000..5010715
--- /dev/null
+++ b/qflow/ring_osc2x13/project_vars.sh

@@ -0,0 +1,66 @@
+#!/bin/tcsh -f
+#------------------------------------------------------------
+# project variables for project ~/gits/caravel/qflow/ring_osc2x13
+#------------------------------------------------------------
+
+# Flow options:
+# -------------------------------------------
+# set synthesis_tool = yosys
+# set placement_tool = graywolf
+# set sta_tool = vesta
+# set router_tool = qrouter
+# set migrate_tool = magic_db
+# set lvs_tool = netgen_lvs
+# set drc_tool = magic_drc
+# set gds_tool = magic_gds
+# set display_tool = magic_view
+
+# Synthesis command options:
+# -------------------------------------------
+# set hard_macros =
+# set yosys_options =
+# set yosys_script =
+# set yosys_debug =
+# set abc_script =
+# set nobuffers =
+# set inbuffers =
+# set postproc_options = "-anchors"
+# set xspice_options = "-io_time=500p -time=50p -idelay=5p -odelay=50p -cload=250f"
+# set fill_ratios = "0,70,10,20"
+# set nofanout =
+# set fanout_options = "-l 200 -c 20"
+# set source_file_list =
+# set is_system_verilog =
+
+# Placement command options:
+# -------------------------------------------
+# set initial_density =
+# set graywolf_options =
+# set addspacers_options = "-stripe 2.5 50.0 PG"
+
+# Router command options:
+# -------------------------------------------
+# set route_show =
+# set route_layers = "5"
+# set via_use =
+# set via_stacks =
+# set qrouter_options =
+# set qrouter_nocleanup =
+
+# STA command options:
+# -------------------------------------------
+
+# Minimum period of the clock use "--period value" (value in ps)
+# set opensta_options =
+# set vesta_options =
+
+# Other options:
+# -------------------------------------------
+# set migrate_options =
+# set lef_options =
+# set drc_gdsview =
+# set drc_options =
+# set gds_options =
+
+#------------------------------------------------------------
+

diff --git a/qflow/ring_osc2x13/qflow_exec.sh b/qflow/ring_osc2x13/qflow_exec.sh
new file mode 100755
index 0000000..e45d63b
--- /dev/null
+++ b/qflow/ring_osc2x13/qflow_exec.sh

@@ -0,0 +1,17 @@
+#!/bin/tcsh -f
+#-------------------------------------------
+# qflow exec script for project ~/gits/caravel/qflow/ring_osc2x13
+#-------------------------------------------
+
+# /usr/local/share/qflow/scripts/yosys.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 ~/gits/caravel/qflow/ring_osc2x13/source/ring_osc2x13.v || exit 1
+# /usr/local/share/qflow/scripts/graywolf.sh -d ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/vesta.sh  ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/qrouter.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/vesta.sh  -d ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/magic_db.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/magic_drc.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/netgen_lvs.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/magic_gds.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/cleanup.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+/usr/local/share/qflow/scripts/cleanup.sh -p ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1
+# /usr/local/share/qflow/scripts/magic_view.sh ~/gits/caravel/qflow/ring_osc2x13 ring_osc2x13 || exit 1

diff --git a/qflow/ring_osc2x13/qflow_vars.sh b/qflow/ring_osc2x13/qflow_vars.sh
new file mode 100644
index 0000000..cb887d8
--- /dev/null
+++ b/qflow/ring_osc2x13/qflow_vars.sh

@@ -0,0 +1,17 @@
+#!/bin/tcsh -f
+#-------------------------------------------
+# qflow variables for project ~/gits/caravel/qflow/ring_osc2x13
+#-------------------------------------------
+
+set qflowversion=1.4.80
+set projectpath=~/gits/caravel/qflow/ring_osc2x13
+set techdir=~/gits/caravel/qflow/ring_osc2x13/tech
+set sourcedir=~/gits/caravel/qflow/ring_osc2x13/source
+set synthdir=~/gits/caravel/qflow/ring_osc2x13/synthesis
+set layoutdir=~/gits/caravel/qflow/ring_osc2x13/layout
+set techname=sky130Ahd
+set scriptdir=/usr/local/share/qflow/scripts
+set bindir=/usr/local/share/qflow/bin
+set logdir=~/gits/caravel/qflow/ring_osc2x13/log
+#-------------------------------------------
+

diff --git a/qflow/ring_osc2x13/source/ring_osc2x13.v b/qflow/ring_osc2x13/source/ring_osc2x13.v
new file mode 120000
index 0000000..c8a27c4
--- /dev/null
+++ b/qflow/ring_osc2x13/source/ring_osc2x13.v

@@ -0,0 +1 @@
+../../../verilog/rtl/ring_osc2x13.v
\ No newline at end of file

diff --git a/qflow/ring_osc2x13/tech b/qflow/ring_osc2x13/tech
new file mode 120000
index 0000000..b210657
--- /dev/null
+++ b/qflow/ring_osc2x13/tech

@@ -0,0 +1 @@
+/home/tim/projects/efabless/tech/SW/sky130A/libs.tech/qflow
\ No newline at end of file