| commit | 887ec0b711bef953809a2a3f24c800c532512f8c | [log] [tgz] |
|---|---|---|
| author | Steve Kelly <kd2cca@gmail.com> | Thu Dec 17 21:31:53 2020 -0500 |
| committer | Steve Kelly <kd2cca@gmail.com> | Thu Dec 17 21:31:53 2020 -0500 |
| tree | 1cbae3b49f384fc96bdc94ef5cf1ef2bf96d5e3a | |
| parent | 0e2a7a3691b8df065370694fc93282ebd0c06040 [diff] [blame] |
naming fixes
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v index 9de1bc4..6e33af2 100644 --- a/verilog/rtl/user_project_wrapper.v +++ b/verilog/rtl/user_project_wrapper.v
@@ -79,7 +79,7 @@ /* User project is instantiated here */ /*--------------------------------------*/ - rapcore_caravel rapcore_caravel0 ( + rapcores rapcores0 ( `ifndef SIM `ifdef USE_POWER_PINS