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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-009 / bd9efb01ab71e95a59b83b32b8589b5bc1233162
commitbd9efb01ab71e95a59b83b32b8589b5bc1233162[log] [tgz]
authorAhmed Ghazy <ax3ghazy@aucegypt.edu>Wed Nov 25 18:13:50 2020 +0200
committerAhmed Ghazy <ax3ghazy@aucegypt.edu>Wed Nov 25 18:13:50 2020 +0200
tree3e7a82fb6efdb783b1163ec2eb851d34a90ae690
parentc0cd7c226d540e6fc75150ae3236116f12341734 [diff]
parent5b3db632b18eac04c2cb13603d87ce4e6afced0c [diff]
Merge branch 'master' into develop
tree: 3e7a82fb6efdb783b1163ec2eb851d34a90ae690
  1. .travisCI/
  2. def/
  3. doc/
  4. gds/
  5. lef/
  6. macros/
  7. mag/
  8. ngspice/
  9. openlane/
  10. qflow/
  11. scripts/
  12. spi/
  13. verilog/
  14. .travis.yml
  15. info.yaml
  16. LICENSE
  17. Makefile
  18. README.md
README.md

CIIC Harness

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware that can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC can be found here

Mega Project Area

This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.