commit | 5586f1b9df4945ebe0f524f3499d7a2866b23284 | [log] [tgz] |
---|---|---|
author | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Fri Nov 06 21:34:43 2020 +0200 |
committer | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Fri Nov 06 21:35:49 2020 +0200 |
tree | 6163b9816225733280e02235e2eb6d0921e76d0b | |
parent | 58cca1b80d522844a80e1265717cac6546f864c0 [diff] |
Add the custom DFF RAM
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: