| *SPEF "IEEE 1481-1998" |
| *DESIGN "mgmt_protect_hv" |
| *DATE "Sat Nov 28 00:33:31 2020" |
| *VENDOR "AUC CSCE Department" |
| *PROGRAM "SPEF Extractor" |
| *VERSION "1.0" |
| *DESIGN_FLOW "PIN_CAP NONE" |
| *DIVIDER / |
| *DELIMITER : |
| *BUS_DELIMITER [] |
| *T_UNIT 1.00000 NS |
| *C_UNIT 1.00000 PF |
| *R_UNIT 1.00000 OHM |
| *L_UNIT 1.00000 HENRY |
| |
| |
| *NAME_MAP |
| *0 mprj2_vdd_logic1 |
| *1 mprj_vdd_logic1 |
| *2 mprj2_vdd_logic1_h |
| *3 mprj_vdd_logic1_h |
| |
| *D_NET *0 0.00196348075645 |
| *CONN |
| *P mprj2_vdd_logic1 O |
| *I mprj2_logic_high_lv:X O |
| *CAP |
| 0 mprj2_logic_high_lv:X 6.669432272000001e-05 |
| 1 *0:1 6.669432272000001e-05 |
| 2 *0:2 0.00040875605596000006 |
| 3 *0:3 0.00040875605596000006 |
| 4 *0:4 0.00049379892176 |
| 5 *0:5 0.00049379892176 |
| 6 *0:6 1.2491077785000002e-05 |
| 7 *0:7 1.2491077785000002e-05 |
| *RES |
| 0 mprj2_logic_high_lv:X *0:1 1.2857142857142856 |
| 1 *0:2 *0:3 9.249999999999998 |
| 2 *0:4 *0:5 10.285714285714285 |
| 3 *0:6 *0:7 0.16517857142857142 |
| 4 mprj2_logic_high_lv:X mprj2_logic_high_lv:X 0 |
| 5 *0:1 *0:2 0 |
| 6 *0:4 *0:3 0 |
| 7 *0:5 *0:6 0 |
| *END |
| |
| *D_NET *1 0.00163639485125 |
| *CONN |
| *P mprj_vdd_logic1 O |
| *I mprj_logic_high_lv:X O |
| *CAP |
| 8 *1:1 0.00024304524690500003 |
| 9 *1:2 0.00024304524690500003 |
| 10 *1:3 0.0005751521787200001 |
| 11 mprj_logic_high_lv:X 0.0005751521787200001 |
| *RES |
| 8 *1:1 *1:2 5.450892857142857 |
| 9 *1:3 mprj_logic_high_lv:X 11.999999999999998 |
| 10 *1:3 *1:2 0 |
| 11 mprj_logic_high_lv:X mprj_logic_high_lv:X 0 |
| *END |
| |
| *D_NET *2 0.00049144066354 |
| *CONN |
| *I mprj2_logic_high_lv:A I |
| *I mprj2_logic_high_hvl:HI O |
| *CAP |
| 12 *2:1 7.733443785000002e-05 |
| 13 *2:2 7.733443785000002e-05 |
| 14 *2:3 0.00016838589392 |
| 15 mprj2_logic_high_lv:A 0.00016838589392 |
| 16 mprj2_logic_high_hvl:HI 0.0 |
| *RES |
| 12 *2:1 *2:2 1.6517857142857142 |
| 13 *2:3 mprj2_logic_high_lv:A 3.428571428571428 |
| 14 mprj2_logic_high_hvl:HI mprj2_logic_high_hvl:HI 0 |
| 15 mprj2_logic_high_hvl:HI *2:1 0 |
| 16 *2:3 *2:2 0 |
| 17 mprj2_logic_high_lv:A mprj2_logic_high_lv:A 0 |
| *END |
| |
| *D_NET *3 0.0009469184527999999 |
| *CONN |
| *I mprj_logic_high_lv:A I |
| *I mprj_logic_high_hvl:HI O |
| *CAP |
| 17 *3:1 0.00022372007551999998 |
| 18 mprj_logic_high_hvl:HI 8.703263695999999e-05 |
| 19 *3:2 0.00038642658944 |
| 20 mprj_logic_high_lv:A 0.00024973915087999997 |
| *RES |
| 18 *3:1 mprj_logic_high_hvl:HI 1.714285714285714 |
| 19 *3:1 *3:2 212.42352941176466 |
| 20 mprj_logic_high_lv:A *3:2 5.142857142857142 |
| 21 mprj_logic_high_hvl:HI mprj_logic_high_hvl:HI 0 |
| 22 *3:1 *3:1 0 |
| 23 *3:2 *3:2 0 |
| 24 mprj_logic_high_lv:A mprj_logic_high_lv:A 0 |
| *END |
| |
