openlane/gpio_control_block/runs/gpio_control_block/results/synthesis/gpio_control_block.synthesis.v

/* Generated by Yosys 0.9+3621 (git sha1 84e9fa7, gcc 8.3.1 -fPIC -Os) */

module gpio_control_block(resetn, serial_clock, mgmt_gpio_in, mgmt_gpio_out, mgmt_gpio_oeb, serial_data_in, serial_data_out, user_gpio_out, user_gpio_oeb, user_gpio_in, pad_gpio_holdover, pad_gpio_slow_sel, pad_gpio_vtrip_sel, pad_gpio_inenb, pad_gpio_ib_mode_sel, pad_gpio_ana_en, pad_gpio_ana_sel, pad_gpio_ana_pol, pad_gpio_dm, pad_gpio_outenb, pad_gpio_out, pad_gpio_in);
  wire _000_;
  wire _001_;
  wire _002_;
  wire _003_;
  wire _004_;
  wire _005_;
  wire _006_;
  wire _007_;
  wire _008_;
  wire _009_;
  wire _010_;
  wire _011_;
  wire _012_;
  wire _013_;
  wire _014_;
  wire _015_;
  wire _016_;
  wire _017_;
  wire _018_;
  wire _019_;
  wire _020_;
  wire _021_;
  wire _022_;
  wire _023_;
  wire _024_;
  wire _025_;
  wire _026_;
  wire _027_;
  wire _028_;
  wire _029_;
  wire _030_;
  wire _031_;
  wire _032_;
  wire _033_;
  wire _034_;
  wire _035_;
  wire _036_;
  wire _037_;
  wire _038_;
  wire gpio_logic1;
  wire gpio_outenb;
  wire load_data;
  wire mgmt_ena;
  output mgmt_gpio_in;
  input mgmt_gpio_oeb;
  input mgmt_gpio_out;
  output pad_gpio_ana_en;
  output pad_gpio_ana_pol;
  output pad_gpio_ana_sel;
  output [2:0] pad_gpio_dm;
  output pad_gpio_holdover;
  output pad_gpio_ib_mode_sel;
  input pad_gpio_in;
  output pad_gpio_inenb;
  output pad_gpio_out;
  output pad_gpio_outenb;
  output pad_gpio_slow_sel;
  output pad_gpio_vtrip_sel;
  input resetn;
  input serial_clock;
  input serial_data_in;
  output serial_data_out;
  wire \shift_register[0] ;
  wire \shift_register[10] ;
  wire \shift_register[11] ;
  wire \shift_register[1] ;
  wire \shift_register[2] ;
  wire \shift_register[3] ;
  wire \shift_register[4] ;
  wire \shift_register[5] ;
  wire \shift_register[6] ;
  wire \shift_register[7] ;
  wire \shift_register[8] ;
  wire \shift_register[9] ;
  output user_gpio_in;
  input user_gpio_oeb;
  input user_gpio_out;
  sky130_fd_sc_hd__or2_4 _039_ (
    .A(serial_clock),
    .B(resetn),
    .X(_027_)
  );
  sky130_fd_sc_hd__buf_2 _040_ (
    .A(_027_),
    .X(_028_)
  );
  sky130_fd_sc_hd__buf_2 _041_ (
    .A(_028_),
    .X(_025_)
  );
  sky130_fd_sc_hd__buf_2 _042_ (
    .A(_025_),
    .X(_024_)
  );
  sky130_fd_sc_hd__buf_2 _043_ (
    .A(_025_),
    .X(_023_)
  );
  sky130_fd_sc_hd__buf_2 _044_ (
    .A(_025_),
    .X(_022_)
  );
  sky130_fd_sc_hd__buf_2 _045_ (
    .A(_025_),
    .X(_021_)
  );
  sky130_fd_sc_hd__buf_2 _046_ (
    .A(_028_),
    .X(_029_)
  );
  sky130_fd_sc_hd__buf_2 _047_ (
    .A(_029_),
    .X(_020_)
  );
  sky130_fd_sc_hd__buf_2 _048_ (
    .A(_029_),
    .X(_019_)
  );
  sky130_fd_sc_hd__buf_2 _049_ (
    .A(_029_),
    .X(_018_)
  );
  sky130_fd_sc_hd__buf_2 _050_ (
    .A(_029_),
    .X(_017_)
  );
  sky130_fd_sc_hd__buf_2 _051_ (
    .A(_029_),
    .X(_016_)
  );
  sky130_fd_sc_hd__buf_2 _052_ (
    .A(_028_),
    .X(_030_)
  );
  sky130_fd_sc_hd__buf_2 _053_ (
    .A(_030_),
    .X(_015_)
  );
  sky130_fd_sc_hd__buf_2 _054_ (
    .A(_030_),
    .X(_014_)
  );
  sky130_fd_sc_hd__buf_2 _055_ (
    .A(_030_),
    .X(_013_)
  );
  sky130_fd_sc_hd__buf_2 _056_ (
    .A(_030_),
    .X(_012_)
  );
  sky130_fd_sc_hd__buf_2 _057_ (
    .A(_030_),
    .X(_011_)
  );
  sky130_fd_sc_hd__buf_2 _058_ (
    .A(_028_),
    .X(_031_)
  );
  sky130_fd_sc_hd__buf_2 _059_ (
    .A(_031_),
    .X(_010_)
  );
  sky130_fd_sc_hd__buf_2 _060_ (
    .A(_031_),
    .X(_009_)
  );
  sky130_fd_sc_hd__buf_2 _061_ (
    .A(_031_),
    .X(_008_)
  );
  sky130_fd_sc_hd__buf_2 _062_ (
    .A(_031_),
    .X(_007_)
  );
  sky130_fd_sc_hd__buf_2 _063_ (
    .A(_031_),
    .X(_006_)
  );
  sky130_fd_sc_hd__buf_2 _064_ (
    .A(_027_),
    .X(_032_)
  );
  sky130_fd_sc_hd__buf_2 _065_ (
    .A(_032_),
    .X(_005_)
  );
  sky130_fd_sc_hd__buf_2 _066_ (
    .A(_032_),
    .X(_004_)
  );
  sky130_fd_sc_hd__buf_2 _067_ (
    .A(_032_),
    .X(_003_)
  );
  sky130_fd_sc_hd__buf_2 _068_ (
    .A(_032_),
    .X(_002_)
  );
  sky130_fd_sc_hd__buf_2 _069_ (
    .A(_032_),
    .X(_001_)
  );
  sky130_fd_sc_hd__inv_2 _070_ (
    .A(mgmt_ena),
    .Y(_033_)
  );
  sky130_fd_sc_hd__a32o_4 _071_ (
    .A1(gpio_outenb),
    .A2(mgmt_gpio_oeb),
    .A3(mgmt_ena),
    .B1(user_gpio_oeb),
    .B2(_033_),
    .X(pad_gpio_outenb)
  );
  sky130_fd_sc_hd__inv_2 _072_ (
    .A(pad_gpio_dm[2]),
    .Y(_034_)
  );
  sky130_fd_sc_hd__and3_4 _073_ (
    .A(mgmt_gpio_oeb),
    .B(_034_),
    .C(pad_gpio_dm[1]),
    .X(_035_)
  );
  sky130_fd_sc_hd__or2_4 _074_ (
    .A(mgmt_gpio_out),
    .B(_035_),
    .X(_036_)
  );
  sky130_fd_sc_hd__nand2_4 _075_ (
    .A(pad_gpio_dm[0]),
    .B(_035_),
    .Y(_037_)
  );
  sky130_fd_sc_hd__a32o_4 _076_ (
    .A1(mgmt_ena),
    .A2(_036_),
    .A3(_037_),
    .B1(_033_),
    .B2(user_gpio_out),
    .X(pad_gpio_out)
  );
  sky130_fd_sc_hd__nand2_4 _077_ (
    .A(_033_),
    .B(pad_gpio_in),
    .Y(_000_)
  );
  sky130_fd_sc_hd__inv_2 _078_ (
    .A(resetn),
    .Y(_038_)
  );
  sky130_fd_sc_hd__and2_4 _079_ (
    .A(serial_clock),
    .B(_038_),
    .X(load_data)
  );
  sky130_fd_sc_hd__and2_4 _080_ (
    .A(mgmt_ena),
    .B(pad_gpio_in),
    .X(mgmt_gpio_in)
  );
  sky130_fd_sc_hd__buf_2 _081_ (
    .A(_028_),
    .X(_026_)
  );
  sky130_fd_sc_hd__dfstp_4 _082_ (
    .CLK(load_data),
    .D(\shift_register[0] ),
    .Q(mgmt_ena),
    .SET_B(_001_)
  );
  sky130_fd_sc_hd__dfrtp_4 _083_ (
    .CLK(load_data),
    .D(\shift_register[2] ),
    .Q(pad_gpio_holdover),
    .RESET_B(_002_)
  );
  sky130_fd_sc_hd__dfrtp_4 _084_ (
    .CLK(load_data),
    .D(\shift_register[8] ),
    .Q(pad_gpio_slow_sel),
    .RESET_B(_003_)
  );
  sky130_fd_sc_hd__dfrtp_4 _085_ (
    .CLK(load_data),
    .D(\shift_register[9] ),
    .Q(pad_gpio_vtrip_sel),
    .RESET_B(_004_)
  );
  sky130_fd_sc_hd__dfrtp_4 _086_ (
    .CLK(load_data),
    .D(\shift_register[3] ),
    .Q(pad_gpio_inenb),
    .RESET_B(_005_)
  );
  sky130_fd_sc_hd__dfrtp_4 _087_ (
    .CLK(load_data),
    .D(\shift_register[4] ),
    .Q(pad_gpio_ib_mode_sel),
    .RESET_B(_006_)
  );
  sky130_fd_sc_hd__dfstp_4 _088_ (
    .CLK(load_data),
    .D(\shift_register[1] ),
    .Q(gpio_outenb),
    .SET_B(_007_)
  );
  sky130_fd_sc_hd__dfstp_4 _089_ (
    .CLK(load_data),
    .D(\shift_register[10] ),
    .Q(pad_gpio_dm[0]),
    .SET_B(_008_)
  );
  sky130_fd_sc_hd__dfrtp_4 _090_ (
    .CLK(load_data),
    .D(\shift_register[11] ),
    .Q(pad_gpio_dm[1]),
    .RESET_B(_009_)
  );
  sky130_fd_sc_hd__dfrtp_4 _091_ (
    .CLK(load_data),
    .D(serial_data_out),
    .Q(pad_gpio_dm[2]),
    .RESET_B(_010_)
  );
  sky130_fd_sc_hd__dfrtp_4 _092_ (
    .CLK(load_data),
    .D(\shift_register[5] ),
    .Q(pad_gpio_ana_en),
    .RESET_B(_011_)
  );
  sky130_fd_sc_hd__dfrtp_4 _093_ (
    .CLK(load_data),
    .D(\shift_register[6] ),
    .Q(pad_gpio_ana_sel),
    .RESET_B(_012_)
  );
  sky130_fd_sc_hd__dfrtp_4 _094_ (
    .CLK(load_data),
    .D(\shift_register[7] ),
    .Q(pad_gpio_ana_pol),
    .RESET_B(_013_)
  );
  sky130_fd_sc_hd__dfrtp_4 _095_ (
    .CLK(serial_clock),
    .D(serial_data_in),
    .Q(\shift_register[0] ),
    .RESET_B(_014_)
  );
  sky130_fd_sc_hd__dfrtp_4 _096_ (
    .CLK(serial_clock),
    .D(\shift_register[0] ),
    .Q(\shift_register[1] ),
    .RESET_B(_015_)
  );
  sky130_fd_sc_hd__dfrtp_4 _097_ (
    .CLK(serial_clock),
    .D(\shift_register[1] ),
    .Q(\shift_register[2] ),
    .RESET_B(_016_)
  );
  sky130_fd_sc_hd__dfrtp_4 _098_ (
    .CLK(serial_clock),
    .D(\shift_register[2] ),
    .Q(\shift_register[3] ),
    .RESET_B(_017_)
  );
  sky130_fd_sc_hd__dfrtp_4 _099_ (
    .CLK(serial_clock),
    .D(\shift_register[3] ),
    .Q(\shift_register[4] ),
    .RESET_B(_018_)
  );
  sky130_fd_sc_hd__dfrtp_4 _100_ (
    .CLK(serial_clock),
    .D(\shift_register[4] ),
    .Q(\shift_register[5] ),
    .RESET_B(_019_)
  );
  sky130_fd_sc_hd__dfrtp_4 _101_ (
    .CLK(serial_clock),
    .D(\shift_register[5] ),
    .Q(\shift_register[6] ),
    .RESET_B(_020_)
  );
  sky130_fd_sc_hd__dfrtp_4 _102_ (
    .CLK(serial_clock),
    .D(\shift_register[6] ),
    .Q(\shift_register[7] ),
    .RESET_B(_021_)
  );
  sky130_fd_sc_hd__dfrtp_4 _103_ (
    .CLK(serial_clock),
    .D(\shift_register[7] ),
    .Q(\shift_register[8] ),
    .RESET_B(_022_)
  );
  sky130_fd_sc_hd__dfrtp_4 _104_ (
    .CLK(serial_clock),
    .D(\shift_register[8] ),
    .Q(\shift_register[9] ),
    .RESET_B(_023_)
  );
  sky130_fd_sc_hd__dfrtp_4 _105_ (
    .CLK(serial_clock),
    .D(\shift_register[9] ),
    .Q(\shift_register[10] ),
    .RESET_B(_024_)
  );
  sky130_fd_sc_hd__dfrtp_4 _106_ (
    .CLK(serial_clock),
    .D(\shift_register[10] ),
    .Q(\shift_register[11] ),
    .RESET_B(_025_)
  );
  sky130_fd_sc_hd__dfrtp_4 _107_ (
    .CLK(serial_clock),
    .D(\shift_register[11] ),
    .Q(serial_data_out),
    .RESET_B(_026_)
  );
  sky130_fd_sc_hd__einvp_8 gpio_in_buf (
    .A(_000_),
    .TE(gpio_logic1),
    .Z(user_gpio_in)
  );
  sky130_fd_sc_hd__conb_1 gpio_logic_high (
    .HI(gpio_logic1),
    .LO()
  );
endmodule