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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-009 / d4a2d6fbeb47e7956684a158adf406a173ef03e1 / . / openlane / digital_pll / runs / digital_pll / logs / routing / tritonRoute.log
blob: b3d8d6ca9a27c6ac542b457afa94921297193d9f [file] [log] [blame]
reading lef ...
units: 1000
#layers: 13
#macros: 438
#vias: 25
#viarulegen: 25
reading def ...
design: digital_pll
die area: ( 0 0 ) ( 107040 117760 )
trackPts: 12
defvias: 5
#components: 1297
#terminals: 39
#snets: 2
#nets: 415
reading guide ...
#guides: 2863
Warning: met2 does not have viaDef align with layer direction, generating new viaDef via2_FR...
Warning: met4 does not have viaDef align with layer direction, generating new viaDef via4_FR...
done initConstraintLayerIdx
List of default vias:
Layer mcon
default via: L1M1_PR_MR
Layer via
default via: M1M2_PR
Layer via2
default via: via2_FR
Layer via3
default via: M3M4_PR_M
Layer via4
default via: via4_FR
Writing reference output def...
libcell analysis ...
instance analysis ...
#unique instances = 75
init region query ...
complete FR_MASTERSLICE
complete FR_VIA
complete li1
complete mcon
complete met1
complete via
complete met2
complete via2
complete met3
complete via3
complete met4
complete via4
complete met5
FR_MASTERSLICE shape region query size = 0
FR_VIA shape region query size = 0
li1 shape region query size = 17110
mcon shape region query size = 14795
met1 shape region query size = 3232
via shape region query size = 288
met2 shape region query size = 166
via2 shape region query size = 288
met3 shape region query size = 179
via3 shape region query size = 21888
met4 shape region query size = 98
via4 shape region query size = 0
met5 shape region query size = 0
start pin access
complete 100 pins
complete 200 pins
complete 205 pins
complete 69 unique inst patterns
complete 407 groups
Expt1 runtime (pin-level access point gen): 0.52977
Expt2 runtime (design-level access pattern gen): 0.0820308
#scanned instances = 1297
#unique instances = 75
#stdCellGenAp = 1377
#stdCellValidPlanarAp = 20
#stdCellValidViaAp = 900
#stdCellPinNoAp = 0
#stdCellPinCnt = 1360
#instTermValidViaApCnt = 0
#macroGenAp = 0
#macroValidPlanarAp = 0
#macroValidViaAp = 0
#macroNoAp = 0
complete pin access
cpu time = 00:00:02, elapsed time = 00:00:00, memory = 16.42 (MB), peak = 16.76 (MB)
post process guides ...
GCELLGRID X -1 DO 17 STEP 6900 ;
GCELLGRID Y -1 DO 15 STEP 6900 ;
complete FR_MASTERSLICE
complete FR_VIA
complete li1
complete mcon
complete met1
complete via
complete met2
complete via2
complete met3
complete via3
complete met4
complete via4
complete met5
building cmap ...
init guide query ...
complete FR_MASTERSLICE (guide)
complete FR_VIA (guide)
complete li1 (guide)
complete mcon (guide)
complete met1 (guide)
complete via (guide)
complete met2 (guide)
complete via2 (guide)
complete met3 (guide)
complete via3 (guide)
complete met4 (guide)
complete via4 (guide)
complete met5 (guide)
FR_MASTERSLICE guide region query size = 0
FR_VIA guide region query size = 0
li1 guide region query size = 1104
mcon guide region query size = 0
met1 guide region query size = 899
via guide region query size = 0
met2 guide region query size = 468
via2 guide region query size = 0
met3 guide region query size = 15
via3 guide region query size = 0
met4 guide region query size = 0
via4 guide region query size = 0
met5 guide region query size = 0
init gr pin query ...
start track assignment
Done with 1572 vertical wires in 1 frboxes and 914 horizontal wires in 1 frboxes.
Done with 188 vertical wires in 1 frboxes and 259 horizontal wires in 1 frboxes.
complete track assignment
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 22.07 (MB), peak = 26.61 (MB)
post processing ...
start routing data preparation
initVia2ViaMinLen_minSpc li1 (d2d, d2u, u2d, u2u) = (0, 0, 0, 370)
initVia2ViaMinLen_minSpc met1 (d2d, d2u, u2d, u2u) = (430, 445, 445, 460)
initVia2ViaMinLen_minSpc met2 (d2d, d2u, u2d, u2u) = (460, 485, 485, 630)
initVia2ViaMinLen_minSpc met3 (d2d, d2u, u2d, u2u) = (630, 655, 655, 680)
initVia2ViaMinLen_minSpc met4 (d2d, d2u, u2d, u2u) = (630, 1055, 1055, 3020)
initVia2ViaMinLen_minSpc met5 (d2d, d2u, u2d, u2u) = (1480, 0, 0, 0)
initVia2ViaMinLen_minimumcut li1 (d2d, d2u, u2d, u2u) = (0, 0, 0, 370)
initVia2ViaMinLen_minimumcut li1 zerolen (b, b, b, b) = (1, 1, 1, 1)
initVia2ViaMinLen_minimumcut met1 (d2d, d2u, u2d, u2u) = (430, 445, 445, 460)
initVia2ViaMinLen_minimumcut met1 zerolen (b, b, b, b) = (1, 1, 1, 1)
initVia2ViaMinLen_minimumcut met2 (d2d, d2u, u2d, u2u) = (460, 485, 485, 630)
initVia2ViaMinLen_minimumcut met2 zerolen (b, b, b, b) = (1, 1, 1, 1)
initVia2ViaMinLen_minimumcut met3 (d2d, d2u, u2d, u2u) = (630, 655, 655, 680)
initVia2ViaMinLen_minimumcut met3 zerolen (b, b, b, b) = (1, 1, 1, 1)
initVia2ViaMinLen_minimumcut met4 (d2d, d2u, u2d, u2u) = (630, 1055, 1055, 3020)
initVia2ViaMinLen_minimumcut met4 zerolen (b, b, b, b) = (1, 1, 1, 1)
initVia2ViaMinLen_minimumcut met5 (d2d, d2u, u2d, u2u) = (1480, 0, 0, 0)
initVia2ViaMinLen_minimumcut met5 zerolen (b, b, b, b) = (1, 1, 1, 1)
initVia2ViaMinLenNew_minSpc li1 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (0, 0, 0, 0, 0, 0, 430, 370)
initVia2ViaMinLenNew_minSpc met1 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (430, 370, 445, 385, 445, 385, 460, 460)
initVia2ViaMinLenNew_minSpc met2 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (460, 460, 410, 485, 410, 485, 630, 630)
initVia2ViaMinLenNew_minSpc met3 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (630, 630, 655, 625, 655, 625, 680, 630)
initVia2ViaMinLenNew_minSpc met4 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (680, 630, 1055, 1055, 1055, 1055, 3020, 3020)
initVia2ViaMinLenNew_minSpc met5 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (1480, 1480, 0, 0, 0, 0, 0, 0)
initVia2ViaMinLenNew_minimumcut li1 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (0, 0, 0, 0, 0, 0, 430, 370)
initVia2ViaMinLenNew_minimumcut met1 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (430, 370, 445, 385, 445, 385, 460, 460)
initVia2ViaMinLenNew_minimumcut met2 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (460, 460, 410, 485, 410, 485, 630, 630)
initVia2ViaMinLenNew_minimumcut met3 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (630, 630, 655, 625, 655, 625, 680, 630)
initVia2ViaMinLenNew_minimumcut met4 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (680, 630, 1055, 1055, 1055, 1055, 3020, 3020)
initVia2ViaMinLenNew_minimumcut met5 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (1480, 1480, 0, 0, 0, 0, 0, 0)
initVia2ViaMinLenNew_cutSpc li1 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (0, 0, 0, 0, 0, 0, 430, 370)
initVia2ViaMinLenNew_cutSpc met1 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (430, 370, 445, 385, 445, 385, 460, 460)
initVia2ViaMinLenNew_cutSpc met2 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (460, 460, 410, 485, 410, 485, 630, 630)
initVia2ViaMinLenNew_cutSpc met3 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (630, 630, 655, 625, 655, 625, 680, 630)
initVia2ViaMinLenNew_cutSpc met4 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (680, 630, 1055, 1055, 1055, 1055, 3020, 3020)
initVia2ViaMinLenNew_cutSpc met5 (d2d-x, d2d-y, d2u-x, d2u-y, u2d-x, u2d-y, u2u-x, u2u-y) = (1600, 1600, 0, 0, 0, 0, 0, 0)
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 22.07 (MB), peak = 26.61 (MB)
start detail routing ...
start 0th optimization iteration ...
completing 10% with 0 violations
elapsed time = 00:00:00, memory = 30.77 (MB)
completing 20% with 0 violations
elapsed time = 00:00:00, memory = 34.50 (MB)
completing 30% with 0 violations
elapsed time = 00:00:00, memory = 34.91 (MB)
completing 40% with 0 violations
elapsed time = 00:00:01, memory = 39.06 (MB)
completing 50% with 104 violations
elapsed time = 00:00:01, memory = 48.13 (MB)
completing 60% with 104 violations
elapsed time = 00:00:03, memory = 56.31 (MB)
completing 70% with 169 violations
elapsed time = 00:00:03, memory = 48.62 (MB)
completing 80% with 169 violations
elapsed time = 00:00:04, memory = 53.06 (MB)
completing 90% with 205 violations
elapsed time = 00:00:07, memory = 58.84 (MB)
completing 100% with 191 violations
elapsed time = 00:00:07, memory = 58.84 (MB)
number of violations = 285
cpu time = 00:00:08, elapsed time = 00:00:07, memory = 390.30 (MB), peak = 390.37 (MB)
total wire length = 10803 um
total wire length on LAYER li1 = 4 um
total wire length on LAYER met1 = 5718 um
total wire length on LAYER met2 = 4911 um
total wire length on LAYER met3 = 168 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2824
up-via summary (total 2824):
-----------------------
FR_MASTERSLICE 0
li1 1346
met1 1463
met2 15
met3 0
met4 0
-----------------------
2824
start 1st optimization iteration ...
completing 10% with 285 violations
elapsed time = 00:00:00, memory = 400.59 (MB)
completing 20% with 285 violations
elapsed time = 00:00:00, memory = 401.36 (MB)
completing 30% with 285 violations
elapsed time = 00:00:00, memory = 401.84 (MB)
completing 40% with 285 violations
elapsed time = 00:00:00, memory = 401.84 (MB)
completing 50% with 267 violations
elapsed time = 00:00:00, memory = 395.02 (MB)
completing 60% with 267 violations
elapsed time = 00:00:00, memory = 395.02 (MB)
completing 70% with 198 violations
elapsed time = 00:00:01, memory = 399.53 (MB)
completing 80% with 198 violations
elapsed time = 00:00:01, memory = 399.73 (MB)
completing 90% with 130 violations
elapsed time = 00:00:03, memory = 385.00 (MB)
completing 100% with 59 violations
elapsed time = 00:00:03, memory = 385.00 (MB)
number of violations = 59
cpu time = 00:00:05, elapsed time = 00:00:04, memory = 385.00 (MB), peak = 402.10 (MB)
total wire length = 10715 um
total wire length on LAYER li1 = 3 um
total wire length on LAYER met1 = 5687 um
total wire length on LAYER met2 = 4880 um
total wire length on LAYER met3 = 144 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2812
up-via summary (total 2812):
-----------------------
FR_MASTERSLICE 0
li1 1343
met1 1454
met2 15
met3 0
met4 0
-----------------------
2812
start 2nd optimization iteration ...
completing 10% with 59 violations
elapsed time = 00:00:00, memory = 397.63 (MB)
completing 20% with 59 violations
elapsed time = 00:00:00, memory = 398.96 (MB)
completing 30% with 59 violations
elapsed time = 00:00:01, memory = 411.30 (MB)
completing 40% with 83 violations
elapsed time = 00:00:01, memory = 389.32 (MB)
completing 50% with 83 violations
elapsed time = 00:00:01, memory = 389.32 (MB)
completing 60% with 83 violations
elapsed time = 00:00:01, memory = 410.38 (MB)
completing 70% with 63 violations
elapsed time = 00:00:01, memory = 392.50 (MB)
completing 80% with 63 violations
elapsed time = 00:00:04, memory = 413.66 (MB)
completing 90% with 75 violations
elapsed time = 00:00:04, memory = 389.13 (MB)
completing 100% with 50 violations
elapsed time = 00:00:05, memory = 389.13 (MB)
number of violations = 50
cpu time = 00:00:06, elapsed time = 00:00:06, memory = 389.13 (MB), peak = 418.75 (MB)
total wire length = 10659 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5677 um
total wire length on LAYER met2 = 4823 um
total wire length on LAYER met3 = 155 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2790
up-via summary (total 2790):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1434
met2 15
met3 0
met4 0
-----------------------
2790
start 3rd optimization iteration ...
completing 10% with 50 violations
elapsed time = 00:00:00, memory = 389.64 (MB)
completing 20% with 50 violations
elapsed time = 00:00:00, memory = 390.46 (MB)
completing 30% with 50 violations
elapsed time = 00:00:00, memory = 391.40 (MB)
completing 40% with 50 violations
elapsed time = 00:00:00, memory = 391.40 (MB)
completing 50% with 47 violations
elapsed time = 00:00:00, memory = 395.20 (MB)
completing 60% with 47 violations
elapsed time = 00:00:04, memory = 410.79 (MB)
completing 70% with 38 violations
elapsed time = 00:00:04, memory = 391.21 (MB)
completing 80% with 38 violations
elapsed time = 00:00:04, memory = 391.36 (MB)
completing 90% with 35 violations
elapsed time = 00:00:05, memory = 385.30 (MB)
completing 100% with 5 violations
elapsed time = 00:00:05, memory = 385.30 (MB)
number of violations = 5
cpu time = 00:00:05, elapsed time = 00:00:05, memory = 385.30 (MB), peak = 432.38 (MB)
total wire length = 10654 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5637 um
total wire length on LAYER met2 = 4832 um
total wire length on LAYER met3 = 182 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2808
up-via summary (total 2808):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1448
met2 19
met3 0
met4 0
-----------------------
2808
start 4th optimization iteration ...
completing 10% with 5 violations
elapsed time = 00:00:00, memory = 387.88 (MB)
completing 20% with 5 violations
elapsed time = 00:00:00, memory = 389.36 (MB)
completing 30% with 5 violations
elapsed time = 00:00:00, memory = 389.36 (MB)
completing 40% with 5 violations
elapsed time = 00:00:00, memory = 389.36 (MB)
completing 50% with 5 violations
elapsed time = 00:00:00, memory = 393.88 (MB)
completing 60% with 5 violations
elapsed time = 00:00:00, memory = 397.48 (MB)
completing 70% with 5 violations
elapsed time = 00:00:00, memory = 395.33 (MB)
completing 80% with 5 violations
elapsed time = 00:00:00, memory = 397.47 (MB)
completing 90% with 5 violations
elapsed time = 00:00:00, memory = 397.47 (MB)
completing 100% with 0 violations
elapsed time = 00:00:00, memory = 397.47 (MB)
number of violations = 0
cpu time = 00:00:01, elapsed time = 00:00:00, memory = 397.47 (MB), peak = 432.38 (MB)
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
start 17th optimization iteration ...
completing 10% with 0 violations
elapsed time = 00:00:00, memory = 389.87 (MB)
completing 20% with 0 violations
elapsed time = 00:00:00, memory = 392.61 (MB)
completing 30% with 0 violations
elapsed time = 00:00:00, memory = 392.97 (MB)
completing 40% with 0 violations
elapsed time = 00:00:00, memory = 393.29 (MB)
completing 50% with 0 violations
elapsed time = 00:00:00, memory = 394.75 (MB)
completing 60% with 0 violations
elapsed time = 00:00:00, memory = 393.54 (MB)
completing 70% with 0 violations
elapsed time = 00:00:00, memory = 400.22 (MB)
completing 80% with 0 violations
elapsed time = 00:00:00, memory = 401.41 (MB)
completing 90% with 0 violations
elapsed time = 00:00:00, memory = 406.84 (MB)
completing 100% with 0 violations
elapsed time = 00:00:00, memory = 406.84 (MB)
number of violations = 0
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 406.84 (MB), peak = 432.38 (MB)
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
start 25th optimization iteration ...
completing 10% with 0 violations
elapsed time = 00:00:00, memory = 390.62 (MB)
completing 20% with 0 violations
elapsed time = 00:00:00, memory = 393.95 (MB)
completing 30% with 0 violations
elapsed time = 00:00:00, memory = 388.62 (MB)
completing 40% with 0 violations
elapsed time = 00:00:00, memory = 391.61 (MB)
completing 50% with 0 violations
elapsed time = 00:00:00, memory = 391.61 (MB)
completing 60% with 0 violations
elapsed time = 00:00:00, memory = 392.11 (MB)
completing 70% with 0 violations
elapsed time = 00:00:00, memory = 395.27 (MB)
completing 80% with 0 violations
elapsed time = 00:00:00, memory = 389.00 (MB)
completing 90% with 0 violations
elapsed time = 00:00:00, memory = 391.01 (MB)
completing 100% with 0 violations
elapsed time = 00:00:00, memory = 393.79 (MB)
number of violations = 0
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 393.79 (MB), peak = 432.38 (MB)
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
start 33rd optimization iteration ...
completing 10% with 0 violations
elapsed time = 00:00:00, memory = 387.49 (MB)
completing 20% with 0 violations
elapsed time = 00:00:00, memory = 393.14 (MB)
completing 30% with 0 violations
elapsed time = 00:00:00, memory = 388.09 (MB)
completing 40% with 0 violations
elapsed time = 00:00:00, memory = 390.24 (MB)
completing 50% with 0 violations
elapsed time = 00:00:00, memory = 392.62 (MB)
completing 60% with 0 violations
elapsed time = 00:00:00, memory = 391.73 (MB)
completing 70% with 0 violations
elapsed time = 00:00:00, memory = 390.25 (MB)
completing 80% with 0 violations
elapsed time = 00:00:00, memory = 392.97 (MB)
completing 90% with 0 violations
elapsed time = 00:00:00, memory = 387.10 (MB)
completing 100% with 0 violations
elapsed time = 00:00:00, memory = 387.58 (MB)
number of violations = 0
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 387.58 (MB), peak = 432.38 (MB)
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
start 41st optimization iteration ...
completing 10% with 0 violations
elapsed time = 00:00:00, memory = 386.63 (MB)
completing 20% with 0 violations
elapsed time = 00:00:00, memory = 393.30 (MB)
completing 30% with 0 violations
elapsed time = 00:00:00, memory = 387.69 (MB)
completing 40% with 0 violations
elapsed time = 00:00:00, memory = 391.80 (MB)
completing 50% with 0 violations
elapsed time = 00:00:00, memory = 391.27 (MB)
completing 60% with 0 violations
elapsed time = 00:00:00, memory = 393.02 (MB)
completing 70% with 0 violations
elapsed time = 00:00:00, memory = 392.79 (MB)
completing 80% with 0 violations
elapsed time = 00:00:00, memory = 390.30 (MB)
completing 90% with 0 violations
elapsed time = 00:00:00, memory = 388.15 (MB)
completing 100% with 0 violations
elapsed time = 00:00:00, memory = 389.21 (MB)
number of violations = 0
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 389.21 (MB), peak = 432.38 (MB)
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
start 49th optimization iteration ...
completing 10% with 0 violations
elapsed time = 00:00:00, memory = 388.61 (MB)
completing 20% with 0 violations
elapsed time = 00:00:00, memory = 390.86 (MB)
completing 30% with 0 violations
elapsed time = 00:00:00, memory = 388.37 (MB)
completing 40% with 0 violations
elapsed time = 00:00:00, memory = 389.73 (MB)
completing 50% with 0 violations
elapsed time = 00:00:00, memory = 388.82 (MB)
completing 60% with 0 violations
elapsed time = 00:00:00, memory = 391.75 (MB)
completing 70% with 0 violations
elapsed time = 00:00:00, memory = 389.98 (MB)
completing 80% with 0 violations
elapsed time = 00:00:00, memory = 392.56 (MB)
completing 90% with 0 violations
elapsed time = 00:00:00, memory = 393.52 (MB)
completing 100% with 0 violations
elapsed time = 00:00:00, memory = 392.78 (MB)
number of violations = 0
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 392.78 (MB), peak = 432.38 (MB)
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
start 57th optimization iteration ...
completing 10% with 0 violations
elapsed time = 00:00:00, memory = 387.76 (MB)
completing 20% with 0 violations
elapsed time = 00:00:00, memory = 393.38 (MB)
completing 30% with 0 violations
elapsed time = 00:00:00, memory = 387.96 (MB)
completing 40% with 0 violations
elapsed time = 00:00:00, memory = 389.99 (MB)
completing 50% with 0 violations
elapsed time = 00:00:00, memory = 392.62 (MB)
completing 60% with 0 violations
elapsed time = 00:00:00, memory = 391.73 (MB)
completing 70% with 0 violations
elapsed time = 00:00:00, memory = 390.24 (MB)
completing 80% with 0 violations
elapsed time = 00:00:00, memory = 392.98 (MB)
completing 90% with 0 violations
elapsed time = 00:00:00, memory = 386.12 (MB)
completing 100% with 0 violations
elapsed time = 00:00:00, memory = 386.93 (MB)
number of violations = 0
cpu time = 00:00:00, elapsed time = 00:00:00, memory = 386.93 (MB), peak = 432.38 (MB)
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
complete detail routing
total wire length = 10640 um
total wire length on LAYER li1 = 2 um
total wire length on LAYER met1 = 5629 um
total wire length on LAYER met2 = 4818 um
total wire length on LAYER met3 = 191 um
total wire length on LAYER met4 = 0 um
total wire length on LAYER met5 = 0 um
total number of vias = 2806
up-via summary (total 2806):
-----------------------
FR_MASTERSLICE 0
li1 1341
met1 1444
met2 21
met3 0
met4 0
-----------------------
2806
cpu time = 00:00:29, elapsed time = 00:00:25, memory = 386.93 (MB), peak = 432.38 (MB)
post processing ...
Runtime taken (hrt): 27.9805