openlane/chip_io/runs/chip_io/results/magic/sky130_ef_io__com_bus_slice_10um.ext

timestamp 1606262209
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
abstract
port "VCCHIB" 7 1800 20 2000 1070 m5
port "VCCHIB" 7 0 20 2000 1070 m5
port "VCCD" 9 1800 1390 2000 2280 m5
port "VCCD" 9 0 1390 2000 2280 m5
port "VDDA" 4 1800 2600 2000 3250 m5
port "VDDA" 4 0 2600 2000 3250 m5
port "VDDIO" 8 1800 3570 2000 4460 m5
port "VDDIO" 8 0 3570 2000 4460 m5
port "VSSIO" 10 1800 4780 2000 5670 m5
port "VSSIO" 10 0 4780 2000 5670 m5
port "VSWITCH" 5 1800 5990 2000 6640 m5
port "VSWITCH" 5 0 5990 2000 6640 m5
port "VSSA" 3 1800 6960 2000 7610 m5
port "VSSA" 3 0 6960 2000 7610 m5
port "VSSD" 11 1800 7930 2000 8820 m5
port "VSSD" 11 0 7930 2000 8820 m5
port "VSSA" 3 1800 9140 2000 10940 m5
port "VSSA" 3 0 9140 2000 10940 m5
port "VSSIO_Q" 12 1800 11260 2000 12110 m5
port "VSSIO_Q" 12 0 11260 2000 12110 m5
port "VDDIO_Q" 6 1800 12430 2000 13280 m5
port "VDDIO_Q" 6 0 12430 2000 13280 m5
port "VDDIO" 8 1800 13600 2000 18593 m5
port "VDDIO" 8 0 13600 200 18593 m5
port "VSSIO" 10 1800 34750 2000 39593 m5
port "VSSIO" 10 0 34750 2000 39593 m5
port "VCCHIB" 7 1800 0 2000 1090 m4
port "VCCHIB" 7 0 0 2000 1090 m4
port "VCCD" 9 1800 1370 2000 2300 m4
port "VCCD" 9 0 1370 2000 2300 m4
port "VDDA" 4 1800 2580 2000 3270 m4
port "VDDA" 4 0 2580 2000 3270 m4
port "VDDIO" 8 1800 3550 2000 4480 m4
port "VDDIO" 8 0 3550 2000 4480 m4
port "VSSIO" 10 1800 4760 2000 5690 m4
port "VSSIO" 10 0 4760 2000 5690 m4
port "VSWITCH" 5 1800 5970 2000 6660 m4
port "VSWITCH" 5 0 5970 2000 6660 m4
port "VSSA" 3 1800 6940 2000 7630 m4
port "VSSA" 3 0 6940 2000 7630 m4
port "VSSD" 11 1800 7910 2000 8840 m4
port "VSSD" 11 0 7910 2000 8840 m4
port "VSSA" 3 1800 9140 2000 9206 m4
port "VSSA" 3 0 9140 2000 9206 m4
port "AMUXBUS_B" 2 1800 9266 2000 9862 m4
port "AMUXBUS_B" 2 0 9266 2000 9862 m4
port "AMUXBUS_A" 1 1800 10218 2000 10814 m4
port "AMUXBUS_A" 1 0 10218 2000 10814 m4
port "VSSA" 3 1800 10874 2000 10940 m4
port "VSSA" 3 0 10874 2000 10940 m4
port "VSSIO_Q" 12 1800 11240 2000 12130 m4
port "VSSIO_Q" 12 0 11240 2000 12130 m4
port "VDDIO_Q" 6 1800 12410 2000 13300 m4
port "VDDIO_Q" 6 0 12410 2000 13300 m4
node "VCCHIB" 0 0 0 20 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCHIB" "VCCHIB"
node "VCCD" 0 0 0 1390 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCD" "VCCD"
node "VDDA" 0 0 0 2600 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDA" "VDDA"
node "VDDIO" 0 0 0 3570 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDIO" "VDDIO"
node "VSSIO" 0 0 0 4780 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VSWITCH" 0 0 0 5990 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSWITCH" "VSWITCH"
node "VSSA" 0 0 0 6960 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSD" 0 0 0 7930 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSD" "VSSD"
node "VSSA" 0 0 0 9140 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSIO_Q" 0 0 0 11260 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO_Q" "VSSIO_Q"
node "VDDIO_Q" 0 0 0 12430 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDIO_Q" "VDDIO_Q"
node "VDDIO" 0 0 1800 13600 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "m5_520_13600#" 0 0 520 13600 obsm5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO" 0 0 0 13600 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 0 34750 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VCCHIB" 0 0 0 0 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCHIB" "VCCHIB"
node "VCCD" 0 0 0 1370 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCD" "VCCD"
node "VDDA" 0 0 0 2580 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDA" "VDDA"
node "VDDIO" 0 0 0 3550 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDIO" "VDDIO"
node "VSSIO" 0 0 0 4760 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VSWITCH" 0 0 0 5970 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSWITCH" "VSWITCH"
node "VSSA" 0 0 0 6940 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSD" 0 0 0 7910 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSD" "VSSD"
node "VSSA" 0 0 0 9140 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "AMUXBUS_B" 0 0 0 9266 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "AMUXBUS_B" "AMUXBUS_B"
node "m4_0_9942#" 0 0 0 9942 obsm4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "AMUXBUS_A" 0 0 0 10218 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "AMUXBUS_A" "AMUXBUS_A"
node "VSSA" 0 0 0 10874 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "m4_0_11020#" 0 0 0 11020 obsm4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO_Q" 0 0 0 11240 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO_Q" "VSSIO_Q"
node "m4_0_12210#" 0 0 0 12210 obsm4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO_Q" 0 0 0 12410 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDIO_Q" "VDDIO_Q"
node "m4_0_13380#" 0 0 0 13380 obsm4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0