Corrected the user project example Makefiles.
diff --git a/mag/clamp_list.txt b/mag/clamp_list.txt
new file mode 100644
index 0000000..b8b84a5
--- /dev/null
+++ b/mag/clamp_list.txt
@@ -0,0 +1,36 @@
+Pad                          Instance                    Clamp connections
+							 DRN1   SRC1   DRN2  SRC2   B2B
+----------------------------------------------------------------------------------------
+sky130_ef_io__vddio_hvc_pad  \mgmt_vddio_hvclamp_pad[0]  vddio, vssio
+sky130_ef_io__vddio_hvc_pad  \mgmt_vddio_hvclamp_pad[1]  vddio, vssio
+sky130_ef_io__vssio_hvc_pad  \mgmt_vssio_hvclamp_pad[0]  vddio, vssio
+sky130_ef_io__vssio_hvc_pad  \mgmt_vssio_hvclamp_pad[1]  vddio, vssio
+-----------------------------------------------------------------------------------------
+sky130_ef_io__vdda_hvc_pad    mgmt_vdda_hvclamp_pad      vdda,  vssa
+sky130_ef_io__vssa_hvc_pad    mgmt_vssa_hvclamp_pad      vdda,  vssa
+sky130_ef_io__vdda_hvc_pad    user1_vdda_hvclamp_pad     vdda1, vssa1
+sky130_ef_io__vssa_hvc_pad   user1_vssa_hvclamp_pad      vdda1, vssa1
+sky130_ef_io__vdda_hvc_pad   user2_vdda_hvclamp_pad      vdda2, vssa2
+sky130_ef_io__vssa_hvc_pad   user2_vssa_hvclamp_pad      vdda2, vssa2
+-----------------------------------------------------------------------------------------
+sky130_ef_io__vccd_lvc_pad    mgmt_vccd_lvclamp_pad      vccd,  vssio, vccd,  vssd, vssa
+sky130_ef_io__vssd_lvc_pad    mgmt_vssd_lvclmap_pad      vccd,  vssio, vccd,  vssd, vssa
+-----------------------------------------------------------------------------------------
+sky130_ef_io__vccd_lvc_pad   user1_vccd_lvclamp_pad      vccd1, vssd1, vccd1, vssd, vssio
+sky130_ef_io__vssd_lvc_pad   user1_vssd_lvclmap_pad      vccd1, vssd1, vccd1, vssd, vssio
+sky130_ef_io__vccd_lvc_pad   user2_vccd_lvclamp_pad      vccd2, vssd2, vccd2, vssd, vssio
+sky130_ef_io__vssd_lvc_pad   user2_vssd_lvclmap_pad      vccd2, vssd2, vccd2, vssd, vssio
+-----------------------------------------------------------------------------------------
+
+Overlay types used:
+1. hvc_pad:		vddio -> vssio
+2. hvc_pad		vdda  -> vssa
+3. lvc_pad		vccd  -> vssio,  vccd -> vssd    vssa
+4. lvc_pad		vccd  -> vssd, 	 vccd -> vssdG   vssio
+
+NOTE:  Type (4) crosses domains, so that the local VCCD has a diode to the
+local VSSD and also to the global VSSD.  BUT:  Although vccd goes all the way
+around the chip in the form of vcchib, vssd does not, which makes the SRC2
+connection effectively unreachable in this configuration, so better to just
+change it to vssd1 and vssd2 for the respective domains.
+
diff --git a/verilog/dv/caravel/user_proj_example/io_ports/Makefile b/verilog/dv/caravel/user_proj_example/io_ports/Makefile
index 6b630a3..d6c2bf6 100644
--- a/verilog/dv/caravel/user_proj_example/io_ports/Makefile
+++ b/verilog/dv/caravel/user_proj_example/io_ports/Makefile
@@ -15,7 +15,8 @@
 # SPDX-License-Identifier: Apache-2.0
 
 FIRMWARE_PATH = ../..
-RTL_PATH = ../../../../rtl
+VERILOG_PATH = ../../../..
+RTL_PATH = $(VERILOG_PATH)/rtl
 IP_PATH = ../../../../ip
 BEHAVIOURAL_MODELS = ../../ 
 
@@ -23,6 +24,8 @@
 GCC_PREFIX?=riscv32-unknown-elf
 PDK_PATH?=/ef/tech/SW/sky130A
 
+SIM?=RTL
+
 .SUFFIXES:
 
 PATTERN = io_ports
@@ -32,9 +35,15 @@
 hex:  ${PATTERN:=.hex}
 
 %.vvp: %_tb.v %.hex
-	iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ifeq ($(SIM),RTL)
+	iverilog -DFUNCTIONAL -DSIM -I $(BEHAVIOURAL_MODELS) \
 	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
-	-o $@ $<
+	$< -o $@
+else
+	iverilog -DFUNCTIONAL -DSIM -DGL -I $(BEHAVIOURAL_MODELS) \
+	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
+	$< -o $@
+endif
 
 %.vcd: %.vvp
 	vvp $<
diff --git a/verilog/dv/caravel/user_proj_example/la_test1/Makefile b/verilog/dv/caravel/user_proj_example/la_test1/Makefile
index 677a8d7..968a74b 100644
--- a/verilog/dv/caravel/user_proj_example/la_test1/Makefile
+++ b/verilog/dv/caravel/user_proj_example/la_test1/Makefile
@@ -23,6 +23,8 @@
 GCC_PREFIX?=riscv32-unknown-elf
 PDK_PATH?=/ef/tech/SW/sky130A
 
+SIM?=RTL
+
 .SUFFIXES:
 
 PATTERN = la_test1
@@ -32,9 +34,15 @@
 hex:  ${PATTERN:=.hex}
 
 %.vvp: %_tb.v %.hex
-	iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ifeq ($(SIM),RTL)
+	iverilog -DFUNCTIONAL -DSIM -I $(BEHAVIOURAL_MODELS) \
 	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
-	-o $@ $<
+	$< -o $@
+else
+	iverilog -DFUNCTIONAL -DSIM -DGL -I $(BEHAVIOURAL_MODELS) \
+	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
+	$< -o $@
+endif
 
 %.vcd: %.vvp
 	vvp $<
diff --git a/verilog/dv/caravel/user_proj_example/la_test2/Makefile b/verilog/dv/caravel/user_proj_example/la_test2/Makefile
index 22b99cb..4980a08 100644
--- a/verilog/dv/caravel/user_proj_example/la_test2/Makefile
+++ b/verilog/dv/caravel/user_proj_example/la_test2/Makefile
@@ -23,6 +23,8 @@
 GCC_PREFIX?=riscv32-unknown-elf
 PDK_PATH?=/ef/tech/SW/sky130A
 
+SIM?=RTL
+
 .SUFFIXES:
 
 PATTERN = la_test2
@@ -32,9 +34,15 @@
 hex:  ${PATTERN:=.hex}
 
 %.vvp: %_tb.v %.hex
-	iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ifeq ($(SIM),RTL)
+	iverilog -DFUNCTIONAL -DSIM -I $(BEHAVIOURAL_MODELS) \
 	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
-	-o $@ $<
+	$< -o $@
+else
+	iverilog -DFUNCTIONAL -DSIM -DGL -I $(BEHAVIOURAL_MODELS) \
+	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
+	$< -o $@
+endif
 
 %.vcd: %.vvp
 	vvp $<