1. 69663c7 Eliminate the two inverters at the top level by Ahmed Ghazy · 4 years, 5 months ago
  2. 630d123 Updated Carvel Architectural diagram by Mohamed Shalan · 4 years, 5 months ago
  3. 549fd51 Delete ciic_harness.png by Mohamed Shalan · 4 years, 5 months ago
  4. 0270b03 Add files via upload by Mohamed Shalan · 4 years, 5 months ago
  5. f1d5472 Delete ciic_harness.png by Mohamed Shalan · 4 years, 5 months ago
  6. 11e6d4e Updated the harness diagram by Mohamed Shalan · 4 years, 5 months ago
  7. 8baf4a0 Delete ciic_harness.png by Mohamed Shalan · 4 years, 5 months ago
  8. 4f75616 Update README.md by Mohamed Shalan · 4 years, 5 months ago
  9. 312ff95 switch to rtl in info.yaml until an elaborated netlist is ready. by agorararmard · 4 years, 5 months ago
  10. 2fa4b03 Add caravel floorplan with a preliminary seal ring by Ahmed Ghazy · 4 years, 5 months ago
  11. 4596e5f Merge pull request #2 from mattvenn/release by R. Timothy Edwards · 4 years, 5 months ago
  12. 336e082 add missing signals by Matt Venn · 4 years, 5 months ago
  13. 08cd6eb add default nettype none by Matt Venn · 4 years, 5 months ago
  14. d4cc669 [DATA] Add full runs of almost all blocks by Ahmed Ghazy · 4 years, 5 months ago
  15. 5898e4a Add compress and uncompress Makefile targets by Ahmed Ghazy · 4 years, 5 months ago
  16. 16fa2ba info.yml fix by agorararmard · 4 years, 5 months ago
  17. 297a6cf Merge pull request #38 from Manarabdelaty/update_custom_mem by R. Timothy Edwards · 4 years, 5 months ago
  18. 8f13179 Updated custom memory by Manar · 4 years, 5 months ago
  19. 7c9cea0 Add sky130_fd_io__top_xres4v2 stub by Ahmed Ghazy · 4 years, 5 months ago
  20. 7215439 Update and add the rest of design configs by Ahmed Ghazy · 4 years, 5 months ago
  21. b41204c Merge pull request #35 from Manarabdelaty/rename_lvs by R. Timothy Edwards · 4 years, 5 months ago
  22. bcc2544 Add a new sram_1rw1r_32_256_8_sky130 wrapper by Ahmed Ghazy · 4 years, 5 months ago
  23. 61dce92 Renamed lvs guard to use_power_pins by Manar · 4 years, 5 months ago
  24. 9eeea83 Update mgmt_core config by Ahmed Ghazy · 4 years, 5 months ago
  25. bc5e215 Merge pull request #34 from Manarabdelaty/update_storage_arch by R. Timothy Edwards · 4 years, 5 months ago
  26. 1159d1a Update DFFRAM config by Ahmed Ghazy · 4 years, 5 months ago
  27. ffe6cad Updated storage area by Manar · 4 years, 5 months ago
  28. e5ac00f Merge pull request #33 from Manarabdelaty/custom_mem by R. Timothy Edwards · 4 years, 5 months ago
  29. 50b0ea0 Merge pull request #32 from dan-rodrigues/user_proj_wb_ack by R. Timothy Edwards · 4 years, 5 months ago
  30. c3b9da4 Updated Makefiles to have lvs defined to use the power pins by Manar · 4 years, 5 months ago
  31. 68e0363 Added power pins to the custom memory cells by Manar · 4 years, 5 months ago
  32. 2517fa8 Add USE_CUSTOM_DFFRAM guard by Ahmed Ghazy · 4 years, 5 months ago
  33. b9a8c91 user_proj_example: fix wbs_ack_o wiring by Dan Rodrigues · 4 years, 5 months ago
  34. a4f9b52 Update info.yaml by Jeff DiCorpo · 4 years, 5 months ago
  35. b2fe178 Create info.yaml by Jeff DiCorpo · 4 years, 5 months ago
  36. 5586f1b Add the custom DFF RAM by Ahmed Ghazy · 4 years, 5 months ago
  37. 58cca1b Merge pull request #31 from agorararmard/mkk-scripts by R. Timothy Edwards · 4 years, 5 months ago
  38. f744e2e Update openlane configs and Makefile by Ahmed Ghazy · 4 years, 5 months ago
  39. 2170449 Added chip_io.spice under spi/lvs by Ahmed Ghazy · 4 years, 5 months ago
  40. 8e343f6 call instructions consistent with script names by agorararmard · 4 years, 5 months ago
  41. 1b0190a just a typo by agorararmard · 4 years, 5 months ago
  42. 1a1e89a dump xor scripts by agorararmard · 4 years, 5 months ago
  43. 3661905 ext scripts by agorararmard · 4 years, 5 months ago
  44. 85a8aea re-structuring of scripts by agorararmard · 4 years, 5 months ago
  45. 2ffcf3b another go at other types by agorararmard · 4 years, 5 months ago
  46. 80d3fef init gds version by agorararmard · 4 years, 5 months ago
  47. c2ed4ec added imagaes of the work in progress on caravel by Mohamed Kassem · 4 years, 5 months ago
  48. 2c852fb Merge pull request #30 from Manarabdelaty/wb_mprj_port by R. Timothy Edwards · 4 years, 5 months ago
  49. db745b7 Updated openlane configs for mgmt_core and digital_pll by Ahmed Ghazy · 4 years, 5 months ago
  50. cd4cff7 Connected WB MI A port outputs to the wb bus by Manar · 4 years, 5 months ago
  51. f8e6154 Merge pull request #29 from Manarabdelaty/param_adr by R. Timothy Edwards · 4 years, 5 months ago
  52. 6bedda9 Added localparam for calculating mem address bits by Manar · 4 years, 5 months ago
  53. 263b891 Merge pull request #28 from Manarabdelaty/incr_user_ram_blocks by R. Timothy Edwards · 4 years, 5 months ago
  54. db08adb Updated default number of sram blocks for the user area by Manar · 4 years, 5 months ago
  55. cd41a1d Merge pull request #27 from ax3ghazy/conflict_warnings_fix by R. Timothy Edwards · 4 years, 5 months ago
  56. 706c312 Reset iomem_ready to 0 only in one block by Ahmed Ghazy · 4 years, 5 months ago
  57. f46273f Fix for the synthesis warnings about iomem_rdata by Ahmed Ghazy · 4 years, 5 months ago
  58. 7761f89 Merge pull request #26 from Manarabdelaty/add_ext_storage by R. Timothy Edwards · 4 years, 5 months ago
  59. 55ec369 Connected storage area to mgmt_core by Manar · 4 years, 5 months ago
  60. 0cefb93 Seperated mgmt and user storage blocks base addresses by Manar · 4 years, 5 months ago
  61. 14f7ca0 Added storage area standalone rtl by Manar · 4 years, 5 months ago
  62. ec9b536 Removed storage area from mgmt_core by Manar · 4 years, 5 months ago
  63. d01c637 Modified the mprj_ctrl.v verilog to be completely clear about how by Tim Edwards · 4 years, 5 months ago
  64. 22d29d6 Add a global defines.v and rely less on parameters by Ahmed Ghazy · 4 years, 5 months ago
  65. 3a1e353 Fix another 36->37 typo in mem_tb.v by Ahmed Ghazy · 4 years, 5 months ago
  66. cfe7653 Corrected the timer testbenches for minor count differences due to by Tim Edwards · 4 years, 5 months ago
  67. 7a3f478 added ./scripts folder with misc purposes. THIS IS WORK IN PROGRESS by Mohamed Kassem · 4 years, 5 months ago
  68. 0445c08 Revised the mprj_ctrl module verilog so that it does not generate by Tim Edwards · 4 years, 5 months ago
  69. ba32890 Revised the mprj_ctrl to treat the power control as a single bit by Tim Edwards · 4 years, 5 months ago
  70. e6eda80 Fix a typo in a previous fix... by Ahmed Ghazy · 4 years, 5 months ago
  71. 0b6219d Fix to an issue with index arithmetic by Ahmed Ghazy · 4 years, 5 months ago
  72. 496a08a Corrected an issue with the JTAG and SDO pins that prevented them from by Tim Edwards · 4 years, 5 months ago
  73. e1b1f17 Add more openlane configs by Ahmed Ghazy · 4 years, 5 months ago
  74. 72e52c6 Added what can be pushed of chip_io by Ahmed Ghazy · 4 years, 5 months ago
  75. 6b6803f Add a sample user project wrapper by Ahmed Ghazy · 4 years, 5 months ago
  76. 7be29a2 Made a number of modifications to the counter-timer to correctly pipeline by Tim Edwards · 4 years, 5 months ago
  77. 14d35ac Added synthesized memory (4kb) by Manar · 4 years, 5 months ago
  78. 5f96855 Merge pull request #20 from thesourcerer8/release by R. Timothy Edwards · 4 years, 5 months ago
  79. d20bebb Merge pull request #1 from thesourcerer8/thesourcerer8-typofix-1 by thesourcerer8 · 4 years, 5 months ago
  80. 0a6a447 Typos fixed by thesourcerer8 · 4 years, 5 months ago
  81. 05ad4fc Added two additional signals for monitoring the user areas 1 and 2 by Tim Edwards · 4 years, 5 months ago
  82. 2a62066 Merge pull request #19 from Manarabdelaty/rm_xbar by R. Timothy Edwards · 4 years, 5 months ago
  83. 32d0542 Added two additional features: (1) Timer chaining, which allows one by Tim Edwards · 4 years, 5 months ago
  84. 98a7adc Removed cross bar switch port from mgmt core by Manar · 4 years, 5 months ago
  85. b6dd152 Updated testbenches to declare 38 bits for the user project GPIO pins. by Tim Edwards · 4 years, 5 months ago
  86. 268a90b Merge pull request #18 from ax3ghazy/params by R. Timothy Edwards · 4 years, 5 months ago
  87. 1c1b462 Merge pull request #17 from Manarabdelaty/release by R. Timothy Edwards · 4 years, 5 months ago
  88. 4533150 Merge pull request #16 from ax3ghazy/mkq by R. Timothy Edwards · 4 years, 5 months ago
  89. f757546 Merge pull request #15 from ax3ghazy/release by R. Timothy Edwards · 4 years, 5 months ago
  90. f052d23 Added colors indicating power supplies on the PCB footprint drawing. by Tim Edwards · 4 years, 6 months ago
  91. 6a0750a Updated the datasheet corresponding to a modified padframe and bump by Tim Edwards · 4 years, 6 months ago
  92. 2adba10 Fix typos in parameter names by Ahmed Ghazy · 4 years, 6 months ago
  93. 6d9739d Removed references to "Mega-Project" and replaced them with "User Project". by Tim Edwards · 4 years, 6 months ago
  94. 7ea4895 Fixed sysctrl unit test by Manar · 4 years, 6 months ago
  95. ba04b40 Allow PDK_PATH to be user-specified by Ahmed Ghazy · 4 years, 6 months ago
  96. 81d5a89 Move wire declarations before they're first used by Ahmed Ghazy · 4 years, 6 months ago
  97. 60aeb5f Added a placeholder padframe layout, and added an almost-complete by Tim Edwards · 4 years, 6 months ago
  98. 49a4ff6 Fixed broken links for dv examples by Mohamed Kassem · 4 years, 6 months ago
  99. 63c933f Removed VCD and hex files, which should not be in the repository. by Tim Edwards · 4 years, 6 months ago
  100. b86fc84 (1) Added a wrapper interface between the top level verilog and the user project by Tim Edwards · 4 years, 6 months ago