| commit | e6eda804fa840f8ccb66a5af2188044e5c23731b | [log] [tgz] |
|---|---|---|
| author | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Tue Oct 27 15:47:31 2020 +0200 |
| committer | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Wed Oct 28 22:58:29 2020 +0200 |
| tree | 1682b55febc400571db2a63ccaf9f317a9023b26 | |
| parent | 0b6219d234cc044a8fb7ed7b544b26631d207577 [diff] |
Fix a typo in a previous fix... - IO_PADS -> PWR_PADS
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: