Correct instance names that iverilog doesn't like

- e.g., "mgmt_vssio_hvclamp_pad[1]" -> "\mgmt_vssio_hvclamp_pad[1] "

verilog/rtl/chip_io.v

diff --git a/verilog/rtl/chip_io.v b/verilog/rtl/chip_io.v
index 44fa93f..bbc238d 100644
--- a/verilog/rtl/chip_io.v
+++ b/verilog/rtl/chip_io.v
@@ -81,7 +81,7 @@
 	// rails and grounds, and one back-to-back diode which connects
 	// between the first LV clamp ground and any other ground.
 
-    	sky130_ef_io__vddio_hvc_pad mgmt_vddio_hvclamp_pad[0] (
+    	sky130_ef_io__vddio_hvc_pad \mgmt_vddio_hvclamp_pad[0]  (
 		`MGMT_ABUTMENT_PINS
 `ifdef TOP_ROUTING
 		.VDDIO(vddio),
@@ -90,7 +90,7 @@
     	);
 
 	// lies in user area 2
-    	sky130_ef_io__vddio_hvc_pad mgmt_vddio_hvclamp_pad[1] (
+    	sky130_ef_io__vddio_hvc_pad \mgmt_vddio_hvclamp_pad[1]  (
 		`USER2_ABUTMENT_PINS
 `ifdef TOP_ROUTING
 		.VDDIO(vddio),
@@ -114,7 +114,7 @@
 		`LVCLAMP_PINS(vccd, vssio, vccd, vssd, vssa)
     	);
 
-    	sky130_ef_io__vssio_hvc_pad mgmt_vssio_hvclamp_pad[0] (
+    	sky130_ef_io__vssio_hvc_pad \mgmt_vssio_hvclamp_pad[0]  (
 		`MGMT_ABUTMENT_PINS
 `ifdef TOP_ROUTING
 		.VSSIO(vssio),
@@ -122,7 +122,7 @@
 		`HVCLAMP_PINS(vddio, vssio)
     	);
 
-    	sky130_ef_io__vssio_hvc_pad mgmt_vssio_hvclamp_pad[1] (
+    	sky130_ef_io__vssio_hvc_pad \mgmt_vssio_hvclamp_pad[1]  (
 		`USER2_ABUTMENT_PINS
 `ifdef TOP_ROUTING
 		.VSSIO(vssio),
@@ -249,7 +249,7 @@
 
 	wire xresloop;
 	sky130_fd_io__top_xres4v2 resetb_pad (
-		`MGMT_ABUTMENT_PINS 
+		`MGMT_ABUTMENT_PINS
 		`ifndef	TOP_ROUTING
 		    .PAD(resetb),
 		`endif