final gds oasis
diff --git a/mpw_precheck/logs/gds.info b/mpw_precheck/logs/gds.info
new file mode 100644
index 0000000..69c1d7e
--- /dev/null
+++ b/mpw_precheck/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: a5b78e1dee205485a829ba28cdd3753d8636ecf7
\ No newline at end of file
diff --git a/mpw_precheck/logs/git.info b/mpw_precheck/logs/git.info
new file mode 100644
index 0000000..cd4ec94
--- /dev/null
+++ b/mpw_precheck/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/egorxe/ophelia_fpga_openmpw.git
+Branch: main
+Commit: 4b407974710e71322cb6270d812c2b44b3e13cbb
diff --git a/mpw_precheck/logs/klayout_beol_check.log b/mpw_precheck/logs/klayout_beol_check.log
new file mode 100644
index 0000000..291e7ad
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.log
@@ -0,0 +1,421 @@
+2022-12-05 18:58:03 +0000: Memory Usage (543004K) : Starting running GF180MCU Klayout DRC runset on /root/ophelia_efpga/gds/user_project_wrapper.gds
+2022-12-05 18:58:03 +0000: Memory Usage (543004K) : Ruby Version for klayout: 2.0.0
+2022-12-05 18:58:06 +0000: Memory Usage (816820K) : Loading database to memory is complete.
+2022-12-05 18:58:06 +0000: Memory Usage (816820K) : GF180MCU Klayout DRC runset output at: /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_beol_check.xml
+2022-12-05 18:58:06 +0000: Memory Usage (816820K) : Number of threads to use 4
+2022-12-05 18:58:06 +0000: Memory Usage (816820K) : flat mode is enabled.
+2022-12-05 18:58:06 +0000: Memory Usage (816820K) : Read in polygons from layers.
+2022-12-05 18:59:44 +0000: Memory Usage (2188240K) : Starting deriving base layers.
+2022-12-05 19:00:34 +0000: Memory Usage (3094824K) : Evaluate switches.
+2022-12-05 19:00:34 +0000: Memory Usage (3094824K) : FEOL is disabled.
+2022-12-05 19:00:34 +0000: Memory Usage (3094824K) : BEOL is enabled.
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : connectivity rules are enabled.
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : METAL_TOP Selected is 9K
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : METAL_STACK Selected is 5LM
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : Wedge enabled true
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : Ball enabled true
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : Gold enabled true
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : MIM Option selected B
+/opt/checks/tech-files/gf180mcuC_mr.drc:543: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/gf180mcuC_mr.drc:463: warning: previous definition of OFFGRID was here
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : Offgrid enabled true
+2022-12-05 19:00:35 +0000: Memory Usage (3094824K) : Construct connectivity for the design.
+2022-12-05 19:01:20 +0000: Memory Usage (3094824K) : Connectivity rules enabled, Netlist object will be generated.
+2022-12-05 19:03:33 +0000: Memory Usage (4486392K) : Total area of the design is 8997120.228799999 um^2.
+2022-12-05 19:03:33 +0000: Memory Usage (4486392K) : Total no. of polygons in the design is 11391089
+2022-12-05 19:03:33 +0000: Memory Usage (4486392K) : Initialization and base layers definition.
+2022-12-05 19:03:33 +0000: Memory Usage (4486392K) : Starting GF180MCU DRC rules.
+2022-12-05 19:03:33 +0000: Memory Usage (4486392K) : BEOL section
+2022-12-05 19:03:33 +0000: Memory Usage (4486392K) : Executing rule M1.1
+2022-12-05 19:03:37 +0000: Memory Usage (4486392K) : Executing rule M1.2a
+2022-12-05 19:06:03 +0000: Memory Usage (4486392K) : Executing rule M1.2b
+2022-12-05 19:07:16 +0000: Memory Usage (5008128K) : Executing rule M1.3
+2022-12-05 19:07:16 +0000: Memory Usage (5008128K) : Executing rule M2.1
+2022-12-05 19:07:17 +0000: Memory Usage (5008128K) : Executing rule M2.2a
+2022-12-05 19:07:21 +0000: Memory Usage (5008128K) : Executing rule M2.2b
+2022-12-05 19:07:34 +0000: Memory Usage (5008128K) : Executing rule M2.3
+2022-12-05 19:07:34 +0000: Memory Usage (5008128K) : Executing rule M3.1
+2022-12-05 19:07:34 +0000: Memory Usage (5008128K) : Executing rule M3.2a
+2022-12-05 19:07:36 +0000: Memory Usage (5008128K) : Executing rule M3.2b
+2022-12-05 19:07:42 +0000: Memory Usage (5008128K) : Executing rule M3.3
+2022-12-05 19:07:42 +0000: Memory Usage (5008128K) : Executing rule M4.1
+2022-12-05 19:07:42 +0000: Memory Usage (5008128K) : Executing rule M4.2a
+2022-12-05 19:07:43 +0000: Memory Usage (5008128K) : Executing rule M4.2b
+2022-12-05 19:07:45 +0000: Memory Usage (5008128K) : Executing rule M4.3
+2022-12-05 19:07:45 +0000: Memory Usage (5008128K) : Executing rule M5.1
+2022-12-05 19:07:45 +0000: Memory Usage (5008128K) : Executing rule M5.2a
+2022-12-05 19:07:45 +0000: Memory Usage (5008128K) : Executing rule M5.2b
+2022-12-05 19:07:45 +0000: Memory Usage (5008128K) : Executing rule M5.3
+2022-12-05 19:07:45 +0000: Memory Usage (5008128K) : Executing rule V1.1
+2022-12-05 19:07:47 +0000: Memory Usage (5008128K) : Executing rule V1.2a
+2022-12-05 19:07:56 +0000: Memory Usage (5049088K) : Executing rule V1.2b
+2022-12-05 19:07:57 +0000: Memory Usage (5049088K) : Executing rule V1.3a
+2022-12-05 19:09:46 +0000: Memory Usage (6433420K) : Executing rule V1.3c
+2022-12-05 19:10:40 +0000: Memory Usage (6392592K) : Executing rule V1.3d
+2022-12-05 19:11:01 +0000: Memory Usage (6810020K) : Executing rule V1.4a
+2022-12-05 19:11:22 +0000: Memory Usage (6991568K) : Executing rule V1.4b
+2022-12-05 19:11:50 +0000: Memory Usage (7270364K) : Executing rule V1.4c
+2022-12-05 19:11:55 +0000: Memory Usage (7317000K) : Executing rule V2.1
+2022-12-05 19:11:57 +0000: Memory Usage (7426976K) : Executing rule V2.2a
+2022-12-05 19:12:06 +0000: Memory Usage (7451860K) : Executing rule V2.2b
+2022-12-05 19:12:07 +0000: Memory Usage (7451860K) : Executing rule V2.3b
+2022-12-05 19:12:29 +0000: Memory Usage (7651840K) : Executing rule V2.3c
+2022-12-05 19:12:58 +0000: Memory Usage (8043844K) : Executing rule V2.3d
+2022-12-05 19:13:03 +0000: Memory Usage (8077540K) : Executing rule V2.4a
+2022-12-05 19:13:16 +0000: Memory Usage (8178816K) : Executing rule V2.4b
+2022-12-05 19:13:46 +0000: Memory Usage (8604416K) : Executing rule V2.4c
+2022-12-05 19:13:49 +0000: Memory Usage (8692184K) : Executing rule V3.1
+2022-12-05 19:13:50 +0000: Memory Usage (8692184K) : Executing rule V3.2a
+2022-12-05 19:13:55 +0000: Memory Usage (8696136K) : Executing rule V3.2b
+2022-12-05 19:13:55 +0000: Memory Usage (8696136K) : Executing rule V3.3b
+2022-12-05 19:14:05 +0000: Memory Usage (8774064K) : Executing rule V3.3c
+2022-12-05 19:14:19 +0000: Memory Usage (8978380K) : Executing rule V3.3d
+2022-12-05 19:14:22 +0000: Memory Usage (9085300K) : Executing rule V3.4a
+2022-12-05 19:14:38 +0000: Memory Usage (9085300K) : Executing rule V3.4b
+2022-12-05 19:14:57 +0000: Memory Usage (9161284K) : Executing rule V3.4c
+2022-12-05 19:14:58 +0000: Memory Usage (9161284K) : Executing rule V4.1
+2022-12-05 19:14:58 +0000: Memory Usage (9161284K) : Executing rule V4.2a
+2022-12-05 19:14:59 +0000: Memory Usage (9161284K) : Executing rule V4.2b
+2022-12-05 19:14:59 +0000: Memory Usage (9161284K) : Executing rule V4.3b
+2022-12-05 19:15:02 +0000: Memory Usage (9177668K) : Executing rule V4.3c
+2022-12-05 19:15:04 +0000: Memory Usage (9181764K) : Executing rule V4.3d
+2022-12-05 19:15:05 +0000: Memory Usage (9203244K) : Executing rule V4.4a
+2022-12-05 19:15:06 +0000: Memory Usage (9203244K) : Executing rule V4.4b
+2022-12-05 19:15:07 +0000: Memory Usage (9207340K) : Executing rule V4.4c
+2022-12-05 19:15:07 +0000: Memory Usage (9207340K) : Executing rule V5.1
+2022-12-05 19:15:07 +0000: Memory Usage (9207340K) : Executing rule V5.2a
+2022-12-05 19:15:08 +0000: Memory Usage (9207340K) : Executing rule V5.2b
+2022-12-05 19:15:08 +0000: Memory Usage (9207340K) : Executing rule V5.3b
+2022-12-05 19:15:08 +0000: Memory Usage (9207340K) : Executing rule V5.3c
+2022-12-05 19:15:08 +0000: Memory Usage (9207340K) : Executing rule V5.3d
+2022-12-05 19:15:09 +0000: Memory Usage (9207340K) : Executing rule V5.4a
+2022-12-05 19:15:09 +0000: Memory Usage (9207340K) : Executing rule V5.4b
+2022-12-05 19:15:09 +0000: Memory Usage (9207340K) : Executing rule V5.4c
+2022-12-05 19:15:09 +0000: Memory Usage (9207340K) : MetalTop thickness 9k/11k section
+2022-12-05 19:15:10 +0000: Memory Usage (9207340K) : Executing rule MT.1
+2022-12-05 19:15:10 +0000: Memory Usage (9207340K) : Executing rule MT.2a
+2022-12-05 19:15:10 +0000: Memory Usage (9207340K) : Executing rule MT.2b
+2022-12-05 19:15:13 +0000: Memory Usage (9360128K) : Executing rule MT.4
+2022-12-05 19:15:13 +0000: Memory Usage (9360128K) : Executing rule MC.1
+2022-12-05 19:15:13 +0000: Memory Usage (9360128K) : Executing rule MC.2
+2022-12-05 19:15:13 +0000: Memory Usage (9360128K) : Executing rule MC.3
+2022-12-05 19:15:13 +0000: Memory Usage (9360128K) : Executing rule MC.4
+2022-12-05 19:15:19 +0000: Memory Usage (9381020K) : Executing rule PRES.1
+2022-12-05 19:15:20 +0000: Memory Usage (9381020K) : Executing rule PRES.2
+2022-12-05 19:15:20 +0000: Memory Usage (9381020K) : Executing rule PRES.3
+2022-12-05 19:15:20 +0000: Memory Usage (9381020K) : Executing rule PRES.4
+2022-12-05 19:15:20 +0000: Memory Usage (9381020K) : Executing rule PRES.5
+2022-12-05 19:15:20 +0000: Memory Usage (9381020K) : Executing rule PRES.6
+2022-12-05 19:15:20 +0000: Memory Usage (9381020K) : Executing rule PRES.7
+2022-12-05 19:15:27 +0000: Memory Usage (9430172K) : Executing rule PRES.9a
+2022-12-05 19:15:27 +0000: Memory Usage (9430172K) : Executing rule PRES.9b
+2022-12-05 19:15:33 +0000: Memory Usage (9450652K) : Executing rule LRES.1
+2022-12-05 19:15:33 +0000: Memory Usage (9450652K) : Executing rule LRES.2
+2022-12-05 19:15:33 +0000: Memory Usage (9450652K) : Executing rule LRES.3
+2022-12-05 19:15:33 +0000: Memory Usage (9450652K) : Executing rule LRES.4
+2022-12-05 19:15:34 +0000: Memory Usage (9450652K) : Executing rule LRES.5
+2022-12-05 19:15:46 +0000: Memory Usage (9548404K) : Executing rule LRES.6
+2022-12-05 19:15:52 +0000: Memory Usage (9602056K) : Executing rule LRES.7
+2022-12-05 19:15:58 +0000: Memory Usage (9655768K) : Executing rule LRES.9a
+2022-12-05 19:15:58 +0000: Memory Usage (9655768K) : Executing rule LRES.9b
+2022-12-05 19:16:32 +0000: Memory Usage (9948800K) : Executing rule HRES.1
+2022-12-05 19:16:32 +0000: Memory Usage (9948800K) : Executing rule HRES.2
+2022-12-05 19:16:32 +0000: Memory Usage (9948800K) : Executing rule HRES.3
+2022-12-05 19:16:32 +0000: Memory Usage (9948800K) : Executing rule HRES.4
+2022-12-05 19:16:33 +0000: Memory Usage (9948800K) : Executing rule HRES.5
+2022-12-05 19:16:33 +0000: Memory Usage (9948800K) : Executing rule HRES.6
+2022-12-05 19:16:50 +0000: Memory Usage (10084280K) : Executing rule HRES.7
+2022-12-05 19:16:50 +0000: Memory Usage (10084280K) : Executing rule HRES.8
+2022-12-05 19:16:50 +0000: Memory Usage (10084280K) : Executing rule HRES.9
+2022-12-05 19:16:51 +0000: Memory Usage (10084280K) : Executing rule HRES.10
+2022-12-05 19:16:58 +0000: Memory Usage (10084280K) : Executing rule HRES.12a
+2022-12-05 19:16:58 +0000: Memory Usage (10084280K) : Executing rule HRES.12b
+2022-12-05 19:16:58 +0000: Memory Usage (10084280K) : MIM Capacitor Option B section
+2022-12-05 19:16:58 +0000: Memory Usage (10084280K) : Executing rule MIMTM.1
+2022-12-05 19:16:58 +0000: Memory Usage (10084280K) : Executing rule MIMTM.2
+2022-12-05 19:16:58 +0000: Memory Usage (10084280K) : Executing rule MIMTM.3
+2022-12-05 19:16:59 +0000: Memory Usage (10084280K) : Executing rule MIMTM.4
+2022-12-05 19:16:59 +0000: Memory Usage (10084280K) : Executing rule MIMTM.5
+2022-12-05 19:17:00 +0000: Memory Usage (10084280K) : Executing rule MIMTM.6
+2022-12-05 19:17:00 +0000: Memory Usage (10084280K) : Executing rule MIMTM.7
+2022-12-05 19:17:00 +0000: Memory Usage (10084280K) : Executing rule MIMTM.8a
+2022-12-05 19:17:00 +0000: Memory Usage (10084280K) : Executing rule MIMTM.8b
+2022-12-05 19:17:00 +0000: Memory Usage (10084280K) : Executing rule MIMTM.9
+2022-12-05 19:17:01 +0000: Memory Usage (10084280K) : Executing rule MIMTM.10
+2022-12-05 19:17:01 +0000: Memory Usage (10084280K) : Executing rule MIMTM.11
+2022-12-05 19:17:01 +0000: Memory Usage (10084280K) : Executing rule NAT.1
+2022-12-05 19:17:04 +0000: Memory Usage (10238784K) : Executing rule NAT.2
+2022-12-05 19:17:04 +0000: Memory Usage (10238784K) : Executing rule NAT.3
+2022-12-05 19:17:04 +0000: Memory Usage (10238784K) : Executing rule NAT.4
+2022-12-05 19:17:17 +0000: Memory Usage (10336588K) : Executing rule NAT.5
+2022-12-05 19:17:30 +0000: Memory Usage (10500956K) : CONNECTIVITY_RULES section
+2022-12-05 19:17:30 +0000: Memory Usage (10500956K) : Executing rule NAT.6
+2022-12-05 19:17:30 +0000: Memory Usage (10535972K) : Executing rule NAT.7
+2022-12-05 19:17:30 +0000: Memory Usage (10535972K) : Executing rule NAT.8
+2022-12-05 19:17:31 +0000: Memory Usage (10535972K) : Executing rule NAT.9
+2022-12-05 19:17:31 +0000: Memory Usage (10535972K) : Executing rule NAT.10
+2022-12-05 19:17:31 +0000: Memory Usage (10535972K) : Executing rule NAT.11
+2022-12-05 19:17:31 +0000: Memory Usage (10535972K) : Executing rule NAT.12
+2022-12-05 19:17:31 +0000: Memory Usage (10566328K) : Executing rule BJT.1
+2022-12-05 19:17:32 +0000: Memory Usage (10566328K) : Executing rule BJT.2
+2022-12-05 19:17:40 +0000: Memory Usage (10701540K) : Executing rule BJT.3
+2022-12-05 19:17:40 +0000: Memory Usage (10701540K) : Executing rule DE.2
+2022-12-05 19:17:40 +0000: Memory Usage (10701540K) : Executing rule DE.3
+2022-12-05 19:17:41 +0000: Memory Usage (10701540K) : Executing rule DE.4
+2022-12-05 19:17:46 +0000: Memory Usage (10809960K) : Executing rule LVS_BJT.1
+2022-12-05 19:17:46 +0000: Memory Usage (10809960K) : Executing rule O.DF.3a
+2022-12-05 19:17:46 +0000: Memory Usage (10809960K) : Executing rule O.DF.6
+2022-12-05 19:17:46 +0000: Memory Usage (10809960K) : Executing rule O.DF.9
+2022-12-05 19:17:46 +0000: Memory Usage (10809960K) : Executing rule O.PL.2
+2022-12-05 19:18:04 +0000: Memory Usage (11007720K) : Executing rule O.PL.3a
+2022-12-05 19:18:32 +0000: Memory Usage (11293396K) : Executing rule O.PL.4
+2022-12-05 19:18:32 +0000: Memory Usage (11293396K) : Executing rule O.SB.2
+2022-12-05 19:18:33 +0000: Memory Usage (11293396K) : Executing rule O.SB.3
+2022-12-05 19:18:33 +0000: Memory Usage (11293396K) : Executing rule O.SB.4
+2022-12-05 19:18:33 +0000: Memory Usage (11293396K) : Executing rule O.SB.5b_3.3V
+2022-12-05 19:18:33 +0000: Memory Usage (11293396K) : Executing rule O.SB.9
+2022-12-05 19:18:33 +0000: Memory Usage (11293396K) : Executing rule O.SB.11
+2022-12-05 19:18:34 +0000: Memory Usage (11293396K) : Executing rule O.SB.13_3.3V
+2022-12-05 19:18:34 +0000: Memory Usage (11293396K) : Executing rule O.SB.13_5V
+2022-12-05 19:18:34 +0000: Memory Usage (11293396K) : Executing rule O.CO.7
+2022-12-05 19:19:29 +0000: Memory Usage (14451776K) : Executing rule O.PL.ORT
+2022-12-05 19:20:17 +0000: Memory Usage (14451776K) : Executing rule EF.01
+2022-12-05 19:20:25 +0000: Memory Usage (14451776K) : Executing rule EF.02
+2022-12-05 19:20:25 +0000: Memory Usage (14451776K) : Executing rule EF.03
+2022-12-05 19:20:30 +0000: Memory Usage (14451776K) : Executing rule EF.04a
+2022-12-05 19:20:41 +0000: Memory Usage (14451776K) : Executing rule EF.04b
+2022-12-05 19:20:41 +0000: Memory Usage (14451776K) : Executing rule EF.04c
+2022-12-05 19:20:46 +0000: Memory Usage (14451776K) : Executing rule EF.04d
+2022-12-05 19:20:46 +0000: Memory Usage (14451776K) : Executing rule EF.05
+2022-12-05 19:20:57 +0000: Memory Usage (14451776K) : Executing rule EF.06
+2022-12-05 19:20:57 +0000: Memory Usage (14451776K) : Executing rule EF.07
+2022-12-05 19:20:58 +0000: Memory Usage (14451776K) : Executing rule EF.08
+2022-12-05 19:20:58 +0000: Memory Usage (14451776K) : Executing rule EF.09
+2022-12-05 19:20:58 +0000: Memory Usage (14451776K) : Executing rule EF.10
+2022-12-05 19:20:58 +0000: Memory Usage (14451776K) : Executing rule EF.11
+2022-12-05 19:21:16 +0000: Memory Usage (14451776K) : Executing rule EF.12
+2022-12-05 19:21:18 +0000: Memory Usage (14451776K) : Executing rule EF.13
+2022-12-05 19:21:19 +0000: Memory Usage (14451776K) : Executing rule EF.14
+2022-12-05 19:21:20 +0000: Memory Usage (14451776K) : Executing rule EF.15
+2022-12-05 19:21:21 +0000: Memory Usage (14451776K) : Executing rule EF.16a
+2022-12-05 19:21:22 +0000: Memory Usage (14451776K) : Executing rule EF.16b
+2022-12-05 19:21:23 +0000: Memory Usage (14451776K) : Executing rule EF.17
+2022-12-05 19:21:23 +0000: Memory Usage (14451776K) : Executing rule EF.18
+2022-12-05 21:06:13 +0000: Memory Usage (15186992K) : Executing rule EF.19
+2022-12-05 22:35:21 +0000: Memory Usage (15186992K) : Executing rule EF.20
+2022-12-05 22:35:28 +0000: Memory Usage (15186992K) : Executing rule EF.21
+2022-12-05 22:35:28 +0000: Memory Usage (15186992K) : Executing rule EF.22a
+2022-12-05 22:35:29 +0000: Memory Usage (15186992K) : Executing rule EF.22b
+2022-12-05 22:35:29 +0000: Memory Usage (15186992K) : Executing rule MDN.1
+2022-12-05 22:35:30 +0000: Memory Usage (15186992K) : CONNECTIVITY_RULES section
+2022-12-05 22:35:30 +0000: Memory Usage (15186992K) : Executing rule MDN.2a
+2022-12-05 22:35:30 +0000: Memory Usage (15186992K) : Executing rule MDN.2b
+2022-12-05 22:35:43 +0000: Memory Usage (15186992K) : Executing rule MDN.3a
+2022-12-05 22:35:43 +0000: Memory Usage (15186992K) : Executing rule MDN.3b
+2022-12-05 22:35:44 +0000: Memory Usage (15186992K) : Executing rule MDN.4a
+2022-12-05 22:35:44 +0000: Memory Usage (15186992K) : Executing rule MDN.4b
+2022-12-05 22:35:47 +0000: Memory Usage (15186992K) : Executing rule MDN.5ai
+2022-12-05 22:35:47 +0000: Memory Usage (15186992K) : Executing rule MDN.5aii
+2022-12-05 22:35:48 +0000: Memory Usage (15186992K) : Executing rule MDN.5b
+2022-12-05 22:35:48 +0000: Memory Usage (15186992K) : Executing rule MDN.5c
+2022-12-05 22:35:48 +0000: Memory Usage (15186992K) : Executing rule MDN.6
+2022-12-05 22:36:03 +0000: Memory Usage (15186992K) : Executing rule MDN.6a
+2022-12-05 22:36:04 +0000: Memory Usage (15186992K) : Executing rule MDN.7
+2022-12-05 22:36:04 +0000: Memory Usage (15186992K) : Executing rule MDN.7a
+2022-12-05 22:36:04 +0000: Memory Usage (15186992K) : CONNECTIVITY_RULES section
+2022-12-05 22:36:04 +0000: Memory Usage (15186992K) : Executing rule MDN.8a
+2022-12-05 22:36:05 +0000: Memory Usage (15186992K) : Executing rule MDN.8b
+2022-12-05 22:36:05 +0000: Memory Usage (15186992K) : Executing rule MDN.9
+2022-12-05 22:36:31 +0000: Memory Usage (15186992K) : Executing rule MDN.10a
+2022-12-05 22:36:31 +0000: Memory Usage (15186992K) : Executing rule MDN.10b
+2022-12-05 22:36:47 +0000: Memory Usage (15186992K) : Executing rule MDN.10c
+2022-12-05 22:37:21 +0000: Memory Usage (15186992K) : Executing rule MDN.10d
+2022-12-05 22:37:22 +0000: Memory Usage (15186992K) : Executing rule MDN.10ei
+2022-12-05 22:37:32 +0000: Memory Usage (15186992K) : Executing rule MDN.10eii
+2022-12-05 22:37:38 +0000: Memory Usage (15186992K) : Executing rule MDN.10f
+2022-12-05 22:37:49 +0000: Memory Usage (15417540K) : Executing rule MDN.11
+2022-12-05 22:38:09 +0000: Memory Usage (15437356K) : Executing rule MDN.12
+2022-12-05 22:38:09 +0000: Memory Usage (15437356K) : Executing rule MDN.13a
+2022-12-05 22:38:47 +0000: Memory Usage (15643940K) : Executing rule MDN.13b
+2022-12-05 22:38:48 +0000: Memory Usage (15643940K) : Executing rule MDN.13c
+2022-12-05 22:39:17 +0000: Memory Usage (15950320K) : Executing rule MDN.13d
+2022-12-05 22:39:18 +0000: Memory Usage (15950320K) : Executing rule MDN.14
+2022-12-05 22:39:18 +0000: Memory Usage (15950320K) : Executing rule MDN.15a
+2022-12-05 22:39:18 +0000: Memory Usage (15950320K) : Executing rule MDN.15b
+2022-12-05 22:39:39 +0000: Memory Usage (16163268K) : Executing rule MDN.17
+2022-12-05 22:39:58 +0000: Memory Usage (16225232K) : Executing rule MDP.1
+2022-12-05 22:40:10 +0000: Memory Usage (16486372K) : Executing rule MDP.1a
+2022-12-05 23:01:46 +0000: Memory Usage (28421860K) : Executing rule MDP.2
+2022-12-05 23:01:59 +0000: Memory Usage (28530408K) : Executing rule MDP.3
+2022-12-05 23:02:01 +0000: Memory Usage (28530408K) : Executing rule MDP.3ai
+2022-12-05 23:02:02 +0000: Memory Usage (28530408K) : Executing rule MDP.3aii
+2022-12-05 23:02:03 +0000: Memory Usage (28530408K) : Executing rule MDP.3b
+2022-12-05 23:02:03 +0000: Memory Usage (28530408K) : Executing rule MDP.3c
+2022-12-05 23:02:03 +0000: Memory Usage (28530408K) : Executing rule MDP.3d
+2022-12-05 23:02:04 +0000: Memory Usage (28530408K) : Executing rule MDP.4
+2022-12-05 23:03:28 +0000: Memory Usage (28569092K) : Executing rule MDP.4a
+2022-12-05 23:03:28 +0000: Memory Usage (28569092K) : Executing rule MDP.4b
+2022-12-05 23:03:28 +0000: Memory Usage (28569092K) : Executing rule MDP.5
+2022-12-05 23:03:43 +0000: Memory Usage (28727996K) : Executing rule MDP.5a
+2022-12-05 23:03:43 +0000: Memory Usage (28727996K) : Executing rule MDP.6
+2022-12-05 23:03:44 +0000: Memory Usage (28727996K) : Executing rule MDP.6a
+2022-12-05 23:03:44 +0000: Memory Usage (28727996K) : Executing rule MDP.7
+2022-12-05 23:03:44 +0000: Memory Usage (28727996K) : Executing rule MDP.8
+2022-12-05 23:03:45 +0000: Memory Usage (28727996K) : Executing rule MDP.9a
+2022-12-05 23:03:46 +0000: Memory Usage (28787492K) : Executing rule MDP.9b
+2022-12-05 23:03:46 +0000: Memory Usage (28787492K) : Executing rule MDP.9c
+2022-12-05 23:03:58 +0000: Memory Usage (28950832K) : Executing rule MDP.9d
+2022-12-05 23:05:49 +0000: Memory Usage (29214276K) : Executing rule MDP.9ei
+2022-12-05 23:06:29 +0000: Memory Usage (29313948K) : Executing rule MDP.9eii
+2022-12-05 23:06:30 +0000: Memory Usage (29313948K) : Executing rule MDP.9f
+2022-12-05 23:07:08 +0000: Memory Usage (29406108K) : Executing rule MDP.10
+2022-12-05 23:07:09 +0000: Memory Usage (29406108K) : CONNECTIVITY_RULES section
+2022-12-05 23:07:09 +0000: Memory Usage (29406108K) : Executing rule MDP.10a
+2022-12-05 23:07:10 +0000: Memory Usage (29406108K) : Executing rule MDP.10b
+2022-12-05 23:07:10 +0000: Memory Usage (29406108K) : Executing rule MDP.11
+2022-12-05 23:07:11 +0000: Memory Usage (29484368K) : Executing rule MDP.12
+2022-12-05 23:07:32 +0000: Memory Usage (29519552K) : Executing rule MDP.13a
+2022-12-05 23:07:51 +0000: Memory Usage (29603524K) : Executing rule MDP.13b
+2022-12-05 23:07:51 +0000: Memory Usage (29603524K) : Executing rule MDP.13c
+2022-12-05 23:08:01 +0000: Memory Usage (29645264K) : Executing rule MDP.15
+2022-12-05 23:08:02 +0000: Memory Usage (29645264K) : Executing rule MDP.16a
+2022-12-05 23:08:02 +0000: Memory Usage (29645264K) : Executing rule MDP.16b
+2022-12-05 23:08:05 +0000: Memory Usage (29645264K) : Executing rule MDP.17a
+2022-12-05 23:08:06 +0000: Memory Usage (29645264K) : Executing rule MDP.17c
+2022-12-05 23:08:06 +0000: Memory Usage (29645264K) : Executing rule Y.NW.2b_3.3V
+2022-12-05 23:08:07 +0000: Memory Usage (29645264K) : Executing rule Y.NW.2b_5V
+2022-12-05 23:08:07 +0000: Memory Usage (29645264K) : Executing rule Y.DF.6_5V
+2022-12-05 23:08:08 +0000: Memory Usage (29680280K) : Executing rule Y.DF.16_3.3V
+2022-12-05 23:08:12 +0000: Memory Usage (29680280K) : Executing rule Y.DF.16_5V
+2022-12-05 23:08:15 +0000: Memory Usage (29686428K) : Executing rule Y.PL.1_3.3V
+2022-12-05 23:08:22 +0000: Memory Usage (29715184K) : Executing rule Y.PL.1_5V
+2022-12-05 23:08:30 +0000: Memory Usage (29745148K) : Executing rule Y.PL.2_3.3V
+2022-12-05 23:08:47 +0000: Memory Usage (29959292K) : Executing rule Y.PL.2_5V
+2022-12-05 23:09:05 +0000: Memory Usage (30157052K) : Executing rule Y.PL.4_5V
+2022-12-05 23:09:05 +0000: Memory Usage (30157052K) : Executing rule Y.PL.5a_3.3V
+2022-12-05 23:09:06 +0000: Memory Usage (30157052K) : Executing rule Y.PL.5a_5V
+2022-12-05 23:09:06 +0000: Memory Usage (30157052K) : Executing rule Y.PL.5b_3.3V
+2022-12-05 23:09:06 +0000: Memory Usage (30157052K) : Executing rule Y.PL.5b_5V
+2022-12-05 23:09:07 +0000: Memory Usage (30157052K) : Executing rule S.DF.4c_MV
+2022-12-05 23:09:07 +0000: Memory Usage (30175512K) : Executing rule S.DF.6_MV
+2022-12-05 23:09:08 +0000: Memory Usage (30175512K) : Executing rule S.DF.7_MV
+2022-12-05 23:09:08 +0000: Memory Usage (30175512K) : Executing rule S.DF.8_MV
+2022-12-05 23:09:09 +0000: Memory Usage (30175512K) : Executing rule S.DF.16_MV
+2022-12-05 23:09:12 +0000: Memory Usage (30205868K) : Executing rule S.PL.5a_MV
+2022-12-05 23:09:13 +0000: Memory Usage (30205868K) : Executing rule S.PL.5b_MV
+2022-12-05 23:09:13 +0000: Memory Usage (30205868K) : Executing rule S.CO.4_MV
+2022-12-05 23:09:13 +0000: Memory Usage (30205868K) : Executing rule S.DF.4c_LV
+2022-12-05 23:09:14 +0000: Memory Usage (30240716K) : Executing rule S.DF.16_LV
+2022-12-05 23:09:17 +0000: Memory Usage (30271072K) : Executing rule S.CO.3_LV
+2022-12-05 23:09:18 +0000: Memory Usage (30271072K) : Executing rule S.CO.4_LV
+2022-12-05 23:09:18 +0000: Memory Usage (30271072K) : Executing rule S.CO.6_ii_LV
+2022-12-05 23:09:19 +0000: Memory Usage (30271072K) : Executing rule S.M1.1_LV
+2022-12-05 23:09:19 +0000: Memory Usage (30271072K) : OFFGRID-ANGLES section
+2022-12-05 23:09:20 +0000: Memory Usage (30271072K) : Executing rule comp_OFFGRID
+2022-12-05 23:09:20 +0000: Memory Usage (30271072K) : Executing rule dnwell_OFFGRID
+2022-12-05 23:09:21 +0000: Memory Usage (30271072K) : Executing rule nwell_OFFGRID
+2022-12-05 23:09:21 +0000: Memory Usage (30271072K) : Executing rule lvpwell_OFFGRID
+2022-12-05 23:09:22 +0000: Memory Usage (30271072K) : Executing rule dualgate_OFFGRID
+2022-12-05 23:09:22 +0000: Memory Usage (30271072K) : Executing rule poly2_OFFGRID
+2022-12-05 23:09:23 +0000: Memory Usage (30271072K) : Executing rule nplus_OFFGRID
+2022-12-05 23:09:23 +0000: Memory Usage (30271072K) : Executing rule pplus_OFFGRID
+2022-12-05 23:09:24 +0000: Memory Usage (30271072K) : Executing rule sab_OFFGRID
+2022-12-05 23:09:24 +0000: Memory Usage (30271072K) : Executing rule esd_OFFGRID
+2022-12-05 23:09:25 +0000: Memory Usage (30271072K) : Executing rule contact_OFFGRID
+2022-12-05 23:09:27 +0000: Memory Usage (30271072K) : Executing rule metal1_OFFGRID
+2022-12-05 23:09:28 +0000: Memory Usage (30271072K) : Executing rule via1_OFFGRID
+2022-12-05 23:09:29 +0000: Memory Usage (30271072K) : Executing rule metal2_OFFGRID
+2022-12-05 23:09:29 +0000: Memory Usage (30271072K) : Executing rule via2_OFFGRID
+2022-12-05 23:09:30 +0000: Memory Usage (30271072K) : Executing rule metal3_OFFGRID
+2022-12-05 23:09:31 +0000: Memory Usage (30271072K) : Executing rule via3_OFFGRID
+2022-12-05 23:09:31 +0000: Memory Usage (30271072K) : Executing rule metal4_OFFGRID
+2022-12-05 23:09:32 +0000: Memory Usage (30271072K) : Executing rule via4_OFFGRID
+2022-12-05 23:09:32 +0000: Memory Usage (30271072K) : Executing rule metal5_OFFGRID
+2022-12-05 23:09:32 +0000: Memory Usage (30271072K) : Executing rule via5_OFFGRID
+2022-12-05 23:09:33 +0000: Memory Usage (30271072K) : Executing rule metaltop_OFFGRID
+2022-12-05 23:09:33 +0000: Memory Usage (30271072K) : Executing rule pad_OFFGRID
+2022-12-05 23:09:34 +0000: Memory Usage (30271072K) : Executing rule resistor_OFFGRID
+2022-12-05 23:09:34 +0000: Memory Usage (30271072K) : Executing rule fhres_OFFGRID
+2022-12-05 23:09:35 +0000: Memory Usage (30271072K) : Executing rule fusetop_OFFGRID
+2022-12-05 23:09:35 +0000: Memory Usage (30271072K) : Executing rule fusewindow_d_OFFGRID
+2022-12-05 23:09:35 +0000: Memory Usage (30271072K) : Executing rule polyfuse_OFFGRID
+2022-12-05 23:09:36 +0000: Memory Usage (30271072K) : Executing rule mvsd_OFFGRID
+2022-12-05 23:09:36 +0000: Memory Usage (30271072K) : Executing rule mvpsd_OFFGRID
+2022-12-05 23:09:37 +0000: Memory Usage (30271072K) : Executing rule nat_OFFGRID
+2022-12-05 23:09:37 +0000: Memory Usage (30271072K) : Executing rule comp_dummy_OFFGRID
+2022-12-05 23:09:38 +0000: Memory Usage (30271072K) : Executing rule poly2_dummy_OFFGRID
+2022-12-05 23:09:38 +0000: Memory Usage (30271072K) : Executing rule metal1_dummy_OFFGRID
+2022-12-05 23:09:38 +0000: Memory Usage (30271072K) : Executing rule metal2_dummy_OFFGRID
+2022-12-05 23:09:39 +0000: Memory Usage (30271072K) : Executing rule metal3_dummy_OFFGRID
+2022-12-05 23:09:39 +0000: Memory Usage (30271072K) : Executing rule metal4_dummy_OFFGRID
+2022-12-05 23:09:40 +0000: Memory Usage (30271072K) : Executing rule metal5_dummy_OFFGRID
+2022-12-05 23:09:40 +0000: Memory Usage (30271072K) : Executing rule metaltop_dummy_OFFGRID
+2022-12-05 23:09:41 +0000: Memory Usage (30271072K) : Executing rule comp_label_OFFGRID
+2022-12-05 23:09:41 +0000: Memory Usage (30271072K) : Executing rule poly2_label_OFFGRID
+2022-12-05 23:09:41 +0000: Memory Usage (30271072K) : Executing rule metal1_label_OFFGRID
+2022-12-05 23:09:42 +0000: Memory Usage (30271072K) : Executing rule metal2_label_OFFGRID
+2022-12-05 23:09:42 +0000: Memory Usage (30271072K) : Executing rule metal3_label_OFFGRID
+2022-12-05 23:09:43 +0000: Memory Usage (30271072K) : Executing rule metal4_label_OFFGRID
+2022-12-05 23:09:43 +0000: Memory Usage (30271072K) : Executing rule metal5_label_OFFGRID
+2022-12-05 23:09:44 +0000: Memory Usage (30271072K) : Executing rule metaltop_label_OFFGRID
+2022-12-05 23:09:44 +0000: Memory Usage (30271072K) : Executing rule metal1_slot_OFFGRID
+2022-12-05 23:09:44 +0000: Memory Usage (30271072K) : Executing rule metal2_slot_OFFGRID
+2022-12-05 23:09:45 +0000: Memory Usage (30271072K) : Executing rule metal3_slot_OFFGRID
+2022-12-05 23:09:45 +0000: Memory Usage (30271072K) : Executing rule metal4_slot_OFFGRID
+2022-12-05 23:09:46 +0000: Memory Usage (30271072K) : Executing rule metal5_slot_OFFGRID
+2022-12-05 23:09:46 +0000: Memory Usage (30271072K) : Executing rule metaltop_slot_OFFGRID
+2022-12-05 23:09:47 +0000: Memory Usage (30271072K) : Executing rule ubmpperi_OFFGRID
+2022-12-05 23:09:47 +0000: Memory Usage (30271072K) : Executing rule ubmparray_OFFGRID
+2022-12-05 23:09:47 +0000: Memory Usage (30271072K) : Executing rule ubmeplate_OFFGRID
+2022-12-05 23:09:48 +0000: Memory Usage (30271072K) : Executing rule schottky_diode_OFFGRID
+2022-12-05 23:09:48 +0000: Memory Usage (30271072K) : Executing rule zener_OFFGRID
+2022-12-05 23:09:49 +0000: Memory Usage (30271072K) : Executing rule res_mk_OFFGRID
+2022-12-05 23:09:49 +0000: Memory Usage (30271072K) : Executing rule opc_drc_OFFGRID
+2022-12-05 23:09:49 +0000: Memory Usage (30271072K) : Executing rule ndmy_OFFGRID
+2022-12-05 23:09:50 +0000: Memory Usage (30271072K) : Executing rule pmndmy_OFFGRID
+2022-12-05 23:09:50 +0000: Memory Usage (30271072K) : Executing rule v5_xtor_OFFGRID
+2022-12-05 23:09:51 +0000: Memory Usage (30271072K) : Executing rule cap_mk_OFFGRID
+2022-12-05 23:09:51 +0000: Memory Usage (30271072K) : Executing rule mos_cap_mk_OFFGRID
+2022-12-05 23:09:52 +0000: Memory Usage (30271072K) : Executing rule ind_mk_OFFGRID
+2022-12-05 23:09:52 +0000: Memory Usage (30271072K) : Executing rule diode_mk_OFFGRID
+2022-12-05 23:09:53 +0000: Memory Usage (30271072K) : Executing rule drc_bjt_OFFGRID
+2022-12-05 23:09:53 +0000: Memory Usage (30271072K) : Executing rule lvs_bjt_OFFGRID
+2022-12-05 23:09:53 +0000: Memory Usage (30271072K) : Executing rule mim_l_mk_OFFGRID
+2022-12-05 23:09:54 +0000: Memory Usage (30271072K) : Executing rule latchup_mk_OFFGRID
+2022-12-05 23:09:54 +0000: Memory Usage (30271072K) : Executing rule guard_ring_mk_OFFGRID
+2022-12-05 23:09:55 +0000: Memory Usage (30271072K) : Executing rule otp_mk_OFFGRID
+2022-12-05 23:09:55 +0000: Memory Usage (30271072K) : Executing rule mtpmark_OFFGRID
+2022-12-05 23:09:56 +0000: Memory Usage (30271072K) : Executing rule neo_ee_mk_OFFGRID
+2022-12-05 23:09:56 +0000: Memory Usage (30271072K) : Executing rule sramcore_OFFGRID
+2022-12-05 23:09:56 +0000: Memory Usage (30271072K) : Executing rule lvs_rf_OFFGRID
+2022-12-05 23:09:57 +0000: Memory Usage (30271072K) : Executing rule lvs_drain_OFFGRID
+2022-12-05 23:09:57 +0000: Memory Usage (30271072K) : Executing rule hvpolyrs_OFFGRID
+2022-12-05 23:09:58 +0000: Memory Usage (30271072K) : Executing rule lvs_io_OFFGRID
+2022-12-05 23:09:58 +0000: Memory Usage (30271072K) : Executing rule probe_mk_OFFGRID
+2022-12-05 23:09:58 +0000: Memory Usage (30271072K) : Executing rule esd_mk_OFFGRID
+2022-12-05 23:09:59 +0000: Memory Usage (30271072K) : Executing rule lvs_source_OFFGRID
+2022-12-05 23:09:59 +0000: Memory Usage (30271072K) : Executing rule well_diode_mk_OFFGRID
+2022-12-05 23:10:00 +0000: Memory Usage (30271072K) : Executing rule ldmos_xtor_OFFGRID
+2022-12-05 23:10:00 +0000: Memory Usage (30271072K) : Executing rule plfuse_OFFGRID
+2022-12-05 23:10:01 +0000: Memory Usage (30271072K) : Executing rule efuse_mk_OFFGRID
+2022-12-05 23:10:01 +0000: Memory Usage (30271072K) : Executing rule mcell_feol_mk_OFFGRID
+2022-12-05 23:10:01 +0000: Memory Usage (30271072K) : Executing rule ymtp_mk_OFFGRID
+2022-12-05 23:10:02 +0000: Memory Usage (30271072K) : Executing rule dev_wf_mk_OFFGRID
+2022-12-05 23:10:02 +0000: Memory Usage (30271072K) : Executing rule metal1_blk_OFFGRID
+2022-12-05 23:10:03 +0000: Memory Usage (30271072K) : Executing rule metal2_blk_OFFGRID
+2022-12-05 23:10:03 +0000: Memory Usage (30271072K) : Executing rule metal3_blk_OFFGRID
+2022-12-05 23:10:04 +0000: Memory Usage (30271072K) : Executing rule metal4_blk_OFFGRID
+2022-12-05 23:10:04 +0000: Memory Usage (30271072K) : Executing rule metal5_blk_OFFGRID
+2022-12-05 23:10:04 +0000: Memory Usage (30271072K) : Executing rule metalt_blk_OFFGRID
+2022-12-05 23:10:05 +0000: Memory Usage (30271072K) : Executing rule pr_bndry_OFFGRID
+2022-12-05 23:10:05 +0000: Memory Usage (30271072K) : Executing rule mdiode_OFFGRID
+2022-12-05 23:10:06 +0000: Memory Usage (30271072K) : Executing rule metal1_res_OFFGRID
+2022-12-05 23:10:06 +0000: Memory Usage (30271072K) : Executing rule metal2_res_OFFGRID
+2022-12-05 23:10:07 +0000: Memory Usage (30271072K) : Executing rule metal3_res_OFFGRID
+2022-12-05 23:10:07 +0000: Memory Usage (30271072K) : Executing rule metal4_res_OFFGRID
+2022-12-05 23:10:07 +0000: Memory Usage (30271072K) : Executing rule metal5_res_OFFGRID
+2022-12-05 23:10:08 +0000: Memory Usage (30271072K) : Executing rule metal6_res_OFFGRID
+2022-12-05 23:10:08 +0000: Memory Usage (30271072K) : Executing rule border_OFFGRID
+VmPeak: 30519012 kB
+VmHWM: 24532344 kB
+2022-12-05 23:10:09 +0000: Memory Usage (30271072K) : DRC Total Run time 15125.304887 seconds
diff --git a/mpw_precheck/logs/klayout_beol_check.total b/mpw_precheck/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_feol_check.log b/mpw_precheck/logs/klayout_feol_check.log
new file mode 100644
index 0000000..fd4493f
--- /dev/null
+++ b/mpw_precheck/logs/klayout_feol_check.log
@@ -0,0 +1,235 @@
+2022-12-05 17:52:11 +0000: Memory Usage (543008K) : Starting running GF180MCU Klayout DRC runset on /root/ophelia_efpga/gds/user_project_wrapper.gds
+2022-12-05 17:52:11 +0000: Memory Usage (543008K) : Ruby Version for klayout: 2.0.0
+2022-12-05 17:52:13 +0000: Memory Usage (816828K) : Loading database to memory is complete.
+2022-12-05 17:52:13 +0000: Memory Usage (816828K) : GF180MCU Klayout DRC runset output at: /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_feol_check.xml
+2022-12-05 17:52:13 +0000: Memory Usage (816828K) : Number of threads to use 4
+2022-12-05 17:52:13 +0000: Memory Usage (816828K) : flat mode is enabled.
+2022-12-05 17:52:13 +0000: Memory Usage (816828K) : Read in polygons from layers.
+2022-12-05 17:53:51 +0000: Memory Usage (2188248K) : Starting deriving base layers.
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : Evaluate switches.
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : FEOL is enabled.
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : BEOL is disabled.
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : connectivity rules are enabled.
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : METAL_TOP Selected is 9K
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : METAL_STACK Selected is 5LM
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : Wedge enabled true
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : Ball enabled true
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : Gold enabled true
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : MIM Option selected B
+/opt/checks/tech-files/gf180mcuC_mr.drc:543: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/gf180mcuC_mr.drc:463: warning: previous definition of OFFGRID was here
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : Offgrid enabled true
+2022-12-05 17:54:42 +0000: Memory Usage (3094852K) : Construct connectivity for the design.
+2022-12-05 17:55:28 +0000: Memory Usage (3094852K) : Connectivity rules enabled, Netlist object will be generated.
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : Total area of the design is 8997120.228799999 um^2.
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : Total no. of polygons in the design is 11391089
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : Initialization and base layers definition.
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : Starting GF180MCU DRC rules.
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : FEOL section
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : Executing rule DN.1
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : CONNECTIVITY_RULES section
+2022-12-05 17:57:43 +0000: Memory Usage (4486396K) : Executing rule DN.2a
+2022-12-05 17:57:44 +0000: Memory Usage (4486396K) : Executing rule DN.2b
+2022-12-05 17:57:46 +0000: Memory Usage (4486396K) : Executing rule DN.3
+2022-12-05 17:57:46 +0000: Memory Usage (4486396K) : Executing rule LPW.1_3.3V
+2022-12-05 17:57:46 +0000: Memory Usage (4486396K) : Executing rule LPW.1_5V
+2022-12-05 17:57:46 +0000: Memory Usage (4486396K) : CONNECTIVITY_RULES section
+2022-12-05 17:57:46 +0000: Memory Usage (4486396K) : Executing rule LPW.2a_3.3V
+2022-12-05 17:57:46 +0000: Memory Usage (4486396K) : Executing rule LPW.2a_5V
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.2b_3.3V
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.2b_5V
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.3_3.3V
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.3_5V
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.5_3.3V
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.5_5V
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.11
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule LPW.12
+2022-12-05 17:57:47 +0000: Memory Usage (4486396K) : Executing rule NW.1a_3.3V
+2022-12-05 17:57:48 +0000: Memory Usage (4486396K) : Executing rule NW.1a_5V
+2022-12-05 17:57:48 +0000: Memory Usage (4486396K) : Executing rule NW.1b_3.3V
+2022-12-05 17:57:48 +0000: Memory Usage (4486396K) : Executing rule NW.1b_5V
+2022-12-05 17:57:48 +0000: Memory Usage (4486396K) : CONNECTIVITY_RULES section
+2022-12-05 17:58:11 +0000: Memory Usage (4486396K) : Executing rule NW.2a_3.3V
+2022-12-05 17:58:11 +0000: Memory Usage (4486396K) : Executing rule NW.2a_5V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.2b_3.3V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.2b_5V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.3_3.3V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.3_5V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.4_3.3V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.4_5V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.5_3.3V
+2022-12-05 17:58:12 +0000: Memory Usage (4486396K) : Executing rule NW.5_5V
+2022-12-05 17:58:13 +0000: Memory Usage (4486396K) : Executing rule NW.6
+2022-12-05 17:58:13 +0000: Memory Usage (4486396K) : Executing rule DF.1a_3.3V
+2022-12-05 17:58:13 +0000: Memory Usage (4486396K) : Executing rule DF.1a_5V
+2022-12-05 17:58:14 +0000: Memory Usage (4486396K) : Executing rule DF.1c_3.3V
+2022-12-05 17:58:14 +0000: Memory Usage (4486396K) : Executing rule DF.1c_5V
+2022-12-05 17:59:02 +0000: Memory Usage (4486396K) : Executing rule DF.2a_3.3V
+2022-12-05 17:59:03 +0000: Memory Usage (4486396K) : Executing rule DF.2a_5V
+2022-12-05 17:59:15 +0000: Memory Usage (4568320K) : Executing rule DF.2b_3.3V
+2022-12-05 17:59:50 +0000: Memory Usage (5208752K) : Executing rule DF.2b_5V
+2022-12-05 18:00:23 +0000: Memory Usage (5216304K) : Executing rule DF.3a_3.3V
+2022-12-05 18:00:27 +0000: Memory Usage (5216304K) : Executing rule DF.3a_5V
+2022-12-05 18:00:54 +0000: Memory Usage (5216304K) : Executing rule DF.3b_3.3V
+2022-12-05 18:00:54 +0000: Memory Usage (5216304K) : Executing rule DF.3b_5V
+2022-12-05 18:00:54 +0000: Memory Usage (5216304K) : Executing rule DF.3c_3.3V
+2022-12-05 18:00:55 +0000: Memory Usage (5216304K) : Executing rule DF.3c_5V
+2022-12-05 18:01:01 +0000: Memory Usage (5216304K) : Executing rule DF.4a_3.3V
+2022-12-05 18:01:01 +0000: Memory Usage (5216304K) : Executing rule DF.4a_5V
+2022-12-05 18:01:01 +0000: Memory Usage (5216304K) : Executing rule DF.4b_3.3V
+2022-12-05 18:01:13 +0000: Memory Usage (5216304K) : Executing rule DF.4b_5V
+2022-12-05 18:01:24 +0000: Memory Usage (5216304K) : Executing rule DF.4c_3.3V
+2022-12-05 18:01:34 +0000: Memory Usage (5216304K) : Executing rule DF.4c_5V
+2022-12-05 18:01:43 +0000: Memory Usage (5216304K) : Executing rule DF.4d_3.3V
+2022-12-05 18:01:45 +0000: Memory Usage (5216304K) : Executing rule DF.4d_5V
+2022-12-05 18:01:46 +0000: Memory Usage (5216304K) : Executing rule DF.4e_3.3V
+2022-12-05 18:01:46 +0000: Memory Usage (5216304K) : Executing rule DF.4e_5V
+2022-12-05 18:01:47 +0000: Memory Usage (5216304K) : Executing rule DF.5_3.3V
+2022-12-05 18:01:55 +0000: Memory Usage (5280832K) : Executing rule DF.5_5V
+2022-12-05 18:02:03 +0000: Memory Usage (5294560K) : Executing rule DF.6_3.3V
+2022-12-05 18:02:09 +0000: Memory Usage (5563924K) : Executing rule DF.6_5V
+2022-12-05 18:02:16 +0000: Memory Usage (6013912K) : Executing rule DF.7_3.3V
+2022-12-05 18:02:16 +0000: Memory Usage (6013912K) : Executing rule DF.7_5V
+2022-12-05 18:02:16 +0000: Memory Usage (6013912K) : Executing rule DF.8_3.3V
+2022-12-05 18:02:16 +0000: Memory Usage (6013912K) : Executing rule DF.8_5V
+2022-12-05 18:02:17 +0000: Memory Usage (6013912K) : Executing rule DF.9_3.3V
+2022-12-05 18:02:17 +0000: Memory Usage (6013912K) : Executing rule DF.9_5V
+2022-12-05 18:02:17 +0000: Memory Usage (6013912K) : Executing rule DF.10_3.3V
+2022-12-05 18:02:17 +0000: Memory Usage (6013912K) : Executing rule DF.10_5V
+2022-12-05 18:02:18 +0000: Memory Usage (6013912K) : Executing rule DF.11_3.3V
+2022-12-05 18:02:18 +0000: Memory Usage (6013912K) : Executing rule DF.11_5V
+2022-12-05 18:02:18 +0000: Memory Usage (6013912K) : Executing rule DF.12_3.3V
+2022-12-05 18:02:36 +0000: Memory Usage (6244888K) : Executing rule DF.12_5V
+2022-12-05 18:03:07 +0000: Memory Usage (6342544K) : Executing rule DF.13_3.3V
+2022-12-05 18:04:10 +0000: Memory Usage (6339376K) : Executing rule DF.13_5V
+2022-12-05 18:04:48 +0000: Memory Usage (6339376K) : Executing rule DF.14_3.3V
+2022-12-05 18:06:08 +0000: Memory Usage (6410884K) : Executing rule DF.14_5V
+2022-12-05 18:07:04 +0000: Memory Usage (6588032K) : Executing rule DF.16_3.3V
+2022-12-05 18:07:05 +0000: Memory Usage (6588032K) : Executing rule DF.16_5V
+2022-12-05 18:07:10 +0000: Memory Usage (6650788K) : Executing rule DF.17_3.3V
+2022-12-05 18:07:10 +0000: Memory Usage (6650788K) : Executing rule DF.17_5V
+2022-12-05 18:07:10 +0000: Memory Usage (6650788K) : Executing rule DF.18_3.3V
+2022-12-05 18:07:10 +0000: Memory Usage (6650788K) : Executing rule DF.18_5V
+2022-12-05 18:07:10 +0000: Memory Usage (6650788K) : Executing rule DF.19_3.3V
+2022-12-05 18:07:11 +0000: Memory Usage (6650788K) : Executing rule DF.19_5V
+2022-12-05 18:07:11 +0000: Memory Usage (6650788K) : Executing rule DV.1
+2022-12-05 18:07:12 +0000: Memory Usage (6650788K) : Executing rule DV.2
+2022-12-05 18:07:12 +0000: Memory Usage (6650788K) : Executing rule DV.3
+2022-12-05 18:07:29 +0000: Memory Usage (6794400K) : Executing rule DV.5
+2022-12-05 18:07:37 +0000: Memory Usage (6794400K) : Executing rule DV.6
+2022-12-05 18:08:12 +0000: Memory Usage (7081596K) : Executing rule DV.7
+2022-12-05 18:08:28 +0000: Memory Usage (7081596K) : Executing rule DV.8
+2022-12-05 18:09:16 +0000: Memory Usage (7136772K) : Executing rule DV.9
+2022-12-05 18:09:34 +0000: Memory Usage (7136772K) : Executing rule PL.1_3.3V
+2022-12-05 18:09:43 +0000: Memory Usage (7265752K) : Executing rule PL.1_5V
+2022-12-05 18:09:52 +0000: Memory Usage (7346536K) : Executing rule PL.1a_3.3V
+2022-12-05 18:09:53 +0000: Memory Usage (7346536K) : Executing rule PL.1a_5V
+2022-12-05 18:09:53 +0000: Memory Usage (7346536K) : Executing rule PL.2_3.3V
+2022-12-05 18:13:02 +0000: Memory Usage (9153064K) : Executing rule PL.2_5V
+2022-12-05 18:13:02 +0000: Memory Usage (9153064K) : Executing rule PL.3a_3.3V
+2022-12-05 18:13:39 +0000: Memory Usage (9582084K) : Executing rule PL.3a_5V
+2022-12-05 18:14:16 +0000: Memory Usage (10163220K) : Executing rule PL.4_3.3V
+2022-12-05 18:14:22 +0000: Memory Usage (10571260K) : Executing rule PL.4_5V
+2022-12-05 18:14:28 +0000: Memory Usage (10661344K) : Executing rule PL.5a_3.3V
+2022-12-05 18:14:34 +0000: Memory Usage (10661344K) : Executing rule PL.5a_5V
+2022-12-05 18:14:40 +0000: Memory Usage (10743128K) : Executing rule PL.5b_3.3V
+2022-12-05 18:14:45 +0000: Memory Usage (10743128K) : Executing rule PL.5b_5V
+2022-12-05 18:15:43 +0000: Memory Usage (12024136K) : Executing rule PL.6
+2022-12-05 18:16:59 +0000: Memory Usage (14130492K) : Executing rule PL.7_3.3V
+2022-12-05 18:16:59 +0000: Memory Usage (14130492K) : Executing rule PL.7_5V
+2022-12-05 18:17:00 +0000: Memory Usage (14130492K) : Executing rule PL.9
+2022-12-05 18:17:15 +0000: Memory Usage (14242824K) : Executing rule PL.11
+2022-12-05 18:17:15 +0000: Memory Usage (14242824K) : Executing rule PL.12
+2022-12-05 18:17:47 +0000: Memory Usage (14718820K) : Executing rule NP.1
+2022-12-05 18:17:48 +0000: Memory Usage (14718820K) : Executing rule NP.2
+2022-12-05 18:17:48 +0000: Memory Usage (14718820K) : Executing rule NP.3a
+2022-12-05 18:17:59 +0000: Memory Usage (14718820K) : Executing rule NP.3bi
+2022-12-05 18:18:00 +0000: Memory Usage (14718820K) : Executing rule NP.3bii
+2022-12-05 18:18:03 +0000: Memory Usage (14718820K) : Executing rule NP.3ci
+2022-12-05 18:18:09 +0000: Memory Usage (14718820K) : Executing rule NP.3cii
+2022-12-05 18:18:11 +0000: Memory Usage (14718820K) : Executing rule NP.3d
+2022-12-05 18:18:14 +0000: Memory Usage (14735304K) : Executing rule NP.3e
+2022-12-05 18:18:17 +0000: Memory Usage (14735304K) : Executing rule NP.4a
+2022-12-05 18:18:50 +0000: Memory Usage (15252792K) : Executing rule NP.4b
+2022-12-05 18:18:53 +0000: Memory Usage (15220020K) : Executing rule NP.5a
+2022-12-05 18:19:16 +0000: Memory Usage (15474276K) : Executing rule NP.5b
+2022-12-05 18:19:31 +0000: Memory Usage (15539816K) : Executing rule NP.5ci
+2022-12-05 18:19:36 +0000: Memory Usage (15539816K) : Executing rule NP.5cii
+2022-12-05 18:19:39 +0000: Memory Usage (15539816K) : Executing rule NP.5di
+2022-12-05 18:19:46 +0000: Memory Usage (15554152K) : Executing rule NP.5dii
+2022-12-05 18:19:47 +0000: Memory Usage (15554152K) : Executing rule NP.6
+2022-12-05 18:20:31 +0000: Memory Usage (15850500K) : Executing rule NP.7
+2022-12-05 18:20:31 +0000: Memory Usage (15850500K) : Executing rule NP.8a
+2022-12-05 18:20:31 +0000: Memory Usage (15850500K) : Executing rule NP.8b
+2022-12-05 18:20:32 +0000: Memory Usage (15850500K) : Executing rule NP.9
+2022-12-05 18:20:32 +0000: Memory Usage (15850500K) : Executing rule NP.10
+2022-12-05 18:20:37 +0000: Memory Usage (15850500K) : Executing rule NP.11
+2022-12-05 18:20:38 +0000: Memory Usage (15850500K) : Executing rule NP.12
+2022-12-05 18:20:47 +0000: Memory Usage (15850500K) : Executing rule PP.1
+2022-12-05 18:20:48 +0000: Memory Usage (15850500K) : Executing rule PP.2
+2022-12-05 18:20:48 +0000: Memory Usage (15850500K) : Executing rule PP.3a
+2022-12-05 18:21:00 +0000: Memory Usage (16018512K) : Executing rule PP.3bi
+2022-12-05 18:21:01 +0000: Memory Usage (16018512K) : Executing rule PP.3bii
+2022-12-05 18:21:03 +0000: Memory Usage (16065168K) : Executing rule PP.3ci
+2022-12-05 18:21:08 +0000: Memory Usage (16113372K) : Executing rule PP.3cii
+2022-12-05 18:21:09 +0000: Memory Usage (16147716K) : Executing rule PP.3d
+2022-12-05 18:21:10 +0000: Memory Usage (16172292K) : Executing rule PP.3e
+2022-12-05 18:21:11 +0000: Memory Usage (16172292K) : Executing rule PP.4a
+2022-12-05 18:21:45 +0000: Memory Usage (16806044K) : Executing rule PP.4b
+2022-12-05 18:21:47 +0000: Memory Usage (16790056K) : Executing rule PP.5a
+2022-12-05 18:22:04 +0000: Memory Usage (17022304K) : Executing rule PP.5b
+2022-12-05 18:22:15 +0000: Memory Usage (17087844K) : Executing rule PP.5ci
+2022-12-05 18:22:17 +0000: Memory Usage (17087844K) : Executing rule PP.5cii
+2022-12-05 18:22:22 +0000: Memory Usage (17120616K) : Executing rule PP.5di
+2022-12-05 18:22:28 +0000: Memory Usage (17221888K) : Executing rule PP.5dii
+2022-12-05 18:22:33 +0000: Memory Usage (17166568K) : Executing rule PP.6
+2022-12-05 18:22:47 +0000: Memory Usage (17447204K) : Executing rule PP.7
+2022-12-05 18:22:47 +0000: Memory Usage (17447204K) : Executing rule PP.8a
+2022-12-05 18:22:47 +0000: Memory Usage (17447204K) : Executing rule PP.8b
+2022-12-05 18:22:48 +0000: Memory Usage (17447204K) : Executing rule PP.9
+2022-12-05 18:22:48 +0000: Memory Usage (17447204K) : Executing rule PP.10
+2022-12-05 18:22:54 +0000: Memory Usage (17478632K) : Executing rule PP.11
+2022-12-05 18:22:54 +0000: Memory Usage (17478632K) : Executing rule PP.12
+2022-12-05 18:23:04 +0000: Memory Usage (17639748K) : Executing rule SB.1
+2022-12-05 18:23:04 +0000: Memory Usage (17639748K) : Executing rule SB.2
+2022-12-05 18:23:04 +0000: Memory Usage (17639748K) : Executing rule SB.3
+2022-12-05 18:23:05 +0000: Memory Usage (17639748K) : Executing rule SB.4
+2022-12-05 18:23:05 +0000: Memory Usage (17639748K) : Executing rule SB.5a
+2022-12-05 18:23:31 +0000: Memory Usage (18179432K) : Executing rule SB.5b
+2022-12-05 18:23:31 +0000: Memory Usage (18179432K) : Executing rule SB.6
+2022-12-05 18:23:31 +0000: Memory Usage (18179432K) : Executing rule SB.7
+2022-12-05 18:23:32 +0000: Memory Usage (18179432K) : Executing rule SB.8
+2022-12-05 18:23:32 +0000: Memory Usage (18179432K) : Executing rule SB.9
+2022-12-05 18:23:32 +0000: Memory Usage (18179432K) : Executing rule SB.10
+2022-12-05 18:23:33 +0000: Memory Usage (18179432K) : Executing rule SB.11
+2022-12-05 18:23:33 +0000: Memory Usage (18179432K) : Executing rule SB.12
+2022-12-05 18:23:33 +0000: Memory Usage (18209756K) : Executing rule SB.13
+2022-12-05 18:23:34 +0000: Memory Usage (18209756K) : Executing rule SB.14a
+2022-12-05 18:23:46 +0000: Memory Usage (18337044K) : Executing rule SB.14b
+2022-12-05 18:23:52 +0000: Memory Usage (18391096K) : Executing rule SB.15a
+2022-12-05 18:25:09 +0000: Memory Usage (18961492K) : Executing rule SB.15b
+2022-12-05 18:25:09 +0000: Memory Usage (18961492K) : Executing rule SB.16
+2022-12-05 18:25:17 +0000: Memory Usage (19043416K) : Executing rule ESD.1
+2022-12-05 18:25:17 +0000: Memory Usage (19043416K) : Executing rule ESD.2
+2022-12-05 18:25:18 +0000: Memory Usage (19043416K) : Executing rule ESD.3a
+2022-12-05 18:25:18 +0000: Memory Usage (19043416K) : Executing rule ESD.3b
+2022-12-05 18:25:18 +0000: Memory Usage (19043416K) : Executing rule ESD.4a
+2022-12-05 18:25:19 +0000: Memory Usage (19043416K) : Executing rule ESD.4b
+2022-12-05 18:25:19 +0000: Memory Usage (19043416K) : Executing rule ESD.5a
+2022-12-05 18:25:20 +0000: Memory Usage (19043416K) : Executing rule ESD.5b
+2022-12-05 18:25:20 +0000: Memory Usage (19043416K) : Executing rule ESD.6
+2022-12-05 18:25:40 +0000: Memory Usage (19225352K) : Executing rule ESD.7
+2022-12-05 18:25:41 +0000: Memory Usage (19225352K) : Executing rule ESD.8
+2022-12-05 18:25:42 +0000: Memory Usage (19225352K) : Executing rule ESD.pl
+2022-12-05 18:25:43 +0000: Memory Usage (19292540K) : Executing rule ESD.9
+2022-12-05 18:25:43 +0000: Memory Usage (19292540K) : Executing rule ESD.10
+2022-12-05 18:25:43 +0000: Memory Usage (19292540K) : Executing rule CO.1
+2022-12-05 18:26:19 +0000: Memory Usage (20235388K) : Executing rule CO.2a
+2022-12-05 18:28:18 +0000: Memory Usage (21902996K) : Executing rule CO.2b
+2022-12-05 18:28:19 +0000: Memory Usage (21902996K) : Executing rule CO.3
+2022-12-05 18:29:10 +0000: Memory Usage (23931952K) : Executing rule CO.4
+2022-12-05 18:31:10 +0000: Memory Usage (27842620K) : Executing rule CO.5a
+2022-12-05 18:31:18 +0000: Memory Usage (27842620K) : Executing rule CO.5b
+2022-12-05 18:31:19 +0000: Memory Usage (27842620K) : Executing rule CO.6
+2022-12-05 18:42:17 +0000: Memory Usage (27842704K) : Executing rule CO.6a
+2022-12-05 18:57:52 +0000: Memory Usage (33008484K) : Executing rule CO.6b
diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.log b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
new file mode 100644
index 0000000..d0a1787
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
@@ -0,0 +1,16 @@
+"input" in: gf180mcu_density.lydrc:15
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 792.00M
+"area" in: gf180mcu_density.lydrc:17
+ Elapsed: 0.010s Memory: 792.00M
+"polygons" in: gf180mcu_density.lydrc:19
+ Polygons (raw): 900295 (flat) 646 (hierarchical)
+ Elapsed: 0.120s Memory: 804.00M
+"area" in: gf180mcu_density.lydrc:19
+ Elapsed: 0.840s Memory: 816.00M
+comp_density is Infinity
+"output" in: gf180mcu_density.lydrc:22
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.040s Memory: 816.00M
+Writing report database: /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 3.130s Memory: 795.00M
diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.total b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_offgrid_check.log b/mpw_precheck/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..f1fafc9
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.log
@@ -0,0 +1,349 @@
+2022-12-05 23:10:12 +0000: Memory Usage (543004K) : Starting running GF180MCU Klayout DRC runset on /root/ophelia_efpga/gds/user_project_wrapper.gds
+2022-12-05 23:10:12 +0000: Memory Usage (543004K) : Ruby Version for klayout: 2.0.0
+2022-12-05 23:10:14 +0000: Memory Usage (816816K) : Loading database to memory is complete.
+2022-12-05 23:10:14 +0000: Memory Usage (816816K) : GF180MCU Klayout DRC runset output at: /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_offgrid_check.xml
+2022-12-05 23:10:14 +0000: Memory Usage (816816K) : Number of threads to use 4
+2022-12-05 23:10:14 +0000: Memory Usage (816816K) : flat mode is enabled.
+2022-12-05 23:10:14 +0000: Memory Usage (816816K) : Read in polygons from layers.
+2022-12-05 23:11:52 +0000: Memory Usage (2188232K) : Starting deriving base layers.
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : Evaluate switches.
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : FEOL is disabled.
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : BEOL is disabled.
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : connectivity rules are enabled.
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : METAL_TOP Selected is 9K
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : METAL_STACK Selected is 5LM
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : Wedge enabled true
+2022-12-05 23:12:42 +0000: Memory Usage (3094820K) : Ball enabled true
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Gold enabled true
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : MIM Option selected B
+/opt/checks/tech-files/gf180mcuC_mr.drc:543: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/gf180mcuC_mr.drc:463: warning: previous definition of OFFGRID was here
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Offgrid enabled true
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Connectivity rules enabled, Netlist object will be generated.
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Total area of the design is 8997120.228799999 um^2.
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Total no. of polygons in the design is 11391089
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Initialization and base layers definition.
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Starting GF180MCU DRC rules.
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Executing rule MC.1
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Executing rule MC.2
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Executing rule MC.3
+2022-12-05 23:12:43 +0000: Memory Usage (3094820K) : Executing rule MC.4
+2022-12-05 23:12:49 +0000: Memory Usage (3094820K) : Executing rule PRES.1
+2022-12-05 23:12:49 +0000: Memory Usage (3094820K) : Executing rule PRES.2
+2022-12-05 23:12:49 +0000: Memory Usage (3094820K) : Executing rule PRES.3
+2022-12-05 23:12:49 +0000: Memory Usage (3094820K) : Executing rule PRES.4
+2022-12-05 23:12:49 +0000: Memory Usage (3094820K) : Executing rule PRES.5
+2022-12-05 23:12:50 +0000: Memory Usage (3094820K) : Executing rule PRES.6
+2022-12-05 23:12:50 +0000: Memory Usage (3094820K) : Executing rule PRES.7
+2022-12-05 23:12:56 +0000: Memory Usage (3094820K) : Executing rule PRES.9a
+2022-12-05 23:12:56 +0000: Memory Usage (3094820K) : Executing rule PRES.9b
+2022-12-05 23:13:02 +0000: Memory Usage (3094820K) : Executing rule LRES.1
+2022-12-05 23:13:02 +0000: Memory Usage (3094820K) : Executing rule LRES.2
+2022-12-05 23:13:02 +0000: Memory Usage (3094820K) : Executing rule LRES.3
+2022-12-05 23:13:02 +0000: Memory Usage (3094820K) : Executing rule LRES.4
+2022-12-05 23:13:02 +0000: Memory Usage (3094820K) : Executing rule LRES.5
+2022-12-05 23:13:14 +0000: Memory Usage (3244532K) : Executing rule LRES.6
+2022-12-05 23:13:20 +0000: Memory Usage (3298236K) : Executing rule LRES.7
+2022-12-05 23:13:26 +0000: Memory Usage (3351956K) : Executing rule LRES.9a
+2022-12-05 23:13:26 +0000: Memory Usage (3351956K) : Executing rule LRES.9b
+2022-12-05 23:14:00 +0000: Memory Usage (3496104K) : Executing rule HRES.1
+2022-12-05 23:14:00 +0000: Memory Usage (3496104K) : Executing rule HRES.2
+2022-12-05 23:14:00 +0000: Memory Usage (3496104K) : Executing rule HRES.3
+2022-12-05 23:14:00 +0000: Memory Usage (3496104K) : Executing rule HRES.4
+2022-12-05 23:14:00 +0000: Memory Usage (3496104K) : Executing rule HRES.5
+2022-12-05 23:14:00 +0000: Memory Usage (3496104K) : Executing rule HRES.6
+2022-12-05 23:14:17 +0000: Memory Usage (3631584K) : Executing rule HRES.7
+2022-12-05 23:14:18 +0000: Memory Usage (3631584K) : Executing rule HRES.8
+2022-12-05 23:14:18 +0000: Memory Usage (3631584K) : Executing rule HRES.9
+2022-12-05 23:14:18 +0000: Memory Usage (3631584K) : Executing rule HRES.10
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : Executing rule HRES.12a
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : Executing rule HRES.12b
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : MIM Capacitor Option B section
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : Executing rule MIMTM.1
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : Executing rule MIMTM.2
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : Executing rule MIMTM.3
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : Executing rule MIMTM.4
+2022-12-05 23:14:25 +0000: Memory Usage (3631584K) : Executing rule MIMTM.5
+2022-12-05 23:14:26 +0000: Memory Usage (3631584K) : Executing rule MIMTM.6
+2022-12-05 23:14:26 +0000: Memory Usage (3631584K) : Executing rule MIMTM.7
+2022-12-05 23:14:26 +0000: Memory Usage (3631584K) : Executing rule MIMTM.8a
+2022-12-05 23:14:27 +0000: Memory Usage (3631584K) : Executing rule MIMTM.8b
+2022-12-05 23:14:27 +0000: Memory Usage (3631584K) : Executing rule MIMTM.9
+2022-12-05 23:14:27 +0000: Memory Usage (3631584K) : Executing rule MIMTM.10
+2022-12-05 23:14:27 +0000: Memory Usage (3631584K) : Executing rule MIMTM.11
+2022-12-05 23:14:27 +0000: Memory Usage (3631584K) : Executing rule NAT.1
+2022-12-05 23:14:30 +0000: Memory Usage (3785976K) : Executing rule NAT.2
+2022-12-05 23:14:31 +0000: Memory Usage (3785976K) : Executing rule NAT.3
+2022-12-05 23:14:31 +0000: Memory Usage (3785976K) : Executing rule NAT.4
+2022-12-05 23:14:44 +0000: Memory Usage (3883780K) : Executing rule NAT.5
+2022-12-05 23:14:56 +0000: Memory Usage (4048148K) : CONNECTIVITY_RULES section
+2022-12-05 23:14:56 +0000: Memory Usage (4048148K) : Executing rule NAT.6
+2022-12-05 23:14:56 +0000: Memory Usage (4083164K) : Executing rule NAT.7
+2022-12-05 23:14:56 +0000: Memory Usage (4083164K) : Executing rule NAT.8
+2022-12-05 23:14:56 +0000: Memory Usage (4083164K) : Executing rule NAT.9
+2022-12-05 23:14:56 +0000: Memory Usage (4083164K) : Executing rule NAT.10
+2022-12-05 23:14:57 +0000: Memory Usage (4083164K) : Executing rule NAT.11
+2022-12-05 23:14:57 +0000: Memory Usage (4083164K) : Executing rule NAT.12
+2022-12-05 23:14:57 +0000: Memory Usage (4113488K) : Executing rule BJT.1
+2022-12-05 23:14:57 +0000: Memory Usage (4113488K) : Executing rule BJT.2
+2022-12-05 23:15:06 +0000: Memory Usage (4249072K) : Executing rule BJT.3
+2022-12-05 23:15:06 +0000: Memory Usage (4249072K) : Executing rule DE.2
+2022-12-05 23:15:06 +0000: Memory Usage (4249072K) : Executing rule DE.3
+2022-12-05 23:15:06 +0000: Memory Usage (4249072K) : Executing rule DE.4
+2022-12-05 23:15:11 +0000: Memory Usage (4357668K) : Executing rule LVS_BJT.1
+2022-12-05 23:15:11 +0000: Memory Usage (4357668K) : Executing rule O.DF.3a
+2022-12-05 23:15:12 +0000: Memory Usage (4357668K) : Executing rule O.DF.6
+2022-12-05 23:15:12 +0000: Memory Usage (4357668K) : Executing rule O.DF.9
+2022-12-05 23:15:12 +0000: Memory Usage (4357668K) : Executing rule O.PL.2
+2022-12-05 23:15:29 +0000: Memory Usage (4555428K) : Executing rule O.PL.3a
+2022-12-05 23:15:57 +0000: Memory Usage (4829292K) : Executing rule O.PL.4
+2022-12-05 23:15:57 +0000: Memory Usage (4829292K) : Executing rule O.SB.2
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.SB.3
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.SB.4
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.SB.5b_3.3V
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.SB.9
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.SB.11
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.SB.13_3.3V
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.SB.13_5V
+2022-12-05 23:15:58 +0000: Memory Usage (4829292K) : Executing rule O.CO.7
+2022-12-05 23:17:07 +0000: Memory Usage (8043652K) : Executing rule O.PL.ORT
+2022-12-05 23:17:55 +0000: Memory Usage (8043652K) : Executing rule EF.01
+2022-12-05 23:18:03 +0000: Memory Usage (8043652K) : Executing rule EF.02
+2022-12-05 23:18:03 +0000: Memory Usage (8043652K) : Executing rule EF.03
+2022-12-05 23:18:08 +0000: Memory Usage (8043652K) : Executing rule EF.04a
+2022-12-05 23:18:18 +0000: Memory Usage (8043652K) : Executing rule EF.04b
+2022-12-05 23:18:19 +0000: Memory Usage (8043652K) : Executing rule EF.04c
+2022-12-05 23:18:23 +0000: Memory Usage (8043652K) : Executing rule EF.04d
+2022-12-05 23:18:23 +0000: Memory Usage (8043652K) : Executing rule EF.05
+2022-12-05 23:18:34 +0000: Memory Usage (8043652K) : Executing rule EF.06
+2022-12-05 23:18:34 +0000: Memory Usage (8043652K) : Executing rule EF.07
+2022-12-05 23:18:35 +0000: Memory Usage (8043652K) : Executing rule EF.08
+2022-12-05 23:18:35 +0000: Memory Usage (8043652K) : Executing rule EF.09
+2022-12-05 23:18:35 +0000: Memory Usage (8043652K) : Executing rule EF.10
+2022-12-05 23:18:35 +0000: Memory Usage (8043652K) : Executing rule EF.11
+2022-12-05 23:18:53 +0000: Memory Usage (8043652K) : Executing rule EF.12
+2022-12-05 23:18:55 +0000: Memory Usage (8043652K) : Executing rule EF.13
+2022-12-05 23:18:56 +0000: Memory Usage (8043652K) : Executing rule EF.14
+2022-12-05 23:18:56 +0000: Memory Usage (8043652K) : Executing rule EF.15
+2022-12-05 23:18:57 +0000: Memory Usage (8043652K) : Executing rule EF.16a
+2022-12-05 23:18:58 +0000: Memory Usage (8043652K) : Executing rule EF.16b
+2022-12-05 23:18:59 +0000: Memory Usage (8043652K) : Executing rule EF.17
+2022-12-05 23:18:59 +0000: Memory Usage (8043652K) : Executing rule EF.18
+2022-12-06 01:03:53 +0000: Memory Usage (8739032K) : Executing rule EF.19
+2022-12-06 02:32:54 +0000: Memory Usage (8739032K) : Executing rule EF.20
+2022-12-06 02:33:01 +0000: Memory Usage (8739032K) : Executing rule EF.21
+2022-12-06 02:33:01 +0000: Memory Usage (8739032K) : Executing rule EF.22a
+2022-12-06 02:33:01 +0000: Memory Usage (8739032K) : Executing rule EF.22b
+2022-12-06 02:33:02 +0000: Memory Usage (8739032K) : Executing rule MDN.1
+2022-12-06 02:33:02 +0000: Memory Usage (8739032K) : CONNECTIVITY_RULES section
+2022-12-06 02:33:02 +0000: Memory Usage (8739032K) : Executing rule MDN.2a
+2022-12-06 02:33:02 +0000: Memory Usage (8739032K) : Executing rule MDN.2b
+2022-12-06 02:33:15 +0000: Memory Usage (8739032K) : Executing rule MDN.3a
+2022-12-06 02:33:15 +0000: Memory Usage (8739032K) : Executing rule MDN.3b
+2022-12-06 02:33:15 +0000: Memory Usage (8739032K) : Executing rule MDN.4a
+2022-12-06 02:33:15 +0000: Memory Usage (8739032K) : Executing rule MDN.4b
+2022-12-06 02:33:18 +0000: Memory Usage (8739032K) : Executing rule MDN.5ai
+2022-12-06 02:33:18 +0000: Memory Usage (8739032K) : Executing rule MDN.5aii
+2022-12-06 02:33:19 +0000: Memory Usage (8739032K) : Executing rule MDN.5b
+2022-12-06 02:33:19 +0000: Memory Usage (8739032K) : Executing rule MDN.5c
+2022-12-06 02:33:19 +0000: Memory Usage (8739032K) : Executing rule MDN.6
+2022-12-06 02:33:34 +0000: Memory Usage (8739032K) : Executing rule MDN.6a
+2022-12-06 02:33:34 +0000: Memory Usage (8739032K) : Executing rule MDN.7
+2022-12-06 02:33:34 +0000: Memory Usage (8739032K) : Executing rule MDN.7a
+2022-12-06 02:33:34 +0000: Memory Usage (8739032K) : CONNECTIVITY_RULES section
+2022-12-06 02:33:34 +0000: Memory Usage (8739032K) : Executing rule MDN.8a
+2022-12-06 02:33:35 +0000: Memory Usage (8739032K) : Executing rule MDN.8b
+2022-12-06 02:33:35 +0000: Memory Usage (8739032K) : Executing rule MDN.9
+2022-12-06 02:34:00 +0000: Memory Usage (8739032K) : Executing rule MDN.10a
+2022-12-06 02:34:00 +0000: Memory Usage (8739032K) : Executing rule MDN.10b
+2022-12-06 02:34:15 +0000: Memory Usage (8739032K) : Executing rule MDN.10c
+2022-12-06 02:34:49 +0000: Memory Usage (8739032K) : Executing rule MDN.10d
+2022-12-06 02:34:49 +0000: Memory Usage (8739032K) : Executing rule MDN.10ei
+2022-12-06 02:35:00 +0000: Memory Usage (8739032K) : Executing rule MDN.10eii
+2022-12-06 02:35:06 +0000: Memory Usage (8739032K) : Executing rule MDN.10f
+2022-12-06 02:35:16 +0000: Memory Usage (8969496K) : Executing rule MDN.11
+2022-12-06 02:35:35 +0000: Memory Usage (8989424K) : Executing rule MDN.12
+2022-12-06 02:35:35 +0000: Memory Usage (8989424K) : Executing rule MDN.13a
+2022-12-06 02:36:13 +0000: Memory Usage (9196004K) : Executing rule MDN.13b
+2022-12-06 02:36:13 +0000: Memory Usage (9196004K) : Executing rule MDN.13c
+2022-12-06 02:36:42 +0000: Memory Usage (9502380K) : Executing rule MDN.13d
+2022-12-06 02:36:42 +0000: Memory Usage (9502380K) : Executing rule MDN.14
+2022-12-06 02:36:42 +0000: Memory Usage (9502380K) : Executing rule MDN.15a
+2022-12-06 02:36:43 +0000: Memory Usage (9502380K) : Executing rule MDN.15b
+2022-12-06 02:37:03 +0000: Memory Usage (9715500K) : Executing rule MDN.17
+2022-12-06 02:37:21 +0000: Memory Usage (9777332K) : Executing rule MDP.1
+2022-12-06 02:37:33 +0000: Memory Usage (10038464K) : Executing rule MDP.1a
+2022-12-06 03:01:23 +0000: Memory Usage (21979768K) : Executing rule MDP.2
+2022-12-06 03:01:35 +0000: Memory Usage (22073980K) : Executing rule MDP.3
+2022-12-06 03:01:38 +0000: Memory Usage (22073980K) : Executing rule MDP.3ai
+2022-12-06 03:01:38 +0000: Memory Usage (22073980K) : Executing rule MDP.3aii
+2022-12-06 03:01:39 +0000: Memory Usage (22073980K) : Executing rule MDP.3b
+2022-12-06 03:01:39 +0000: Memory Usage (22073980K) : Executing rule MDP.3c
+2022-12-06 03:01:39 +0000: Memory Usage (22073980K) : Executing rule MDP.3d
+2022-12-06 03:01:40 +0000: Memory Usage (22080324K) : Executing rule MDP.4
+2022-12-06 03:03:04 +0000: Memory Usage (22138256K) : Executing rule MDP.4a
+2022-12-06 03:03:04 +0000: Memory Usage (22138256K) : Executing rule MDP.4b
+2022-12-06 03:03:04 +0000: Memory Usage (22138256K) : Executing rule MDP.5
+2022-12-06 03:03:19 +0000: Memory Usage (22285908K) : Executing rule MDP.5a
+2022-12-06 03:03:19 +0000: Memory Usage (22285908K) : Executing rule MDP.6
+2022-12-06 03:03:19 +0000: Memory Usage (22285908K) : Executing rule MDP.6a
+2022-12-06 03:03:20 +0000: Memory Usage (22285908K) : Executing rule MDP.7
+2022-12-06 03:03:20 +0000: Memory Usage (22285908K) : Executing rule MDP.8
+2022-12-06 03:03:20 +0000: Memory Usage (22285908K) : Executing rule MDP.9a
+2022-12-06 03:03:21 +0000: Memory Usage (22345404K) : Executing rule MDP.9b
+2022-12-06 03:03:22 +0000: Memory Usage (22345404K) : Executing rule MDP.9c
+2022-12-06 03:03:34 +0000: Memory Usage (22508744K) : Executing rule MDP.9d
+2022-12-06 03:05:25 +0000: Memory Usage (22772188K) : Executing rule MDP.9ei
+2022-12-06 03:06:07 +0000: Memory Usage (22871860K) : Executing rule MDP.9eii
+2022-12-06 03:06:07 +0000: Memory Usage (22871860K) : Executing rule MDP.9f
+2022-12-06 03:06:46 +0000: Memory Usage (22970164K) : Executing rule MDP.10
+2022-12-06 03:06:47 +0000: Memory Usage (22970164K) : CONNECTIVITY_RULES section
+2022-12-06 03:06:47 +0000: Memory Usage (22970164K) : Executing rule MDP.10a
+2022-12-06 03:06:47 +0000: Memory Usage (22970164K) : Executing rule MDP.10b
+2022-12-06 03:06:48 +0000: Memory Usage (22970164K) : Executing rule MDP.11
+2022-12-06 03:06:49 +0000: Memory Usage (23057944K) : Executing rule MDP.12
+2022-12-06 03:07:09 +0000: Memory Usage (23093124K) : Executing rule MDP.13a
+2022-12-06 03:07:29 +0000: Memory Usage (23175832K) : Executing rule MDP.13b
+2022-12-06 03:07:29 +0000: Memory Usage (23175832K) : Executing rule MDP.13c
+2022-12-06 03:07:39 +0000: Memory Usage (23204504K) : Executing rule MDP.15
+2022-12-06 03:07:39 +0000: Memory Usage (23204504K) : Executing rule MDP.16a
+2022-12-06 03:07:40 +0000: Memory Usage (23204504K) : Executing rule MDP.16b
+2022-12-06 03:07:43 +0000: Memory Usage (23209808K) : Executing rule MDP.17a
+2022-12-06 03:07:44 +0000: Memory Usage (23209808K) : Executing rule MDP.17c
+2022-12-06 03:07:44 +0000: Memory Usage (23209808K) : Executing rule Y.NW.2b_3.3V
+2022-12-06 03:07:44 +0000: Memory Usage (23209808K) : Executing rule Y.NW.2b_5V
+2022-12-06 03:07:45 +0000: Memory Usage (23209808K) : Executing rule Y.DF.6_5V
+2022-12-06 03:07:45 +0000: Memory Usage (23244824K) : Executing rule Y.DF.16_3.3V
+2022-12-06 03:07:49 +0000: Memory Usage (23244824K) : Executing rule Y.DF.16_5V
+2022-12-06 03:07:53 +0000: Memory Usage (23244824K) : Executing rule Y.PL.1_3.3V
+2022-12-06 03:08:00 +0000: Memory Usage (23289964K) : Executing rule Y.PL.1_5V
+2022-12-06 03:08:07 +0000: Memory Usage (23319928K) : Executing rule Y.PL.2_3.3V
+2022-12-06 03:08:25 +0000: Memory Usage (23517688K) : Executing rule Y.PL.2_5V
+2022-12-06 03:08:42 +0000: Memory Usage (23715448K) : Executing rule Y.PL.4_5V
+2022-12-06 03:08:43 +0000: Memory Usage (23715448K) : Executing rule Y.PL.5a_3.3V
+2022-12-06 03:08:43 +0000: Memory Usage (23715448K) : Executing rule Y.PL.5a_5V
+2022-12-06 03:08:44 +0000: Memory Usage (23715448K) : Executing rule Y.PL.5b_3.3V
+2022-12-06 03:08:44 +0000: Memory Usage (23715448K) : Executing rule Y.PL.5b_5V
+2022-12-06 03:08:44 +0000: Memory Usage (23715448K) : Executing rule S.DF.4c_MV
+2022-12-06 03:08:45 +0000: Memory Usage (23733912K) : Executing rule S.DF.6_MV
+2022-12-06 03:08:45 +0000: Memory Usage (23733912K) : Executing rule S.DF.7_MV
+2022-12-06 03:08:46 +0000: Memory Usage (23733912K) : Executing rule S.DF.8_MV
+2022-12-06 03:08:46 +0000: Memory Usage (23733912K) : Executing rule S.DF.16_MV
+2022-12-06 03:08:49 +0000: Memory Usage (23764268K) : Executing rule S.PL.5a_MV
+2022-12-06 03:08:50 +0000: Memory Usage (23764268K) : Executing rule S.PL.5b_MV
+2022-12-06 03:08:50 +0000: Memory Usage (23764268K) : Executing rule S.CO.4_MV
+2022-12-06 03:08:50 +0000: Memory Usage (23764268K) : Executing rule S.DF.4c_LV
+2022-12-06 03:08:51 +0000: Memory Usage (23799116K) : Executing rule S.DF.16_LV
+2022-12-06 03:08:54 +0000: Memory Usage (23829472K) : Executing rule S.CO.3_LV
+2022-12-06 03:08:55 +0000: Memory Usage (23829472K) : Executing rule S.CO.4_LV
+2022-12-06 03:08:55 +0000: Memory Usage (23829472K) : Executing rule S.CO.6_ii_LV
+2022-12-06 03:08:55 +0000: Memory Usage (23829472K) : Executing rule S.M1.1_LV
+2022-12-06 03:08:56 +0000: Memory Usage (23829472K) : OFFGRID-ANGLES section
+2022-12-06 03:08:56 +0000: Memory Usage (23829472K) : Executing rule comp_OFFGRID
+2022-12-06 03:08:57 +0000: Memory Usage (23829472K) : Executing rule dnwell_OFFGRID
+2022-12-06 03:08:57 +0000: Memory Usage (23829472K) : Executing rule nwell_OFFGRID
+2022-12-06 03:08:57 +0000: Memory Usage (23829472K) : Executing rule lvpwell_OFFGRID
+2022-12-06 03:08:58 +0000: Memory Usage (23829472K) : Executing rule dualgate_OFFGRID
+2022-12-06 03:08:58 +0000: Memory Usage (23829472K) : Executing rule poly2_OFFGRID
+2022-12-06 03:08:59 +0000: Memory Usage (23829472K) : Executing rule nplus_OFFGRID
+2022-12-06 03:08:59 +0000: Memory Usage (23829472K) : Executing rule pplus_OFFGRID
+2022-12-06 03:09:00 +0000: Memory Usage (23829472K) : Executing rule sab_OFFGRID
+2022-12-06 03:09:00 +0000: Memory Usage (23829472K) : Executing rule esd_OFFGRID
+2022-12-06 03:09:00 +0000: Memory Usage (23829472K) : Executing rule contact_OFFGRID
+2022-12-06 03:09:03 +0000: Memory Usage (23829472K) : Executing rule metal1_OFFGRID
+2022-12-06 03:09:04 +0000: Memory Usage (23829472K) : Executing rule via1_OFFGRID
+2022-12-06 03:09:05 +0000: Memory Usage (23829472K) : Executing rule metal2_OFFGRID
+2022-12-06 03:09:06 +0000: Memory Usage (23829472K) : Executing rule via2_OFFGRID
+2022-12-06 03:09:07 +0000: Memory Usage (23829472K) : Executing rule metal3_OFFGRID
+2022-12-06 03:09:08 +0000: Memory Usage (23829472K) : Executing rule via3_OFFGRID
+2022-12-06 03:09:09 +0000: Memory Usage (23829472K) : Executing rule metal4_OFFGRID
+2022-12-06 03:09:09 +0000: Memory Usage (23829472K) : Executing rule via4_OFFGRID
+2022-12-06 03:09:10 +0000: Memory Usage (23829472K) : Executing rule metal5_OFFGRID
+2022-12-06 03:09:10 +0000: Memory Usage (23829472K) : Executing rule via5_OFFGRID
+2022-12-06 03:09:10 +0000: Memory Usage (23829472K) : Executing rule metaltop_OFFGRID
+2022-12-06 03:09:11 +0000: Memory Usage (23829472K) : Executing rule pad_OFFGRID
+2022-12-06 03:09:11 +0000: Memory Usage (23829472K) : Executing rule resistor_OFFGRID
+2022-12-06 03:09:11 +0000: Memory Usage (23829472K) : Executing rule fhres_OFFGRID
+2022-12-06 03:09:12 +0000: Memory Usage (23829472K) : Executing rule fusetop_OFFGRID
+2022-12-06 03:09:12 +0000: Memory Usage (23829472K) : Executing rule fusewindow_d_OFFGRID
+2022-12-06 03:09:12 +0000: Memory Usage (23829472K) : Executing rule polyfuse_OFFGRID
+2022-12-06 03:09:13 +0000: Memory Usage (23829472K) : Executing rule mvsd_OFFGRID
+2022-12-06 03:09:13 +0000: Memory Usage (23829472K) : Executing rule mvpsd_OFFGRID
+2022-12-06 03:09:13 +0000: Memory Usage (23829472K) : Executing rule nat_OFFGRID
+2022-12-06 03:09:14 +0000: Memory Usage (23829472K) : Executing rule comp_dummy_OFFGRID
+2022-12-06 03:09:14 +0000: Memory Usage (23829472K) : Executing rule poly2_dummy_OFFGRID
+2022-12-06 03:09:15 +0000: Memory Usage (23829472K) : Executing rule metal1_dummy_OFFGRID
+2022-12-06 03:09:15 +0000: Memory Usage (23829472K) : Executing rule metal2_dummy_OFFGRID
+2022-12-06 03:09:15 +0000: Memory Usage (23829472K) : Executing rule metal3_dummy_OFFGRID
+2022-12-06 03:09:16 +0000: Memory Usage (23829472K) : Executing rule metal4_dummy_OFFGRID
+2022-12-06 03:09:16 +0000: Memory Usage (23829472K) : Executing rule metal5_dummy_OFFGRID
+2022-12-06 03:09:16 +0000: Memory Usage (23829472K) : Executing rule metaltop_dummy_OFFGRID
+2022-12-06 03:09:17 +0000: Memory Usage (23829472K) : Executing rule comp_label_OFFGRID
+2022-12-06 03:09:17 +0000: Memory Usage (23829472K) : Executing rule poly2_label_OFFGRID
+2022-12-06 03:09:17 +0000: Memory Usage (23829472K) : Executing rule metal1_label_OFFGRID
+2022-12-06 03:09:18 +0000: Memory Usage (23829472K) : Executing rule metal2_label_OFFGRID
+2022-12-06 03:09:18 +0000: Memory Usage (23829472K) : Executing rule metal3_label_OFFGRID
+2022-12-06 03:09:18 +0000: Memory Usage (23829472K) : Executing rule metal4_label_OFFGRID
+2022-12-06 03:09:19 +0000: Memory Usage (23829472K) : Executing rule metal5_label_OFFGRID
+2022-12-06 03:09:19 +0000: Memory Usage (23829472K) : Executing rule metaltop_label_OFFGRID
+2022-12-06 03:09:19 +0000: Memory Usage (23829472K) : Executing rule metal1_slot_OFFGRID
+2022-12-06 03:09:20 +0000: Memory Usage (23829472K) : Executing rule metal2_slot_OFFGRID
+2022-12-06 03:09:20 +0000: Memory Usage (23829472K) : Executing rule metal3_slot_OFFGRID
+2022-12-06 03:09:20 +0000: Memory Usage (23829472K) : Executing rule metal4_slot_OFFGRID
+2022-12-06 03:09:21 +0000: Memory Usage (23829472K) : Executing rule metal5_slot_OFFGRID
+2022-12-06 03:09:21 +0000: Memory Usage (23829472K) : Executing rule metaltop_slot_OFFGRID
+2022-12-06 03:09:22 +0000: Memory Usage (23829472K) : Executing rule ubmpperi_OFFGRID
+2022-12-06 03:09:22 +0000: Memory Usage (23829472K) : Executing rule ubmparray_OFFGRID
+2022-12-06 03:09:22 +0000: Memory Usage (23829472K) : Executing rule ubmeplate_OFFGRID
+2022-12-06 03:09:23 +0000: Memory Usage (23829472K) : Executing rule schottky_diode_OFFGRID
+2022-12-06 03:09:23 +0000: Memory Usage (23829472K) : Executing rule zener_OFFGRID
+2022-12-06 03:09:23 +0000: Memory Usage (23829472K) : Executing rule res_mk_OFFGRID
+2022-12-06 03:09:24 +0000: Memory Usage (23829472K) : Executing rule opc_drc_OFFGRID
+2022-12-06 03:09:24 +0000: Memory Usage (23829472K) : Executing rule ndmy_OFFGRID
+2022-12-06 03:09:24 +0000: Memory Usage (23829472K) : Executing rule pmndmy_OFFGRID
+2022-12-06 03:09:25 +0000: Memory Usage (23829472K) : Executing rule v5_xtor_OFFGRID
+2022-12-06 03:09:25 +0000: Memory Usage (23829472K) : Executing rule cap_mk_OFFGRID
+2022-12-06 03:09:25 +0000: Memory Usage (23829472K) : Executing rule mos_cap_mk_OFFGRID
+2022-12-06 03:09:26 +0000: Memory Usage (23829472K) : Executing rule ind_mk_OFFGRID
+2022-12-06 03:09:26 +0000: Memory Usage (23829472K) : Executing rule diode_mk_OFFGRID
+2022-12-06 03:09:27 +0000: Memory Usage (23829472K) : Executing rule drc_bjt_OFFGRID
+2022-12-06 03:09:27 +0000: Memory Usage (23829472K) : Executing rule lvs_bjt_OFFGRID
+2022-12-06 03:09:27 +0000: Memory Usage (23829472K) : Executing rule mim_l_mk_OFFGRID
+2022-12-06 03:09:28 +0000: Memory Usage (23829472K) : Executing rule latchup_mk_OFFGRID
+2022-12-06 03:09:28 +0000: Memory Usage (23829472K) : Executing rule guard_ring_mk_OFFGRID
+2022-12-06 03:09:28 +0000: Memory Usage (23829472K) : Executing rule otp_mk_OFFGRID
+2022-12-06 03:09:29 +0000: Memory Usage (23829472K) : Executing rule mtpmark_OFFGRID
+2022-12-06 03:09:29 +0000: Memory Usage (23829472K) : Executing rule neo_ee_mk_OFFGRID
+2022-12-06 03:09:29 +0000: Memory Usage (23829472K) : Executing rule sramcore_OFFGRID
+2022-12-06 03:09:30 +0000: Memory Usage (23829472K) : Executing rule lvs_rf_OFFGRID
+2022-12-06 03:09:30 +0000: Memory Usage (23829472K) : Executing rule lvs_drain_OFFGRID
+2022-12-06 03:09:30 +0000: Memory Usage (23829472K) : Executing rule hvpolyrs_OFFGRID
+2022-12-06 03:09:31 +0000: Memory Usage (23829472K) : Executing rule lvs_io_OFFGRID
+2022-12-06 03:09:31 +0000: Memory Usage (23829472K) : Executing rule probe_mk_OFFGRID
+2022-12-06 03:09:31 +0000: Memory Usage (23829472K) : Executing rule esd_mk_OFFGRID
+2022-12-06 03:09:32 +0000: Memory Usage (23829472K) : Executing rule lvs_source_OFFGRID
+2022-12-06 03:09:32 +0000: Memory Usage (23829472K) : Executing rule well_diode_mk_OFFGRID
+2022-12-06 03:09:33 +0000: Memory Usage (23829472K) : Executing rule ldmos_xtor_OFFGRID
+2022-12-06 03:09:33 +0000: Memory Usage (23829472K) : Executing rule plfuse_OFFGRID
+2022-12-06 03:09:33 +0000: Memory Usage (23829472K) : Executing rule efuse_mk_OFFGRID
+2022-12-06 03:09:34 +0000: Memory Usage (23829472K) : Executing rule mcell_feol_mk_OFFGRID
+2022-12-06 03:09:34 +0000: Memory Usage (23829472K) : Executing rule ymtp_mk_OFFGRID
+2022-12-06 03:09:34 +0000: Memory Usage (23829472K) : Executing rule dev_wf_mk_OFFGRID
+2022-12-06 03:09:35 +0000: Memory Usage (23829472K) : Executing rule metal1_blk_OFFGRID
+2022-12-06 03:09:35 +0000: Memory Usage (23829472K) : Executing rule metal2_blk_OFFGRID
+2022-12-06 03:09:35 +0000: Memory Usage (23829472K) : Executing rule metal3_blk_OFFGRID
+2022-12-06 03:09:36 +0000: Memory Usage (23829472K) : Executing rule metal4_blk_OFFGRID
+2022-12-06 03:09:36 +0000: Memory Usage (23829472K) : Executing rule metal5_blk_OFFGRID
+2022-12-06 03:09:36 +0000: Memory Usage (23829472K) : Executing rule metalt_blk_OFFGRID
+2022-12-06 03:09:37 +0000: Memory Usage (23829472K) : Executing rule pr_bndry_OFFGRID
+2022-12-06 03:09:37 +0000: Memory Usage (23829472K) : Executing rule mdiode_OFFGRID
+2022-12-06 03:09:37 +0000: Memory Usage (23829472K) : Executing rule metal1_res_OFFGRID
+2022-12-06 03:09:38 +0000: Memory Usage (23829472K) : Executing rule metal2_res_OFFGRID
+2022-12-06 03:09:38 +0000: Memory Usage (23829472K) : Executing rule metal3_res_OFFGRID
+2022-12-06 03:09:39 +0000: Memory Usage (23829472K) : Executing rule metal4_res_OFFGRID
+2022-12-06 03:09:39 +0000: Memory Usage (23829472K) : Executing rule metal5_res_OFFGRID
+2022-12-06 03:09:39 +0000: Memory Usage (23829472K) : Executing rule metal6_res_OFFGRID
+2022-12-06 03:09:40 +0000: Memory Usage (23829472K) : Executing rule border_OFFGRID
+VmPeak: 24076920 kB
+VmHWM: 19081960 kB
+2022-12-06 03:09:40 +0000: Memory Usage (23829472K) : DRC Total Run time 14368.276410 seconds
diff --git a/mpw_precheck/logs/klayout_offgrid_check.total b/mpw_precheck/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/pdks.info b/mpw_precheck/logs/pdks.info
new file mode 100644
index 0000000..375c57b
--- /dev/null
+++ b/mpw_precheck/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 120b0bd69c745825a0b8b76f364043a1cd08bb6a
+GF180MCUC PDK a897aa30369d3bcec87d9d50ce9b01f320f854ef
\ No newline at end of file
diff --git a/mpw_precheck/logs/precheck.log b/mpw_precheck/logs/precheck.log
new file mode 100644
index 0000000..23908a8
--- /dev/null
+++ b/mpw_precheck/logs/precheck.log
@@ -0,0 +1,45 @@
+2022-12-05 17:51:19 - [INFO] - {{Project Git Info}} Repository: https://github.com/egorxe/ophelia_fpga_openmpw.git | Branch: main | Commit: 4b407974710e71322cb6270d812c2b44b3e13cbb
+2022-12-05 17:51:19 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: ophelia_efpga
+2022-12-05 17:51:20 - [INFO] - {{Project Type Info}} digital
+2022-12-05 17:51:20 - [INFO] - {{Project GDS Info}} user_project_wrapper: a5b78e1dee205485a829ba28cdd3753d8636ecf7
+2022-12-05 17:51:21 - [INFO] - {{Tools Info}} KLayout: v0.27.12 | Magic: v8.3.340
+2022-12-05 17:51:21 - [INFO] - {{PDKs Info}} GF180MCUC: a897aa30369d3bcec87d9d50ce9b01f320f854ef | Open PDKs: 120b0bd69c745825a0b8b76f364043a1cd08bb6a
+2022-12-05 17:51:21 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in 'ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs'
+2022-12-05 17:51:21 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, GPIO-Defines, XOR, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density]
+2022-12-05 17:51:21 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 7: License
+2022-12-05 17:51:22 - [INFO] - An approved LICENSE (Apache-2.0) was found in ophelia_efpga.
+2022-12-05 17:51:22 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-12-05 17:51:22 - [INFO] - An approved LICENSE (Apache-2.0) was found in ophelia_efpga.
+2022-12-05 17:51:22 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-12-05 17:51:23 - [WARNING] - {{SPDX COMPLIANCE CHECK FAILED}} Found 16 non-compliant file(s) with the SPDX Standard.
+2022-12-05 17:51:23 - [INFO] - SPDX COMPLIANCE: NON-COMPLIANT FILE(S) PREVIEW: ['ophelia_efpga/openlane/config.tcl', 'ophelia_efpga/openlane/user_project_wrapper.sdc', 'ophelia_efpga/openlane/efuse_ctrl/config.tcl', 'ophelia_efpga/openlane/fpga_struct_block/config.tcl', 'ophelia_efpga/openlane/fpga_struct_block/fpga_struct_block.sdc', 'ophelia_efpga/sdf/efuse_ctrl.sdf', 'ophelia_efpga/sdf/fpga_struct_block.sdf', 'ophelia_efpga/sdf/user_project_wrapper.sdf', 'ophelia_efpga/verilog/includes/includes.gl+sdf.caravel_user_project', 'ophelia_efpga/verilog/includes/includes.gl.caravel_user_project', 'ophelia_efpga/verilog/includes/includes.rtl.caravel_user_project', 'ophelia_efpga/verilog/rtl/ariel_fpga_top_fromvhdl.v', 'ophelia_efpga/verilog/rtl/fpga_tech.v', 'ophelia_efpga/verilog/rtl/efuse_ctrl/efuse_array_fromvhdl.v', 'ophelia_efpga/verilog/rtl/fpga_struct_block/fpga_struct_block_fromvhdl.v']
+2022-12-05 17:51:23 - [INFO] - For the full SPDX compliance report check: ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs/spdx_compliance_report.log
+2022-12-05 17:51:23 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 7: GPIO-Defines
+2022-12-05 17:51:23 - [INFO] - GPIO-DEFINES: Checking verilog/rtl/user_defines.v, parsing files: ['/opt/checks/gpio_defines_check/verilog_assets/gpio_modes_base.v', 'ophelia_efpga/verilog/rtl/user_defines.v', '/opt/checks/gpio_defines_check/verilog_assets/gpio_modes_observe.v']
+2022-12-05 17:51:24 - [INFO] - GPIO-DEFINES report path: ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/gpio_defines.report
+2022-12-05 17:51:24 - [INFO] - {{GPIO-DEFINES CHECK PASSED}} The user verilog/rtl/user_defines.v is valid.
+2022-12-05 17:51:24 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 7: XOR
+2022-12-05 17:52:11 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/user_project_wrapper.xor.gds
+2022-12-05 17:52:11 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-12-05 17:52:11 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 7: Klayout FEOL
+2022-12-05 17:52:11 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-05 17:52:11 - [INFO] - run: klayout -b -r /opt/checks/tech-files/gf180mcuC_mr.drc -rd input=ophelia_efpga/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_feol_check.xml -rd feol=true -rd metal_top=9K -rd mim_option=B -rd metal_level=5LM -rd conn_drc=true >& ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs/klayout_feol_check.log
+2022-12-05 18:58:03 - [ERROR] - ERROR klayout_feol FAILED, stat=-9, see ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs/klayout_feol_check.log
+2022-12-05 18:58:03 - [WARNING] - {{Klayout FEOL CHECK FAILED}} The GDS file, user_project_wrapper.gds, has DRC violations.
+2022-12-05 18:58:03 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 7: Klayout BEOL
+2022-12-05 18:58:03 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-05 18:58:03 - [INFO] - run: klayout -b -r /opt/checks/tech-files/gf180mcuC_mr.drc -rd input=ophelia_efpga/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_beol_check.xml -rd beol=true -rd metal_top=9K -rd mim_option=B -rd metal_level=5LM -rd conn_drc=true >& ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs/klayout_beol_check.log
+2022-12-05 23:10:11 - [INFO] - No DRC Violations found
+2022-12-05 23:10:11 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-05 23:10:11 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 7: Klayout Offgrid
+2022-12-05 23:10:11 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-05 23:10:11 - [INFO] - run: klayout -b -r /opt/checks/tech-files/gf180mcuC_mr.drc -rd input=ophelia_efpga/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_offgrid_check.xml -rd offgrid=true -rd metal_top=9K -rd mim_option=B -rd metal_level=5LM -rd conn_drc=true >& ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs/klayout_offgrid_check.log
+2022-12-06 03:09:42 - [INFO] - No DRC Violations found
+2022-12-06 03:09:42 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-06 03:09:42 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 7: Klayout Metal Minimum Clear Area Density
+2022-12-06 03:09:42 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-06 03:09:42 - [INFO] - run: klayout -b -r /opt/checks/drc_checks/klayout/gf180mcu_density.lydrc -rd input=ophelia_efpga/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/reports/klayout_met_min_ca_density_check.xml >& ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs/klayout_met_min_ca_density_check.log
+2022-12-06 03:09:46 - [INFO] - No DRC Violations found
+2022-12-06 03:09:46 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-06 03:09:46 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in 'ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/logs'
+2022-12-06 03:09:46 - [CRITICAL] - {{FAILURE}} 1 Check(s) Failed: ['Klayout FEOL'] !!!
diff --git a/mpw_precheck/logs/spdx_compliance_report.log b/mpw_precheck/logs/spdx_compliance_report.log
new file mode 100644
index 0000000..0b1d742
--- /dev/null
+++ b/mpw_precheck/logs/spdx_compliance_report.log
@@ -0,0 +1,16 @@
+/root/ophelia_efpga/openlane/config.tcl
+/root/ophelia_efpga/openlane/user_project_wrapper.sdc
+/root/ophelia_efpga/openlane/efuse_ctrl/config.tcl
+/root/ophelia_efpga/openlane/fpga_struct_block/config.tcl
+/root/ophelia_efpga/openlane/fpga_struct_block/fpga_struct_block.sdc
+/root/ophelia_efpga/sdf/efuse_ctrl.sdf
+/root/ophelia_efpga/sdf/fpga_struct_block.sdf
+/root/ophelia_efpga/sdf/user_project_wrapper.sdf
+/root/ophelia_efpga/verilog/includes/includes.gl+sdf.caravel_user_project
+/root/ophelia_efpga/verilog/includes/includes.gl.caravel_user_project
+/root/ophelia_efpga/verilog/includes/includes.rtl.caravel_user_project
+/root/ophelia_efpga/verilog/rtl/ariel_fpga_top_fromvhdl.v
+/root/ophelia_efpga/verilog/rtl/fpga_tech.v
+/root/ophelia_efpga/verilog/rtl/efuse_ctrl/efuse_array_fromvhdl.v
+/root/ophelia_efpga/verilog/rtl/fpga_struct_block/fpga_struct_block_fromvhdl.v
+/root/ophelia_efpga/verilog/rtl/fpga_struct_block/fpga_tech.v
diff --git a/mpw_precheck/logs/tools.info b/mpw_precheck/logs/tools.info
new file mode 100644
index 0000000..4056146
--- /dev/null
+++ b/mpw_precheck/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.12
+Magic: 8.3.340
\ No newline at end of file
diff --git a/mpw_precheck/logs/xor_check.log b/mpw_precheck/logs/xor_check.log
new file mode 100644
index 0000000..f7bb88a
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.log
@@ -0,0 +1,952 @@
+Reading file /root/ophelia_efpga/gds/user_project_wrapper.gds for cell user_project_wrapper
+dbu=0.001
+cell user_project_wrapper dbu-bbox(ll;ur)=(-9580,-8220;2989900,2991340)
+cell user_project_wrapper dbu-bbox(left,bottom,right,top)=(-9580,-8220,2989900,2991340)
+cell user_project_wrapper dbu-size(width,height)=(2999480,2999560)
+cell user_project_wrapper micron-bbox(left,bottom,right,top)=(-9.58,-8.22,2989.9,2991.34)
+cell user_project_wrapper micron-size(width,height)=(2999.48,2999.56)
+Done.
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology gf180mcuC ...
+10 Magic internal units = 1 Lambda
+Input style import: scaleFactor=10, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ obsactive mvobsactive filldiff fillpoly m1hole obsm1 fillm1 obsv1 m2hole obsm2 fillm2 obsv2 m3hole obsm3 fillm3 m4hole obsm4 fillm4 m5hole obsm5 fillm5 glass fillblock lvstext obscomment
+Scaled tech values by 10 / 1 to match internal grid scaling
+Loading gf180mcuC Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box_gf180mcu.tcl" from command line.
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+The current style is "import".
+The CIF input styles are: import.
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "gf180mcu_fd_sc_mcu7t5v0__fill_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__endcap".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Reading "gf180mcu_fd_sc_mcu7t5v0__filltie".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_64".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_32".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_16".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_8".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__antenna".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fill_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_3".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_3.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_3.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_3.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_3.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffq_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyb_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyb_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyb_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyb_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyb_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyd_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyc_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyc_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyc_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyc_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyc_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux4_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__tiel".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand3_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai211_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai21_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__or2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_8".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_8.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_8.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_8.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_8.
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi22_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi21_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and3_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffrnq_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_8".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_8.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_8.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_8.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_8.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_3".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_3.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_3.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_3.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_3.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_16".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor3_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand3_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand2_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand2_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__inv_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Reading "fpga_struct_block".
+ 5000 uses
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai21_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux4_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai22_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai22_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai22_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai22_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai22_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyd_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dlyd_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_3".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_3.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_3.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_3.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_3.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_8".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai32_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai32_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai32_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai32_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai32_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__or4_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor4_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor2_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi211_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi211_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor3_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and4_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi21_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai21_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor2_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and3_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi21_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux2_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi221_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__or2_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi22_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor3_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__inv_3".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_3.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_3.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_3.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_3.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai211_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai211_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi211_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi221_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__tieh".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__tieh.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tieh.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tieh.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tieh.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi22_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai221_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffsnq_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dffsnq_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffsnq_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffsnq_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffsnq_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi221_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand3_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai221_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai221_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffrnq_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffq_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux4_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux4_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__inv_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai31_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai31_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Reading "efuse_array".
+CIF file read warning: CIF style import: units rescaled by factor of 5 / 1
+Error while reading cell "efuse_array" (byte position 7865176): Unknown layer/datatype in boundary, layer=80 type=5
+Error while reading cell "efuse_array" (byte position 7892824): Unknown layer/datatype in boundary, layer=100 type=8
+Error while reading cell "efuse_array" (byte position 7901016): Unknown layer/datatype in boundary, layer=125 type=5
+Error while reading cell "efuse_array" (byte position 7952204): Warning: Cell efuse_array boundary was redefined.
+Error while reading cell "efuse_array" (byte position 7952204): Warning: Cell efuse_array boundary was redefined.
+Error while reading cell "efuse_array" (byte position 7952204): Warning: Cell efuse_array boundary was redefined.
+Error while reading cell "efuse_array" (byte position 7952204): Warning: Cell efuse_array boundary was redefined.
+Error while reading cell "efuse_array" (byte position 7952204): Warning: Cell efuse_array boundary was redefined.
+Error while reading cell "efuse_array" (byte position 7952204): Warning: Cell efuse_array boundary was redefined.
+Error while reading cell "efuse_array" (byte position 7952204): Warning: Cell efuse_array boundary was redefined.
+Reading "efuse_ctrl".
+ 5000 uses
+ 10000 uses
+ 15000 uses
+ 20000 uses
+ 25000 uses
+ 30000 uses
+ 35000 uses
+ 40000 uses
+ 45000 uses
+ 50000 uses
+ 55000 uses
+ 60000 uses
+ 65000 uses
+ 70000 uses
+ 75000 uses
+ 80000 uses
+ 85000 uses
+ 90000 uses
+ 95000 uses
+ 100000 uses
+ 105000 uses
+ 110000 uses
+Reading "user_project_wrapper".
+ 5000 uses
+ 10000 uses
+ 15000 uses
+ 20000 uses
+ 25000 uses
+ 30000 uses
+ 35000 uses
+ 40000 uses
+ 45000 uses
+ 50000 uses
+ 55000 uses
+ 60000 uses
+ 65000 uses
+ 70000 uses
+ 75000 uses
+ 80000 uses
+ 85000 uses
+ 90000 uses
+ 95000 uses
+ 100000 uses
+ 105000 uses
+ 110000 uses
+ 115000 uses
+ 120000 uses
+ 125000 uses
+ 130000 uses
+ 135000 uses
+ 140000 uses
+ 145000 uses
+ 150000 uses
+ 155000 uses
+ 160000 uses
+ 165000 uses
+ 170000 uses
+ 175000 uses
+ 180000 uses
+ 185000 uses
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 9.580 x 2980.200 (-9.580, 0.000), ( 0.000, 2980.200) 28550.314
+lambda: 191.60 x 59604.00 (-191.60, 0.00 ), ( 0.00, 59604.00) 11420127.00
+internal: 1916 x 596040 ( -1916, 0 ), ( 0, 596040) 1142012640
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 9.700 x 2980.200 ( 2980.200, 0.000), ( 2989.900, 2980.200) 28907.938
+lambda: 194.00 x 59604.00 ( 59604.00, 0.00 ), ( 59798.00, 59604.00) 11563176.00
+internal: 1940 x 596040 ( 596040, 0 ), ( 597980, 596040) 1156317600
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 2999.480 x 8.220 (-9.580, -8.220), ( 2989.900, 0.000) 24655.725
+lambda: 59989.60 x 164.40 (-191.60, -164.40), ( 59798.00, 0.00 ) 9862291.00
+internal: 599896 x 1644 ( -1916, -1644 ), ( 597980, 0 ) 986229024
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 2999.480 x 11.140 (-9.580, 2980.200), ( 2989.900, 2991.340) 33414.207
+lambda: 59989.60 x 222.80 (-191.60, 59604.00), ( 59798.00, 59826.80) 13365683.00
+internal: 599896 x 2228 ( -1916, 596040), ( 597980, 598268) 1336568288
+ Generating output for cell xor_target
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology gf180mcuC ...
+10 Magic internal units = 1 Lambda
+Input style import: scaleFactor=10, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ obsactive mvobsactive filldiff fillpoly m1hole obsm1 fillm1 obsv1 m2hole obsm2 fillm2 obsv2 m3hole obsm3 fillm3 m4hole obsm4 fillm4 m5hole obsm5 fillm5 glass fillblock lvstext obscomment
+Scaled tech values by 10 / 1 to match internal grid scaling
+Loading gf180mcuC Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box_gf180mcu.tcl" from command line.
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+The current style is "import".
+The CIF input styles are: import.
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "gf180mcu_fd_sc_mcu7t5v0__tiel".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__tiel.
+Reading "gf180mcu_fd_sc_mcu7t5v0__filltie".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__filltie.
+Reading "gf180mcu_fd_sc_mcu7t5v0__endcap".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__endcap.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fill_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fill_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fill_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_32".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_16".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_8".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__antenna".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__antenna.
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_64".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffq_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffq_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__dffq_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux2_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__mux2_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__inv_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__inv_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand3_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand3_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_16".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+Reading "gf180mcu_fd_sc_mcu7t5v0__xor2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__xor2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__xor2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__xor2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__xor2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi21_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and3_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and3_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and4_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai21_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai21_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai31_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai31_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__xnor2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__xnor2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__xnor2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__xnor2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__xnor2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nand4_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor4_4".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_4.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__buf_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai211_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__oai211_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi22_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi22_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__or2_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or2_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor3_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor3_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__and4_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__and4_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__or3_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__or3_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or3_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or3_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or3_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi211_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi211_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi221_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi221_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi222_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi222_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi222_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi222_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__aoi222_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor4_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__or4_1".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_1.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_1.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_1.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__or4_1.
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor4_2".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_2.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_2.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_2.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__nor4_2.
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_8".
+Moving label "& Vendor GLOBALFOUNDRIES" from space to nwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Moving label "& Product GF018hv5v_mcu_sc7" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Moving label "& Version 2015q2v1" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Moving label "& Metric 1.00" from space to pwell in cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.
+Reading "user_proj_example".
+ 5000 uses
+ 10000 uses
+ 15000 uses
+Reading "user_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 9.580 x 2980.200 (-9.580, 0.000), ( 0.000, 2980.200) 28550.314
+lambda: 191.60 x 59604.00 (-191.60, 0.00 ), ( 0.00, 59604.00) 11420127.00
+internal: 1916 x 596040 ( -1916, 0 ), ( 0, 596040) 1142012640
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 9.700 x 2980.200 ( 2980.200, 0.000), ( 2989.900, 2980.200) 28907.938
+lambda: 194.00 x 59604.00 ( 59604.00, 0.00 ), ( 59798.00, 59604.00) 11563176.00
+internal: 1940 x 596040 ( 596040, 0 ), ( 597980, 596040) 1156317600
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 2999.480 x 8.220 (-9.580, -8.220), ( 2989.900, 0.000) 24655.725
+lambda: 59989.60 x 164.40 (-191.60, -164.40), ( 59798.00, 0.00 ) 9862291.00
+internal: 599896 x 1644 ( -1916, -1644 ), ( 597980, 0 ) 986229024
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 2999.480 x 11.140 (-9.580, 2980.200), ( 2989.900, 2991.340) 33414.207
+lambda: 59989.60 x 222.80 (-191.60, 59604.00), ( 59798.00, 59826.80) 13365683.00
+internal: 599896 x 2228 ( -1916, 596040), ( 597980, 598268) 1336568288
+ Generating output for cell xor_target
+Reading /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/user_project_wrapper_erased.gds ..
+Reading /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/user_project_wrapper_empty_erased.gds ..
+--- Running XOR for 36/0 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 329 (flat) 329 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 329 (flat) 329 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.020s Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+--- Running XOR for 41/0 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 128 (flat) 128 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 128 (flat) 128 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+--- Running XOR for 42/0 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 87 (flat) 87 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 87 (flat) 87 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+--- Running XOR for 46/0 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 4 (flat) 4 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 4 (flat) 4 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+--- Running XOR for 81/0 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 4 (flat) 4 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 4 (flat) 4 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 524.00M
+Writing layout file: /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/mpw_precheck/e91b7603-4cb2-40d3-9c9d-39f7dcd32d80/outputs/user_project_wrapper.xor.gds ..
+Total elapsed: 0.110s Memory: 524.00M
diff --git a/mpw_precheck/logs/xor_check.total b/mpw_precheck/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/outputs/reports/gpio_defines.report b/mpw_precheck/outputs/reports/gpio_defines.report
new file mode 100644
index 0000000..0a9cb29
--- /dev/null
+++ b/mpw_precheck/outputs/reports/gpio_defines.report
@@ -0,0 +1,33 @@
+USER_CONFIG_GPIO_5_INIT 10'h008
+USER_CONFIG_GPIO_6_INIT 10'h008
+USER_CONFIG_GPIO_7_INIT 10'h008
+USER_CONFIG_GPIO_8_INIT 10'h008
+USER_CONFIG_GPIO_9_INIT 10'h008
+USER_CONFIG_GPIO_10_INIT 10'h008
+USER_CONFIG_GPIO_11_INIT 10'h008
+USER_CONFIG_GPIO_12_INIT 10'h008
+USER_CONFIG_GPIO_13_INIT 10'h008
+USER_CONFIG_GPIO_14_INIT 10'h008
+USER_CONFIG_GPIO_15_INIT 10'h008
+USER_CONFIG_GPIO_16_INIT 10'h008
+USER_CONFIG_GPIO_17_INIT 10'h008
+USER_CONFIG_GPIO_18_INIT 10'h008
+USER_CONFIG_GPIO_19_INIT 10'h008
+USER_CONFIG_GPIO_20_INIT 10'h008
+USER_CONFIG_GPIO_21_INIT 10'h008
+USER_CONFIG_GPIO_22_INIT 10'h008
+USER_CONFIG_GPIO_23_INIT 10'h008
+USER_CONFIG_GPIO_24_INIT 10'h008
+USER_CONFIG_GPIO_25_INIT 10'h008
+USER_CONFIG_GPIO_26_INIT 10'h008
+USER_CONFIG_GPIO_27_INIT 10'h008
+USER_CONFIG_GPIO_28_INIT 10'h008
+USER_CONFIG_GPIO_29_INIT 10'h008
+USER_CONFIG_GPIO_30_INIT 10'h008
+USER_CONFIG_GPIO_31_INIT 10'h008
+USER_CONFIG_GPIO_32_INIT 10'h008
+USER_CONFIG_GPIO_33_INIT 10'h008
+USER_CONFIG_GPIO_34_INIT 10'h008
+USER_CONFIG_GPIO_35_INIT 10'h008
+USER_CONFIG_GPIO_36_INIT 10'h008
+USER_CONFIG_GPIO_37_INIT 10'h008
diff --git a/mpw_precheck/outputs/reports/klayout_beol_check.xml b/mpw_precheck/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..0368a13
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,2949 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>DRC Run Report at</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/gf180mcuC_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>M1.1</name>
+ <description>M1.1 : min. metal1 width : 0.23µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M1.2a</name>
+ <description>M1.2a : min. metal1 spacing : 0.23µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M1.2b</name>
+ <description>M1.2b : Space to wide Metal1 (length & width > 10um) : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M1.3</name>
+ <description>M1.3 : Minimum Metal1 area : 0.1444µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M2.1</name>
+ <description>M2.1 : min. metal2 width : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M2.2a</name>
+ <description>M2.2a : min. metal2 spacing : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M2.2b</name>
+ <description>M2.2b : Space to wide Metal2 (length & width > 10um) : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M2.3</name>
+ <description>M2.3 : Minimum metal2 area : 0.1444µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M3.1</name>
+ <description>M3.1 : min. metal3 width : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M3.2a</name>
+ <description>M3.2a : min. metal3 spacing : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M3.2b</name>
+ <description>M3.2b : Space to wide Metal3 (length & width > 10um) : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M3.3</name>
+ <description>M3.3 : Minimum metal3 area : 0.1444µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M4.1</name>
+ <description>M4.1 : min. metal4 width : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M4.2a</name>
+ <description>M4.2a : min. metal4 spacing : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M4.2b</name>
+ <description>M4.2b : Space to wide Metal4 (length & width > 10um) : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M4.3</name>
+ <description>M4.3 : Minimum metal4 area : 0.1444µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M5.1</name>
+ <description>M5.1 : min. metal5 width : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M5.2a</name>
+ <description>M5.2a : min. metal5 spacing : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M5.2b</name>
+ <description>M5.2b : Space to wide Metal5 (length & width > 10um) : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>M5.3</name>
+ <description>M5.3 : Minimum metal5 area : 0.1444µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.1</name>
+ <description>V1.1 : Min/max Via1 size . : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.2a</name>
+ <description>V1.2a : min. via1 spacing : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.2b</name>
+ <description>V1.2b : Via1 Space in 4x4 or larger via1 array : 0.36µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.3a</name>
+ <description>V1.3a : metal-1 overlap of via1.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.3c</name>
+ <description>V1.3c : metal-1 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.3d</name>
+ <description>V1.3d : If metal-1 overlap via1 by < 0.04um on one side, adjacent metal-1 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.4a</name>
+ <description>V1.4a : metal-2 overlap of via1.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.4b</name>
+ <description>V1.4b : metal-2 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V1.4c</name>
+ <description>V1.4c : If metal-2 overlap via1 by < 0.04um on one side, adjacent metal-2 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.1</name>
+ <description>V2.1 : Min/max Via2 size . : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.2a</name>
+ <description>V2.2a : min. via2 spacing : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.2b</name>
+ <description>V2.2b : Via2 Space in 4x4 or larger via2 array : 0.36µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.3b</name>
+ <description>V2.3b : metal2 overlap of via2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.3c</name>
+ <description>V2.3c : metal2 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.3d</name>
+ <description>V2.3d : If metal2 overlap via2 by < 0.04um on one side, adjacent metal2 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.4a</name>
+ <description>V2.4a : metal3 overlap of via2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.4b</name>
+ <description>V2.4b : metal3 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V2.4c</name>
+ <description>V2.4c : If metal3 overlap via2 by < 0.04um on one side, adjacent metal3 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.1</name>
+ <description>V3.1 : Min/max Via3 size . : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.2a</name>
+ <description>V3.2a : min. via3 spacing : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.2b</name>
+ <description>V3.2b : Via3 Space in 4x4 or larger via3 array : 0.36µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.3b</name>
+ <description>V3.3b : metal3 overlap of via3.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.3c</name>
+ <description>V3.3c : metal3 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.3d</name>
+ <description>V3.3d : If metal3 overlap via3 by < 0.04um on one side, adjacent metal3 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.4a</name>
+ <description>V3.4a : metal4 overlap of via3.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.4b</name>
+ <description>V3.4b : metal4 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V3.4c</name>
+ <description>V3.4c : If metal4 overlap via3 by < 0.04um on one side, adjacent metal4 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.1</name>
+ <description>V4.1 : Min/max Via4 size . : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.2a</name>
+ <description>V4.2a : min. via4 spacing : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.2b</name>
+ <description>V4.2b : Via4 Space in 4x4 or larger Vian array : 0.36µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.3b</name>
+ <description>V4.3b : metal4 overlap of via4.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.3c</name>
+ <description>V4.3c : metal4 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.3d</name>
+ <description>V4.3d : If metal4 overlap Vian by < 0.04um on one side, adjacent metal4 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.4a</name>
+ <description>V4.4a : metal5 overlap of via4.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.4b</name>
+ <description>V4.4b : metal5 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V4.4c</name>
+ <description>V4.4c : If metal5 overlap via4 by < 0.04um on one side, adjacent metal5 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.1</name>
+ <description>V5.1 : Min/max Via5 size . : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.2a</name>
+ <description>V5.2a : min. via5 spacing : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.2b</name>
+ <description>V5.2b : Via5 Space in 4x4 or larger via5 array : 0.36µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.3b</name>
+ <description>V5.3b : metal5 overlap of via5.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.3c</name>
+ <description>V5.3c : metal5 (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.3d</name>
+ <description>V5.3d : If metal5 overlap via5 by < 0.04um on one side, adjacent metal5 edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.4a</name>
+ <description>V5.4a : metaltop overlap of via5.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.4b</name>
+ <description>V5.4b : metaltop (< 0.34um) end-of-line overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>V5.4c</name>
+ <description>V5.4c : If metaltop overlap via5 by < 0.04um on one side, adjacent metaltop edges overlap. : 0.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MT.1</name>
+ <description>MT.1 : min. metaltop width : 0.44µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MT.2a</name>
+ <description>MT.2a : min. metaltop spacing : 0.46µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MT.2b</name>
+ <description>MT.2b : Space to wide Metal2 (length & width > 10um) : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MT.4</name>
+ <description>MT.4 : Minimum MetalTop area : 0.5625µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MC.1</name>
+ <description>MC.1 : min. mcell width : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MC.2</name>
+ <description>MC.2 : min. mcell spacing : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MC.3</name>
+ <description>MC.3 : Minimum Mcell area : 0.35µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MC.4</name>
+ <description>MC.4 : Minimum area enclosed by Mcell : 0.35µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.1</name>
+ <description>PRES.1 : Minimum width of Poly2 resistor. : 0.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.2</name>
+ <description>PRES.2 : Minimum space between Poly2 resistors. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.3</name>
+ <description>PRES.3 : Minimum space from Poly2 resistor to COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.4</name>
+ <description>PRES.4 : Minimum space from Poly2 resistor to unrelated Poly2. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.5</name>
+ <description>PRES.5 : Minimum Plus implant overlap of Poly2 resistor. : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.6</name>
+ <description>PRES.6 : Minimum salicide block overlap of Poly2 resistor in width direction. : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.7</name>
+ <description>PRES.7 : Space from salicide block to contact on Poly2 resistor.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.9a</name>
+ <description>PRES.9a : Pplus Poly2 resistor shall be covered by RES_MK marking. RES_MK length shall be coincide with resistor length (Defined by SAB length) and width covering the width of Poly2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.9b</name>
+ <description>PRES.9b : If the size of single RES_MK mark layer is greater than 15000um2 and both side (X and Y) are greater than 80um. then the minimum spacing to adjacent RES_MK layer. : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.1</name>
+ <description>LRES.1 : Minimum width of Poly2 resistor. : 0.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.2</name>
+ <description>LRES.2 : Minimum space between Poly2 resistors. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.3</name>
+ <description>LRES.3 : Minimum space from Poly2 resistor to COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.4</name>
+ <description>LRES.4 : Minimum space from Poly2 resistor to unrelated Poly2. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.5</name>
+ <description>LRES.5 : Minimum Nplus implant overlap of Poly2 resistor. : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.6</name>
+ <description>LRES.6 : Minimum salicide block overlap of Poly2 resistor in width direction. : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.7</name>
+ <description>LRES.7 : Space from salicide block to contact on Poly2 resistor.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.9a</name>
+ <description>LRES.9a : Nplus Poly2 resistor shall be covered by RES_MK marking. RES_MK length shall be coincide with resistor length (Defined by SAB length) and width covering the width of Poly2. </description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.9b</name>
+ <description>LRES.9b : If the size of single RES_MK mark layer is greater than 15000um2 and both side (X and Y) are greater than 80um. then the minimum spacing to adjacent RES_MK layer. : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.1</name>
+ <description>HRES.1 : Minimum space. Note : Merge if the spacing is less than 0.4 um. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.2</name>
+ <description>HRES.2 : Minimum width of Poly2 resistor. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.3</name>
+ <description>HRES.3 : Minimum space between Poly2 resistors. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.4</name>
+ <description>HRES.4 : Minimum RESISTOR overlap of Poly2 resistor. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.5</name>
+ <description>HRES.5 : Minimum RESISTOR space to unrelated Poly2. : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.6</name>
+ <description>HRES.6 : Minimum RESISTOR space to COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.7</name>
+ <description>HRES.7 : Minimum Pplus overlap of contact on Poly2 resistor. : 0.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.8</name>
+ <description>HRES.8 : Space from salicide block to contact on Poly2 resistor.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.9</name>
+ <description>HRES.9 : Minimum salicide block overlap of Poly2 resistor in width direction.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.10</name>
+ <description>HRES.10 : Minimum & maximum Pplus overlap of SAB.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.12a</name>
+ <description>HRES.12a : P type Poly2 resistor (high sheet rho) shall be covered by RES_MK marking. RES_MK length shall be coincide with resistor length (Defined by Pplus space) and width covering the width of Poly2. </description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.12b</name>
+ <description>HRES.12b : If the size of single RES_MK mark layer is greater than 15000 um2 and both side (X and Y) are greater than 80 um. Then the minimum spacing to adjacent RES_MK layer. : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.1</name>
+ <description>MIMTM.1 : Minimum MiM bottom plate spacing to the bottom plate metal (whether adjacent MiM or routing metal). : 1.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.2</name>
+ <description>MIMTM.2 : Minimum MiM bottom plate overlap of Vian-1 layer. [This is applicable for Vian-1 within 1.06um oversize of FuseTop layer (referenced to virtual bottom plate)]. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.3</name>
+ <description>MIMTM.3 : Minimum MiM bottom plate overlap of Top plate.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.4</name>
+ <description>MIMTM.4 : Minimum MiM top plate (FuseTop) overlap of Vian-1. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.5</name>
+ <description>MIMTM.5 : Minimum spacing between top plate and the Vian-1 connecting to the bottom plate. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.6</name>
+ <description>MIMTM.6 : Minimum spacing between unrelated top plates. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.7</name>
+ <description>MIMTM.7 : Min FuseTop enclosure by CAP_MK.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.8a</name>
+ <description>MIMTM.8a : Minimum MIM cap area (defined by FuseTop area) (um2). : 25µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.8b</name>
+ <description>MIMTM.8b : Maximum single MIM Cap area (Use multiple MIM caps in parallel connection if bigger capacitors are required) (um2). : 10000µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.9</name>
+ <description>MIMTM.9 : Min. Via (Vian-1) spacing for sea of Via on MIM top plate. : 0.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.10</name>
+ <description>MIMTM.10 : (a) There cannot be any Vian-2 touching MIM bottom plate Metaln-1. (b) MIM bottom plate Metaln-1 can only be connected through the higher Via (Vian-1).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.11</name>
+ <description>MIMTM.11 : Bottom plate of multiple MIM caps can be shared (for common nodes) as long as total MIM area with that single common plate does not exceed MIMTM.8b rule. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.1</name>
+ <description>NAT.1 : Min. NAT Overlap of COMP of Native Vt NMOS. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.2</name>
+ <description>NAT.2 : Space to unrelated COMP (outside NAT). : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.3</name>
+ <description>NAT.3 : Space to NWell edge. : 0.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.4</name>
+ <description>NAT.4 : Minimum channel length for 3.3V Native Vt NMOS (For smaller L Ioff will be higher than Spec). : 1.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.5</name>
+ <description>NAT.5 : Minimum channel length for 6.0V Native Vt NMOS (For smaller L Ioff will be higher than Spec). : 1.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.6</name>
+ <description>NAT.6 : Two or more COMPs if connected to different potential are not allowed under same NAT layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.7</name>
+ <description>NAT.7 : Minimum NAT to NAT spacing. : 0.74µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.8</name>
+ <description>NAT.8 : Min. Dualgate overlap of NAT (for 5V/6V) native VT NMOS only.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.9</name>
+ <description>NAT.9 : Poly interconnect under NAT layer is not allowed, minimum spacing of un-related poly from the NAT layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.10</name>
+ <description>NAT.10 : Nwell, inside NAT layer are not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.11</name>
+ <description>NAT.11 : NCOMP not intersecting to Poly2, is not allowed inside NAT layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.12</name>
+ <description>NAT.12 : Poly2 not intersecting with COMP is not allowed inside NAT (Poly2 resistor is not allowed inside NAT).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>BJT.1</name>
+ <description>BJT.1 : Min. DRC_BJT overlap of DNWELL for NPN BJT.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>BJT.2</name>
+ <description>BJT.2 : Min. DRC_BJT overlap of PCOM in Psub.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>BJT.3</name>
+ <description>BJT.3 : Minimum space of DRC_BJT layer to unrelated COMP. : 0.1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>DE.2</name>
+ <description>DE.2 : Minimum NDMY or PMNDMY size (x or y dimension in um). : 0.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>DE.3</name>
+ <description>DE.3 : If size greater than 15000 um2 then two sides should not be greater than (um).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>DE.4</name>
+ <description>DE.4 : Minimum NDMY to NDMY space (Merge if space is less). : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LVS_BJT.1</name>
+ <description>LVS_BJT.1 : Minimum LVS_BJT enclosure of NPN or PNP Emitter COMP layers</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.DF.3a</name>
+ <description>O.DF.3a : Min. COMP Space. P-substrate tap (PCOMP outside NWELL) can be butted for different voltage devices as the potential is same. : 0.24µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.DF.6</name>
+ <description>O.DF.6 : Min. COMP extend beyond poly2 (it also means source/drain overhang). : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.DF.9</name>
+ <description>O.DF.9 : Min. COMP area (um2). : 0.1444µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.2</name>
+ <description>O.PL.2 : Min. poly2 width. : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.3a</name>
+ <description>O.PL.3a : Min. poly2 Space on COMP. : 0.18µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.4</name>
+ <description>O.PL.4 : Min. extension beyond COMP to form Poly2 end cap. : 0.14µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.2</name>
+ <description>O.SB.2 : Min. salicide Block Space. : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.3</name>
+ <description>O.SB.3 : Min. space from salicide block to unrelated COMP. : 0.09µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.4</name>
+ <description>O.SB.4 : Min. space from salicide block to contact.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.5b_3.3V</name>
+ <description>O.SB.5b_3.3V : Min. space from salicide block to unrelated Poly2 on COMP. : 0.1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.9</name>
+ <description>O.SB.9 : Min. salicide block extension beyond unsalicided Poly2. : 0.1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.11</name>
+ <description>O.SB.11 : Min. salicide block overlap with COMP. : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.13_3.3V</name>
+ <description>O.SB.13_3.3V : Min. area of silicide block (um2). : 1.488µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.13_5V</name>
+ <description>O.SB.13_5V : Min. area of silicide block (um2). : 2µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.CO.7</name>
+ <description>O.CO.7 : Min. space from COMP contact to Poly2 on COMP. : 0.13µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.ORT</name>
+ <description>O.PL.ORT : Orientation-restricted gates must have the gate width aligned along the X-axis (poly line running horizontally) in reference to wafer notch down. : 0µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.01</name>
+ <description>EF.01 : Min. (Poly2 butt PLFUSE) within EFUSE_MK and Pplus.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.02</name>
+ <description>EF.02 : Min. Max. PLFUSE width. : 0.18µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.03</name>
+ <description>EF.03 : Min. Max. PLFUSE length. : 1.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04a</name>
+ <description>EF.04a : Min. Max. PLFUSE overlap Poly2 (coinciding permitted) and touch cathode and anode.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04b</name>
+ <description>EF.04b : PLFUSE must be rectangular. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04c</name>
+ <description>EF.04c : Cathode Poly2 must be rectangular. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04d</name>
+ <description>EF.04d : Anode Poly2 must be rectangular. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.05</name>
+ <description>EF.05 : Min./Max. LVS_Source overlap Poly2 (at Anode).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.06</name>
+ <description>EF.06 : Min./Max. Cathode Poly2 width. : 2.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.07</name>
+ <description>EF.07 : Min./Max. Cathode Poly2 length. : 1.84µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.08</name>
+ <description>EF.08 : Min./Max. Anode Poly2 width. : 1.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.09</name>
+ <description>EF.09 : Min./Max. Anode Poly2 length. : 2.43µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.10</name>
+ <description>EF.10 : Min. Cathode Poly2 to Poly2 space. : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.11</name>
+ <description>EF.11 : Min. Anode Poly2 to Poly2 space. : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.12</name>
+ <description>EF.12 : Min. Space of Cathode Contact to PLFUSE end.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.13</name>
+ <description>EF.13 : Min. Space of Anode Contact to PLFUSE end.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.14</name>
+ <description>EF.14 : Min. EFUSE_MK enclose LVS_Source.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.15</name>
+ <description>EF.15 : NO Contact is allowed to touch PLFUSE.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.16a</name>
+ <description>EF.16a : Cathode must contain exact number of Contacts at each ends. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.16b</name>
+ <description>EF.16b : Anode must contain exact number of Contacts at each ends. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.17</name>
+ <description>EF.17 : Min. Space of EFUSE_MK to EFUSE_MK. : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.18</name>
+ <description>EF.18 : PLFUSE must sit on field oxide (NOT COMP), no cross with any COMP, Nplus, Pplus, ESD, SAB, Resistor, Metal1, Metal2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.19</name>
+ <description>EF.19 : Min. PLFUSE space to Metal1, Metal2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.20</name>
+ <description>EF.20 : Min. PLFUSE space to COMP, Nplus, Pplus, Resistor, ESD, SAB. : 2.73µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.21</name>
+ <description>EF.21 : Min./Max. eFUSE Poly2 length. : 5.53µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.22a</name>
+ <description>EF.22a : Min./Max. Cathode Poly2 overlap with PLFUSE in width direction. : 1.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.22b</name>
+ <description>EF.22b : Min./Max. Anode Poly2 overlap with PLFUSE in width direction. : 0.44µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.1</name>
+ <description>MDN.1 : Min MVSD width (for litho purpose). : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.2a</name>
+ <description>MDN.2a : Min MVSD space [Same Potential]. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.2b</name>
+ <description>MDN.2b : Min MVSD space [Diff Potential]. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.3a</name>
+ <description>MDN.3a : Min transistor channel length. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.3b</name>
+ <description>MDN.3b : Max transistor channel length: 20 um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.4a</name>
+ <description>MDN.4a : Min transistor channel width. : 4 µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.4b</name>
+ <description>MDN.4b : Max transistor channel width. : 50 um </description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5ai</name>
+ <description>MDN.5ai : Min PCOMP (Pplus AND COMP) space to LDNMOS Drain MVSD (source and body tap non-butted). PCOMP (Pplus AND COMP) intercept with LDNMOS Drain MVSD is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5aii</name>
+ <description>MDN.5aii : Min PCOMP (Pplus AND COMP) space to LDNMOS Drain MVSD (source and body tap butted). PCOMP (Pplus AND COMP) intercept with LDNMOS Drain MVSD is not allowed. : 0.92µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5b</name>
+ <description>MDN.5b : Min PCOMP (Pplus AND COMP) space to LDNMOS Source (Nplus AND COMP). Use butted source and p-substrate tab otherwise and that is good for Latch-up immunity as well.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5c</name>
+ <description>MDN.5c : Maximum distance of the nearest edge of the substrate tab from NCOMP edge. : 15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.6</name>
+ <description>MDN.6 : ALL LDNMOS shall be covered by Dualgate layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.6a</name>
+ <description>MDN.6a : Min Dualgate enclose NCOMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.7</name>
+ <description>MDN.7 : Each LDNMOS shall be covered by LDMOS_XTOR (GDS#226) mark layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.7a</name>
+ <description>MDN.7a : Min LDMOS_XTOR enclose Dualgate.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.8a</name>
+ <description>MDN.8a : Min LDNMOS drain MVSD space to any other equal potential Nwell space.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.8b</name>
+ <description>MDN.8b : Min LDNMOS drain MVSD space to any other different potential Nwell space.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.9</name>
+ <description>MDN.9 : Min LDNMOS drain MVSD space to NCOMP (Nplus AND COMP) outside LDNMOS drain MVSD. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10a</name>
+ <description>MDN.10a : Min LDNMOS POLY2 width. : 1.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10b</name>
+ <description>MDN.10b : Min POLY2 extension beyond COMP in the width direction of the transistor (other than the LDNMOS drain direction). : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10c</name>
+ <description>MDN.10c : Min/Max POLY2 extension beyond COMP on the field towards LDNMOS drain COMP direction.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10d</name>
+ <description>MDN.10d : Min/Max POLY2 on field space to LDNMOS drain COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10ei</name>
+ <description>MDN.10ei : Min POLY2 space to Psub tap (source and body tap non-butted).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10eii</name>
+ <description>MDN.10eii : Min POLY2 space to Psub tap (source and body tap butted). : 0.32µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10f</name>
+ <description>MDN.10f : Poly2 interconnect in HV region (LDMOS_XTOR marked region) not allowed. Also, any Poly2 interconnect with poly2 to substrate potential greater than 6V is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.11</name>
+ <description>MDN.11 : Min/Max MVSD overlap channel COMP ((((LDMOS_XTOR AND MVSD) AND COMP) AND POLY2) AND NPlus).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.12</name>
+ <description>MDN.12 : Min MVSD enclose NCOMP in the LDNMOS drain and in the direction along the transistor width.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13a</name>
+ <description>MDN.13a : Max single finger width. : 50µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13b</name>
+ <description>MDN.13b : Layout shall have alternative source & drain.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13c</name>
+ <description>MDN.13c : Both sides of the transistor shall be terminated by source.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13d</name>
+ <description>MDN.13d : Every two poly fingers shall be surrounded by a P-sub guard ring. (Exclude the case when each LDNMOS transistor have full width butting to well tap).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.14</name>
+ <description>MDN.14 : Min MVSD space to any DNWELL.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.15a</name>
+ <description>MDN.15a : Min LDNMOS drain COMP width. : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.15b</name>
+ <description>MDN.15b : Min LDNMOS drain COMP enclose contact. : 0µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.17</name>
+ <description>MDN.17 : It is recommended to surround the LDNMOS transistor with non-broken Psub guard ring to improve the latch up immunity. Guideline to improve the latch up immunity.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.1</name>
+ <description>MDP.1 : Minimum transistor channel length. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.1a</name>
+ <description>MDP.1a : Max transistor channel length.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.2</name>
+ <description>MDP.2 : Minimum transistor channel width. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3</name>
+ <description>MDP.3 : Each LDPMOS shall be surrounded by non-broken Nplus guard ring inside DNWELL</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3ai</name>
+ <description>MDP.3ai : Min NCOMP (Nplus AND COMP) space to MVPSD (source and body tap non-butted). NCOMP (Nplus AND COMP) intercept with MVPSD is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3aii</name>
+ <description>MDP.3aii : Min NCOMP (Nplus AND COMP) space to MVPSD (source and body tap butted). NCOMP (Nplus AND COMP) intercept with MVPSD is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3b</name>
+ <description>MDP.3b : Min NCOMP (Nplus AND COMP) space to PCOMP in DNWELL (Pplus AND COMP AND DNWELL). Use butted source and DNWELL contacts otherwise and that is best for Latch-up immunity as well. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3c</name>
+ <description>MDP.3c : Maximum distance of the nearest edge of the DNWELL tab (NCOMP inside DNWELL) from PCOMP edge (PCOMP inside DNWELL). : 15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3d</name>
+ <description>MDP.3d : The metal connection for the Nplus guard ring recommended to be continuous. The maximum gap between this metal if broken. Note: To put maximum number of contact under metal for better manufacturability and reliability. : 10µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.4</name>
+ <description>MDP.4 : DNWELL covering LDPMOS shall be surrounded by non broken Pplus guard. The metal connection for the Pplus guard ring recommended to be continuous, The maximum gap between this metal if broken. Note: To put maximum number of contact under metal for better manufacturability and reliability.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.4a</name>
+ <description>MDP.4a : Min PCOMP (Pplus AND COMP) space to DNWELL. : 2.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.4b</name>
+ <description>MDP.4b : Maximum distance of the nearest edge of the DNWELL from the PCOMP Guard ring outside DNWELL. : 15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.5</name>
+ <description>MDP.5 : Each LDPMOS shall be covered by Dualgate layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.5a</name>
+ <description>MDP.5a : Minimum Dualgate enclose Plus guarding ring PCOMP (Pplus AND COMP). : 0.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.6</name>
+ <description>MDP.6 : Each LDPMOS shall be covered by LDMOS_XTOR (GDS#226) layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.6a</name>
+ <description>MDP.6a : Minimum LDMOS_XTOR enclose Dualgate.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.7</name>
+ <description>MDP.7 : Minimum LDMOS_XTOR layer space to Nwell outside LDMOS_XTOR. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.8</name>
+ <description>MDP.8 : Minimum LDMOS_XTOR layer space to NCOMP outside LDMOS_XTOR. : 1.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9a</name>
+ <description>MDP.9a : Min LDPMOS POLY2 width. : 1.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9b</name>
+ <description>MDP.9b : Min POLY2 extension beyond COMP in the width direction of the transistor (other than the LDMOS drain direction). : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9c</name>
+ <description>MDP.9c : Min/Max POLY2 extension beyond COMP on the field towards LDPMOS drain (MVPSD AND COMP AND Pplus NOT POLY2) direction.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9d</name>
+ <description>MDP.9d : Min/Max POLY2 on field to LDPMOS drain COMP (MVPSD AND COMP AND Pplus NOT POLY2) space.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9ei</name>
+ <description>MDP.9ei : Min LDMPOS gate Poly2 space to Nplus guardring (source and body tap non-butted).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9eii</name>
+ <description>MDP.9eii : Min LDMPOS gate Poly2 space to Nplus guardring (source and body tap butted).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9f</name>
+ <description>MDP.9f : Poly2 interconnect is not allowed in LDPMOS region (LDMOS_XTOR marked region). : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.10</name>
+ <description>MDP.10 : Min/Max MVPSD overlap onto the channel (LDMOS_XTOR AND COMP AND POLY2 AND Pplus).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.10a</name>
+ <description>MDP.10a : Min MVPSD space within LDMOS_XTOR marking [diff potential]. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.10b</name>
+ <description>MDP.10b : Min MVPSD space [same potential]. Merge if space less than 1um. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.11</name>
+ <description>MDP.11 : Min MVPSD enclosing PCOMP in the drain (MVPSD AND COMP NOT POLY2) direction and in the direction along the transistor width.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.12</name>
+ <description>MDP.12 : Min DNWELL enclose Nplus guard ring (NCOMP). : 0.66µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.13a</name>
+ <description>MDP.13a : Max single finger width. : 50µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.13b</name>
+ <description>MDP.13b : Layout shall have alternative source & drain.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.13c</name>
+ <description>MDP.13c : Both sides of the transistor shall be terminated by source.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.15</name>
+ <description>MDP.15 : Min DNWELL enclosing MVPSD to any DNWELL spacing. : 6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.16a</name>
+ <description>MDP.16a : Min LDPMOS drain COMP width. : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.16b</name>
+ <description>MDP.16b : Min LDPMOS drain COMP enclose contact. : 0µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.17a</name>
+ <description>MDP.17a : For better latch up immunity, it is necessary to put DNWELL guard ring between MVPSD Inside DNWELL covered by LDMOS_XTOR and NCOMP (outside DNWELL and outside Nwell) when spacing between them is less than 40um.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.17c</name>
+ <description>MDP.17c : DNWELL guard ring shall have NCOMP tab to be connected to highest potential</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.NW.2b_3.3V</name>
+ <description>Y.NW.2b_3.3V : Min. Nwell Space (Outside DNWELL, Inside YMTP_MK) [Different potential]. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.NW.2b_5V</name>
+ <description>Y.NW.2b_5V : Min. Nwell Space (Outside DNWELL, Inside YMTP_MK) [Different potential]. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.DF.6_5V</name>
+ <description>Y.DF.6_5V : Min. COMP extend beyond gate (it also means source/drain overhang) inside YMTP_MK. : 0.15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.DF.16_3.3V</name>
+ <description>Y.DF.16_3.3V : Min. space from (Nwell outside DNWELL) to (unrelated NCOMP outside Nwell and DNWELL) (inside YMTP_MK). : 0.27µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.DF.16_5V</name>
+ <description>Y.DF.16_5V : Min. space from (Nwell outside DNWELL) to (unrelated NCOMP outside Nwell and DNWELL) (inside YMTP_MK). : 0.23µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.1_3.3V</name>
+ <description>Y.PL.1_3.3V : Interconnect Width (inside YMTP_MK). : 0.13µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.1_5V</name>
+ <description>Y.PL.1_5V : Interconnect Width (inside YMTP_MK). This rule is currently not applicable for 5V.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.2_3.3V</name>
+ <description>Y.PL.2_3.3V : Gate Width (Channel Length) (inside YMTP_MK). : 0.13µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.2_5V</name>
+ <description>Y.PL.2_5V : Gate Width (Channel Length) (inside YMTP_MK). : 0.47µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.4_5V</name>
+ <description>Y.PL.4_5V : Poly2 extension beyond COMP to form Poly2 end cap (inside YMTP_MK). : 0.16µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5a_3.3V</name>
+ <description>Y.PL.5a_3.3V : Space from field Poly2 to unrelated COMP (inside YMTP_MK). Space from field Poly2 to Guard-ring (inside YMTP_MK). : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5a_5V</name>
+ <description>Y.PL.5a_5V : Space from field Poly2 to unrelated COMP (inside YMTP_MK). Space from field Poly2 to Guard-ring (inside YMTP_MK). : 0.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5b_3.3V</name>
+ <description>Y.PL.5b_3.3V : Space from field Poly2 to related COMP (inside YMTP_MK). : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5b_5V</name>
+ <description>Y.PL.5b_5V : Space from field Poly2 to related COMP (inside YMTP_MK). : 0.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.4c_MV</name>
+ <description>S.DF.4c_MV : Min. (Nwell overlap of PCOMP) outside DNWELL. : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.6_MV</name>
+ <description>S.DF.6_MV : Min. COMP extend beyond gate (it also means source/drain overhang). : 0.32µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.7_MV</name>
+ <description>S.DF.7_MV : Min. (LVPWELL Spacer to PCOMP) inside DNWELL. : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.8_MV</name>
+ <description>S.DF.8_MV : Min. (LVPWELL overlap of NCOMP) Inside DNWELL. : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.16_MV</name>
+ <description>S.DF.16_MV : Min. space from (Nwell outside DNWELL) to (NCOMP outside Nwell and DNWELL). : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.PL.5a_MV</name>
+ <description>S.PL.5a_MV : Space from field Poly2 to unrelated COMP Spacer from field Poly2 to Guard-ring. : 0.12µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.PL.5b_MV</name>
+ <description>S.PL.5b_MV : Space from field Poly2 to related COMP. : 0.12µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.4_MV</name>
+ <description>S.CO.4_MV : COMP overlap of contact. : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.4c_LV</name>
+ <description>S.DF.4c_LV : Min. (Nwell overlap of PCOMP) outside DNWELL. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.16_LV</name>
+ <description>S.DF.16_LV : Min. space from (Nwell outside DNWELL) to (NCOMP outside Nwell and DNWELL). : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.3_LV</name>
+ <description>S.CO.3_LV : Poly2 overlap of contact. : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.4_LV</name>
+ <description>S.CO.4_LV : COMP overlap of contact. : 0.03µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.6_ii_LV</name>
+ <description>S.CO.6_ii_LV : (ii) If Metal1 overlaps contact by < 0.04um on one side, adjacent metal1 edges overlap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.M1.1_LV</name>
+ <description>S.M1.1_LV : min. metal1 width : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on comp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_angle</name>
+ <description>ACUTE : non 45 degree angle comp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>ACUTE : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>ACUTE : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvpwell_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvpwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvpwell_angle</name>
+ <description>ACUTE : non 45 degree angle lvpwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dualgate_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on dualgate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dualgate_angle</name>
+ <description>ACUTE : non 45 degree angle dualgate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on poly2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_angle</name>
+ <description>ACUTE : non 45 degree angle poly2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nplus_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on nplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nplus_angle</name>
+ <description>ACUTE : non 45 degree angle nplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pplus_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pplus_angle</name>
+ <description>ACUTE : non 45 degree angle pplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sab_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on sab</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sab_angle</name>
+ <description>ACUTE : non 45 degree angle sab</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on esd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_angle</name>
+ <description>ACUTE : non 45 degree angle esd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>contact_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on contact</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>contact_angle</name>
+ <description>ACUTE : non 45 degree angle contact</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_angle</name>
+ <description>ACUTE : non 45 degree angle metal1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via1_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via1_angle</name>
+ <description>ACUTE : non 45 degree angle via1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_angle</name>
+ <description>ACUTE : non 45 degree angle metal2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>ACUTE : non 45 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_angle</name>
+ <description>ACUTE : non 45 degree angle metal3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>ACUTE : non 45 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_angle</name>
+ <description>ACUTE : non 45 degree angle metal4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>ACUTE : non 45 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_angle</name>
+ <description>ACUTE : non 45 degree angle metal5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via5_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via5_angle</name>
+ <description>ACUTE : non 45 degree angle via5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>ACUTE : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>resistor_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on resistor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>resistor_angle</name>
+ <description>ACUTE : non 45 degree angle resistor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fhres_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on fhres</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fhres_angle</name>
+ <description>ACUTE : non 45 degree angle fhres</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusetop_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on fusetop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusetop_angle</name>
+ <description>ACUTE : non 45 degree angle fusetop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusewindow_d_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on fusewindow_d</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusewindow_d_angle</name>
+ <description>ACUTE : non 45 degree angle fusewindow_d</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>polyfuse_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on polyfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>polyfuse_angle</name>
+ <description>ACUTE : non 45 degree angle polyfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvsd_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mvsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvsd_angle</name>
+ <description>ACUTE : non 45 degree angle mvsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvpsd_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mvpsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvpsd_angle</name>
+ <description>ACUTE : non 45 degree angle mvpsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nat_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on nat</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nat_angle</name>
+ <description>ACUTE : non 45 degree angle nat</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on comp_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle comp_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on poly2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle poly2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on comp_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_label_angle</name>
+ <description>ACUTE : non 45 degree angle comp_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on poly2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_label_angle</name>
+ <description>ACUTE : non 45 degree angle poly2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_label_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmpperi_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ubmpperi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmpperi_angle</name>
+ <description>ACUTE : non 45 degree angle ubmpperi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmparray_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ubmparray</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmparray_angle</name>
+ <description>ACUTE : non 45 degree angle ubmparray</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmeplate_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ubmeplate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmeplate_angle</name>
+ <description>ACUTE : non 45 degree angle ubmeplate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>schottky_diode_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on schottky_diode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>schottky_diode_angle</name>
+ <description>ACUTE : non 45 degree angle schottky_diode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>zener_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on zener</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>zener_angle</name>
+ <description>ACUTE : non 45 degree angle zener</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>res_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on res_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>res_mk_angle</name>
+ <description>ACUTE : non 45 degree angle res_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>opc_drc_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on opc_drc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>opc_drc_angle</name>
+ <description>ACUTE : non 45 degree angle opc_drc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ndmy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ndmy_angle</name>
+ <description>ACUTE : non 45 degree angle ndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pmndmy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pmndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pmndmy_angle</name>
+ <description>ACUTE : non 45 degree angle pmndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>v5_xtor_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on v5_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>v5_xtor_angle</name>
+ <description>ACUTE : non 45 degree angle v5_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap_mk_angle</name>
+ <description>ACUTE : non 45 degree angle cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mos_cap_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mos_cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mos_cap_mk_angle</name>
+ <description>ACUTE : non 45 degree angle mos_cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ind_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ind_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ind_mk_angle</name>
+ <description>ACUTE : non 45 degree angle ind_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diode_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diode_mk_angle</name>
+ <description>ACUTE : non 45 degree angle diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>drc_bjt_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on drc_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>drc_bjt_angle</name>
+ <description>ACUTE : non 45 degree angle drc_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_bjt_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_bjt_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mim_l_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mim_l_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mim_l_mk_angle</name>
+ <description>ACUTE : non 45 degree angle mim_l_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>latchup_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on latchup_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>latchup_mk_angle</name>
+ <description>ACUTE : non 45 degree angle latchup_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>guard_ring_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on guard_ring_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>guard_ring_mk_angle</name>
+ <description>ACUTE : non 45 degree angle guard_ring_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>otp_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on otp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>otp_mk_angle</name>
+ <description>ACUTE : non 45 degree angle otp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mtpmark_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mtpmark</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mtpmark_angle</name>
+ <description>ACUTE : non 45 degree angle mtpmark</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>neo_ee_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on neo_ee_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>neo_ee_mk_angle</name>
+ <description>ACUTE : non 45 degree angle neo_ee_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sramcore_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on sramcore</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sramcore_angle</name>
+ <description>ACUTE : non 45 degree angle sramcore</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_rf_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_rf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_rf_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_rf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_drain_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_drain</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_drain_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_drain</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvpolyrs_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on hvpolyrs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvpolyrs_angle</name>
+ <description>ACUTE : non 45 degree angle hvpolyrs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_io_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_io</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_io_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_io</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>probe_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on probe_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>probe_mk_angle</name>
+ <description>ACUTE : non 45 degree angle probe_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on esd_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_mk_angle</name>
+ <description>ACUTE : non 45 degree angle esd_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_source_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_source</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_source_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_source</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>well_diode_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on well_diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>well_diode_mk_angle</name>
+ <description>ACUTE : non 45 degree angle well_diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ldmos_xtor_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ldmos_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ldmos_xtor_angle</name>
+ <description>ACUTE : non 45 degree angle ldmos_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>plfuse_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on plfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>plfuse_angle</name>
+ <description>ACUTE : non 45 degree angle plfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>efuse_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on efuse_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>efuse_mk_angle</name>
+ <description>ACUTE : non 45 degree angle efuse_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mcell_feol_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mcell_feol_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mcell_feol_mk_angle</name>
+ <description>ACUTE : non 45 degree angle mcell_feol_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ymtp_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ymtp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ymtp_mk_angle</name>
+ <description>ACUTE : non 45 degree angle ymtp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dev_wf_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on dev_wf_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dev_wf_mk_angle</name>
+ <description>ACUTE : non 45 degree angle dev_wf_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metalt_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metalt_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metalt_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metalt_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pr_bndry_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pr_bndry</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pr_bndry_angle</name>
+ <description>ACUTE : non 45 degree angle pr_bndry</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mdiode_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mdiode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mdiode_angle</name>
+ <description>ACUTE : non 45 degree angle mdiode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal6_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal6_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal6_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal6_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>border_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on border</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>border_angle</name>
+ <description>ACUTE : non 45 degree angle border</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..b3fc698
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,27 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/gf180mcu_density.lydrc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>comp.density</name>
+ <description>0.7 max comp density</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_offgrid_check.xml b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..b73ff41
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,2535 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>DRC Run Report at</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/gf180mcuC_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>MC.1</name>
+ <description>MC.1 : min. mcell width : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MC.2</name>
+ <description>MC.2 : min. mcell spacing : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MC.3</name>
+ <description>MC.3 : Minimum Mcell area : 0.35µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MC.4</name>
+ <description>MC.4 : Minimum area enclosed by Mcell : 0.35µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.1</name>
+ <description>PRES.1 : Minimum width of Poly2 resistor. : 0.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.2</name>
+ <description>PRES.2 : Minimum space between Poly2 resistors. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.3</name>
+ <description>PRES.3 : Minimum space from Poly2 resistor to COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.4</name>
+ <description>PRES.4 : Minimum space from Poly2 resistor to unrelated Poly2. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.5</name>
+ <description>PRES.5 : Minimum Plus implant overlap of Poly2 resistor. : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.6</name>
+ <description>PRES.6 : Minimum salicide block overlap of Poly2 resistor in width direction. : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.7</name>
+ <description>PRES.7 : Space from salicide block to contact on Poly2 resistor.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.9a</name>
+ <description>PRES.9a : Pplus Poly2 resistor shall be covered by RES_MK marking. RES_MK length shall be coincide with resistor length (Defined by SAB length) and width covering the width of Poly2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>PRES.9b</name>
+ <description>PRES.9b : If the size of single RES_MK mark layer is greater than 15000um2 and both side (X and Y) are greater than 80um. then the minimum spacing to adjacent RES_MK layer. : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.1</name>
+ <description>LRES.1 : Minimum width of Poly2 resistor. : 0.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.2</name>
+ <description>LRES.2 : Minimum space between Poly2 resistors. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.3</name>
+ <description>LRES.3 : Minimum space from Poly2 resistor to COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.4</name>
+ <description>LRES.4 : Minimum space from Poly2 resistor to unrelated Poly2. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.5</name>
+ <description>LRES.5 : Minimum Nplus implant overlap of Poly2 resistor. : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.6</name>
+ <description>LRES.6 : Minimum salicide block overlap of Poly2 resistor in width direction. : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.7</name>
+ <description>LRES.7 : Space from salicide block to contact on Poly2 resistor.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.9a</name>
+ <description>LRES.9a : Nplus Poly2 resistor shall be covered by RES_MK marking. RES_MK length shall be coincide with resistor length (Defined by SAB length) and width covering the width of Poly2. </description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LRES.9b</name>
+ <description>LRES.9b : If the size of single RES_MK mark layer is greater than 15000um2 and both side (X and Y) are greater than 80um. then the minimum spacing to adjacent RES_MK layer. : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.1</name>
+ <description>HRES.1 : Minimum space. Note : Merge if the spacing is less than 0.4 um. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.2</name>
+ <description>HRES.2 : Minimum width of Poly2 resistor. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.3</name>
+ <description>HRES.3 : Minimum space between Poly2 resistors. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.4</name>
+ <description>HRES.4 : Minimum RESISTOR overlap of Poly2 resistor. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.5</name>
+ <description>HRES.5 : Minimum RESISTOR space to unrelated Poly2. : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.6</name>
+ <description>HRES.6 : Minimum RESISTOR space to COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.7</name>
+ <description>HRES.7 : Minimum Pplus overlap of contact on Poly2 resistor. : 0.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.8</name>
+ <description>HRES.8 : Space from salicide block to contact on Poly2 resistor.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.9</name>
+ <description>HRES.9 : Minimum salicide block overlap of Poly2 resistor in width direction.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.10</name>
+ <description>HRES.10 : Minimum & maximum Pplus overlap of SAB.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.12a</name>
+ <description>HRES.12a : P type Poly2 resistor (high sheet rho) shall be covered by RES_MK marking. RES_MK length shall be coincide with resistor length (Defined by Pplus space) and width covering the width of Poly2. </description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>HRES.12b</name>
+ <description>HRES.12b : If the size of single RES_MK mark layer is greater than 15000 um2 and both side (X and Y) are greater than 80 um. Then the minimum spacing to adjacent RES_MK layer. : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.1</name>
+ <description>MIMTM.1 : Minimum MiM bottom plate spacing to the bottom plate metal (whether adjacent MiM or routing metal). : 1.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.2</name>
+ <description>MIMTM.2 : Minimum MiM bottom plate overlap of Vian-1 layer. [This is applicable for Vian-1 within 1.06um oversize of FuseTop layer (referenced to virtual bottom plate)]. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.3</name>
+ <description>MIMTM.3 : Minimum MiM bottom plate overlap of Top plate.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.4</name>
+ <description>MIMTM.4 : Minimum MiM top plate (FuseTop) overlap of Vian-1. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.5</name>
+ <description>MIMTM.5 : Minimum spacing between top plate and the Vian-1 connecting to the bottom plate. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.6</name>
+ <description>MIMTM.6 : Minimum spacing between unrelated top plates. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.7</name>
+ <description>MIMTM.7 : Min FuseTop enclosure by CAP_MK.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.8a</name>
+ <description>MIMTM.8a : Minimum MIM cap area (defined by FuseTop area) (um2). : 25µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.8b</name>
+ <description>MIMTM.8b : Maximum single MIM Cap area (Use multiple MIM caps in parallel connection if bigger capacitors are required) (um2). : 10000µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.9</name>
+ <description>MIMTM.9 : Min. Via (Vian-1) spacing for sea of Via on MIM top plate. : 0.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.10</name>
+ <description>MIMTM.10 : (a) There cannot be any Vian-2 touching MIM bottom plate Metaln-1. (b) MIM bottom plate Metaln-1 can only be connected through the higher Via (Vian-1).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MIMTM.11</name>
+ <description>MIMTM.11 : Bottom plate of multiple MIM caps can be shared (for common nodes) as long as total MIM area with that single common plate does not exceed MIMTM.8b rule. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.1</name>
+ <description>NAT.1 : Min. NAT Overlap of COMP of Native Vt NMOS. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.2</name>
+ <description>NAT.2 : Space to unrelated COMP (outside NAT). : 0.3µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.3</name>
+ <description>NAT.3 : Space to NWell edge. : 0.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.4</name>
+ <description>NAT.4 : Minimum channel length for 3.3V Native Vt NMOS (For smaller L Ioff will be higher than Spec). : 1.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.5</name>
+ <description>NAT.5 : Minimum channel length for 6.0V Native Vt NMOS (For smaller L Ioff will be higher than Spec). : 1.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.6</name>
+ <description>NAT.6 : Two or more COMPs if connected to different potential are not allowed under same NAT layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.7</name>
+ <description>NAT.7 : Minimum NAT to NAT spacing. : 0.74µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.8</name>
+ <description>NAT.8 : Min. Dualgate overlap of NAT (for 5V/6V) native VT NMOS only.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.9</name>
+ <description>NAT.9 : Poly interconnect under NAT layer is not allowed, minimum spacing of un-related poly from the NAT layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.10</name>
+ <description>NAT.10 : Nwell, inside NAT layer are not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.11</name>
+ <description>NAT.11 : NCOMP not intersecting to Poly2, is not allowed inside NAT layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>NAT.12</name>
+ <description>NAT.12 : Poly2 not intersecting with COMP is not allowed inside NAT (Poly2 resistor is not allowed inside NAT).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>BJT.1</name>
+ <description>BJT.1 : Min. DRC_BJT overlap of DNWELL for NPN BJT.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>BJT.2</name>
+ <description>BJT.2 : Min. DRC_BJT overlap of PCOM in Psub.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>BJT.3</name>
+ <description>BJT.3 : Minimum space of DRC_BJT layer to unrelated COMP. : 0.1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>DE.2</name>
+ <description>DE.2 : Minimum NDMY or PMNDMY size (x or y dimension in um). : 0.8µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>DE.3</name>
+ <description>DE.3 : If size greater than 15000 um2 then two sides should not be greater than (um).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>DE.4</name>
+ <description>DE.4 : Minimum NDMY to NDMY space (Merge if space is less). : 20µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>LVS_BJT.1</name>
+ <description>LVS_BJT.1 : Minimum LVS_BJT enclosure of NPN or PNP Emitter COMP layers</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.DF.3a</name>
+ <description>O.DF.3a : Min. COMP Space. P-substrate tap (PCOMP outside NWELL) can be butted for different voltage devices as the potential is same. : 0.24µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.DF.6</name>
+ <description>O.DF.6 : Min. COMP extend beyond poly2 (it also means source/drain overhang). : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.DF.9</name>
+ <description>O.DF.9 : Min. COMP area (um2). : 0.1444µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.2</name>
+ <description>O.PL.2 : Min. poly2 width. : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.3a</name>
+ <description>O.PL.3a : Min. poly2 Space on COMP. : 0.18µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.4</name>
+ <description>O.PL.4 : Min. extension beyond COMP to form Poly2 end cap. : 0.14µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.2</name>
+ <description>O.SB.2 : Min. salicide Block Space. : 0.28µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.3</name>
+ <description>O.SB.3 : Min. space from salicide block to unrelated COMP. : 0.09µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.4</name>
+ <description>O.SB.4 : Min. space from salicide block to contact.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.5b_3.3V</name>
+ <description>O.SB.5b_3.3V : Min. space from salicide block to unrelated Poly2 on COMP. : 0.1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.9</name>
+ <description>O.SB.9 : Min. salicide block extension beyond unsalicided Poly2. : 0.1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.11</name>
+ <description>O.SB.11 : Min. salicide block overlap with COMP. : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.13_3.3V</name>
+ <description>O.SB.13_3.3V : Min. area of silicide block (um2). : 1.488µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.SB.13_5V</name>
+ <description>O.SB.13_5V : Min. area of silicide block (um2). : 2µm²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.CO.7</name>
+ <description>O.CO.7 : Min. space from COMP contact to Poly2 on COMP. : 0.13µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>O.PL.ORT</name>
+ <description>O.PL.ORT : Orientation-restricted gates must have the gate width aligned along the X-axis (poly line running horizontally) in reference to wafer notch down. : 0µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.01</name>
+ <description>EF.01 : Min. (Poly2 butt PLFUSE) within EFUSE_MK and Pplus.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.02</name>
+ <description>EF.02 : Min. Max. PLFUSE width. : 0.18µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.03</name>
+ <description>EF.03 : Min. Max. PLFUSE length. : 1.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04a</name>
+ <description>EF.04a : Min. Max. PLFUSE overlap Poly2 (coinciding permitted) and touch cathode and anode.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04b</name>
+ <description>EF.04b : PLFUSE must be rectangular. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04c</name>
+ <description>EF.04c : Cathode Poly2 must be rectangular. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.04d</name>
+ <description>EF.04d : Anode Poly2 must be rectangular. : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.05</name>
+ <description>EF.05 : Min./Max. LVS_Source overlap Poly2 (at Anode).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.06</name>
+ <description>EF.06 : Min./Max. Cathode Poly2 width. : 2.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.07</name>
+ <description>EF.07 : Min./Max. Cathode Poly2 length. : 1.84µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.08</name>
+ <description>EF.08 : Min./Max. Anode Poly2 width. : 1.06µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.09</name>
+ <description>EF.09 : Min./Max. Anode Poly2 length. : 2.43µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.10</name>
+ <description>EF.10 : Min. Cathode Poly2 to Poly2 space. : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.11</name>
+ <description>EF.11 : Min. Anode Poly2 to Poly2 space. : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.12</name>
+ <description>EF.12 : Min. Space of Cathode Contact to PLFUSE end.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.13</name>
+ <description>EF.13 : Min. Space of Anode Contact to PLFUSE end.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.14</name>
+ <description>EF.14 : Min. EFUSE_MK enclose LVS_Source.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.15</name>
+ <description>EF.15 : NO Contact is allowed to touch PLFUSE.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.16a</name>
+ <description>EF.16a : Cathode must contain exact number of Contacts at each ends. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.16b</name>
+ <description>EF.16b : Anode must contain exact number of Contacts at each ends. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.17</name>
+ <description>EF.17 : Min. Space of EFUSE_MK to EFUSE_MK. : 0.26µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.18</name>
+ <description>EF.18 : PLFUSE must sit on field oxide (NOT COMP), no cross with any COMP, Nplus, Pplus, ESD, SAB, Resistor, Metal1, Metal2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.19</name>
+ <description>EF.19 : Min. PLFUSE space to Metal1, Metal2.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.20</name>
+ <description>EF.20 : Min. PLFUSE space to COMP, Nplus, Pplus, Resistor, ESD, SAB. : 2.73µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.21</name>
+ <description>EF.21 : Min./Max. eFUSE Poly2 length. : 5.53µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.22a</name>
+ <description>EF.22a : Min./Max. Cathode Poly2 overlap with PLFUSE in width direction. : 1.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>EF.22b</name>
+ <description>EF.22b : Min./Max. Anode Poly2 overlap with PLFUSE in width direction. : 0.44µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.1</name>
+ <description>MDN.1 : Min MVSD width (for litho purpose). : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.2a</name>
+ <description>MDN.2a : Min MVSD space [Same Potential]. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.2b</name>
+ <description>MDN.2b : Min MVSD space [Diff Potential]. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.3a</name>
+ <description>MDN.3a : Min transistor channel length. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.3b</name>
+ <description>MDN.3b : Max transistor channel length: 20 um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.4a</name>
+ <description>MDN.4a : Min transistor channel width. : 4 µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.4b</name>
+ <description>MDN.4b : Max transistor channel width. : 50 um </description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5ai</name>
+ <description>MDN.5ai : Min PCOMP (Pplus AND COMP) space to LDNMOS Drain MVSD (source and body tap non-butted). PCOMP (Pplus AND COMP) intercept with LDNMOS Drain MVSD is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5aii</name>
+ <description>MDN.5aii : Min PCOMP (Pplus AND COMP) space to LDNMOS Drain MVSD (source and body tap butted). PCOMP (Pplus AND COMP) intercept with LDNMOS Drain MVSD is not allowed. : 0.92µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5b</name>
+ <description>MDN.5b : Min PCOMP (Pplus AND COMP) space to LDNMOS Source (Nplus AND COMP). Use butted source and p-substrate tab otherwise and that is good for Latch-up immunity as well.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.5c</name>
+ <description>MDN.5c : Maximum distance of the nearest edge of the substrate tab from NCOMP edge. : 15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.6</name>
+ <description>MDN.6 : ALL LDNMOS shall be covered by Dualgate layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.6a</name>
+ <description>MDN.6a : Min Dualgate enclose NCOMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.7</name>
+ <description>MDN.7 : Each LDNMOS shall be covered by LDMOS_XTOR (GDS#226) mark layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.7a</name>
+ <description>MDN.7a : Min LDMOS_XTOR enclose Dualgate.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.8a</name>
+ <description>MDN.8a : Min LDNMOS drain MVSD space to any other equal potential Nwell space.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.8b</name>
+ <description>MDN.8b : Min LDNMOS drain MVSD space to any other different potential Nwell space.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.9</name>
+ <description>MDN.9 : Min LDNMOS drain MVSD space to NCOMP (Nplus AND COMP) outside LDNMOS drain MVSD. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10a</name>
+ <description>MDN.10a : Min LDNMOS POLY2 width. : 1.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10b</name>
+ <description>MDN.10b : Min POLY2 extension beyond COMP in the width direction of the transistor (other than the LDNMOS drain direction). : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10c</name>
+ <description>MDN.10c : Min/Max POLY2 extension beyond COMP on the field towards LDNMOS drain COMP direction.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10d</name>
+ <description>MDN.10d : Min/Max POLY2 on field space to LDNMOS drain COMP.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10ei</name>
+ <description>MDN.10ei : Min POLY2 space to Psub tap (source and body tap non-butted).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10eii</name>
+ <description>MDN.10eii : Min POLY2 space to Psub tap (source and body tap butted). : 0.32µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.10f</name>
+ <description>MDN.10f : Poly2 interconnect in HV region (LDMOS_XTOR marked region) not allowed. Also, any Poly2 interconnect with poly2 to substrate potential greater than 6V is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.11</name>
+ <description>MDN.11 : Min/Max MVSD overlap channel COMP ((((LDMOS_XTOR AND MVSD) AND COMP) AND POLY2) AND NPlus).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.12</name>
+ <description>MDN.12 : Min MVSD enclose NCOMP in the LDNMOS drain and in the direction along the transistor width.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13a</name>
+ <description>MDN.13a : Max single finger width. : 50µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13b</name>
+ <description>MDN.13b : Layout shall have alternative source & drain.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13c</name>
+ <description>MDN.13c : Both sides of the transistor shall be terminated by source.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.13d</name>
+ <description>MDN.13d : Every two poly fingers shall be surrounded by a P-sub guard ring. (Exclude the case when each LDNMOS transistor have full width butting to well tap).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.14</name>
+ <description>MDN.14 : Min MVSD space to any DNWELL.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.15a</name>
+ <description>MDN.15a : Min LDNMOS drain COMP width. : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.15b</name>
+ <description>MDN.15b : Min LDNMOS drain COMP enclose contact. : 0µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDN.17</name>
+ <description>MDN.17 : It is recommended to surround the LDNMOS transistor with non-broken Psub guard ring to improve the latch up immunity. Guideline to improve the latch up immunity.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.1</name>
+ <description>MDP.1 : Minimum transistor channel length. : 0.6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.1a</name>
+ <description>MDP.1a : Max transistor channel length.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.2</name>
+ <description>MDP.2 : Minimum transistor channel width. : 4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3</name>
+ <description>MDP.3 : Each LDPMOS shall be surrounded by non-broken Nplus guard ring inside DNWELL</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3ai</name>
+ <description>MDP.3ai : Min NCOMP (Nplus AND COMP) space to MVPSD (source and body tap non-butted). NCOMP (Nplus AND COMP) intercept with MVPSD is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3aii</name>
+ <description>MDP.3aii : Min NCOMP (Nplus AND COMP) space to MVPSD (source and body tap butted). NCOMP (Nplus AND COMP) intercept with MVPSD is not allowed.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3b</name>
+ <description>MDP.3b : Min NCOMP (Nplus AND COMP) space to PCOMP in DNWELL (Pplus AND COMP AND DNWELL). Use butted source and DNWELL contacts otherwise and that is best for Latch-up immunity as well. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3c</name>
+ <description>MDP.3c : Maximum distance of the nearest edge of the DNWELL tab (NCOMP inside DNWELL) from PCOMP edge (PCOMP inside DNWELL). : 15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.3d</name>
+ <description>MDP.3d : The metal connection for the Nplus guard ring recommended to be continuous. The maximum gap between this metal if broken. Note: To put maximum number of contact under metal for better manufacturability and reliability. : 10µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.4</name>
+ <description>MDP.4 : DNWELL covering LDPMOS shall be surrounded by non broken Pplus guard. The metal connection for the Pplus guard ring recommended to be continuous, The maximum gap between this metal if broken. Note: To put maximum number of contact under metal for better manufacturability and reliability.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.4a</name>
+ <description>MDP.4a : Min PCOMP (Pplus AND COMP) space to DNWELL. : 2.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.4b</name>
+ <description>MDP.4b : Maximum distance of the nearest edge of the DNWELL from the PCOMP Guard ring outside DNWELL. : 15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.5</name>
+ <description>MDP.5 : Each LDPMOS shall be covered by Dualgate layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.5a</name>
+ <description>MDP.5a : Minimum Dualgate enclose Plus guarding ring PCOMP (Pplus AND COMP). : 0.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.6</name>
+ <description>MDP.6 : Each LDPMOS shall be covered by LDMOS_XTOR (GDS#226) layer.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.6a</name>
+ <description>MDP.6a : Minimum LDMOS_XTOR enclose Dualgate.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.7</name>
+ <description>MDP.7 : Minimum LDMOS_XTOR layer space to Nwell outside LDMOS_XTOR. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.8</name>
+ <description>MDP.8 : Minimum LDMOS_XTOR layer space to NCOMP outside LDMOS_XTOR. : 1.5µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9a</name>
+ <description>MDP.9a : Min LDPMOS POLY2 width. : 1.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9b</name>
+ <description>MDP.9b : Min POLY2 extension beyond COMP in the width direction of the transistor (other than the LDMOS drain direction). : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9c</name>
+ <description>MDP.9c : Min/Max POLY2 extension beyond COMP on the field towards LDPMOS drain (MVPSD AND COMP AND Pplus NOT POLY2) direction.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9d</name>
+ <description>MDP.9d : Min/Max POLY2 on field to LDPMOS drain COMP (MVPSD AND COMP AND Pplus NOT POLY2) space.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9ei</name>
+ <description>MDP.9ei : Min LDMPOS gate Poly2 space to Nplus guardring (source and body tap non-butted).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9eii</name>
+ <description>MDP.9eii : Min LDMPOS gate Poly2 space to Nplus guardring (source and body tap butted).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.9f</name>
+ <description>MDP.9f : Poly2 interconnect is not allowed in LDPMOS region (LDMOS_XTOR marked region). : -µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.10</name>
+ <description>MDP.10 : Min/Max MVPSD overlap onto the channel (LDMOS_XTOR AND COMP AND POLY2 AND Pplus).</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.10a</name>
+ <description>MDP.10a : Min MVPSD space within LDMOS_XTOR marking [diff potential]. : 2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.10b</name>
+ <description>MDP.10b : Min MVPSD space [same potential]. Merge if space less than 1um. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.11</name>
+ <description>MDP.11 : Min MVPSD enclosing PCOMP in the drain (MVPSD AND COMP NOT POLY2) direction and in the direction along the transistor width.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.12</name>
+ <description>MDP.12 : Min DNWELL enclose Nplus guard ring (NCOMP). : 0.66µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.13a</name>
+ <description>MDP.13a : Max single finger width. : 50µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.13b</name>
+ <description>MDP.13b : Layout shall have alternative source & drain.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.13c</name>
+ <description>MDP.13c : Both sides of the transistor shall be terminated by source.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.15</name>
+ <description>MDP.15 : Min DNWELL enclosing MVPSD to any DNWELL spacing. : 6µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.16a</name>
+ <description>MDP.16a : Min LDPMOS drain COMP width. : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.16b</name>
+ <description>MDP.16b : Min LDPMOS drain COMP enclose contact. : 0µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.17a</name>
+ <description>MDP.17a : For better latch up immunity, it is necessary to put DNWELL guard ring between MVPSD Inside DNWELL covered by LDMOS_XTOR and NCOMP (outside DNWELL and outside Nwell) when spacing between them is less than 40um.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>MDP.17c</name>
+ <description>MDP.17c : DNWELL guard ring shall have NCOMP tab to be connected to highest potential</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.NW.2b_3.3V</name>
+ <description>Y.NW.2b_3.3V : Min. Nwell Space (Outside DNWELL, Inside YMTP_MK) [Different potential]. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.NW.2b_5V</name>
+ <description>Y.NW.2b_5V : Min. Nwell Space (Outside DNWELL, Inside YMTP_MK) [Different potential]. : 1µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.DF.6_5V</name>
+ <description>Y.DF.6_5V : Min. COMP extend beyond gate (it also means source/drain overhang) inside YMTP_MK. : 0.15µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.DF.16_3.3V</name>
+ <description>Y.DF.16_3.3V : Min. space from (Nwell outside DNWELL) to (unrelated NCOMP outside Nwell and DNWELL) (inside YMTP_MK). : 0.27µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.DF.16_5V</name>
+ <description>Y.DF.16_5V : Min. space from (Nwell outside DNWELL) to (unrelated NCOMP outside Nwell and DNWELL) (inside YMTP_MK). : 0.23µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.1_3.3V</name>
+ <description>Y.PL.1_3.3V : Interconnect Width (inside YMTP_MK). : 0.13µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.1_5V</name>
+ <description>Y.PL.1_5V : Interconnect Width (inside YMTP_MK). This rule is currently not applicable for 5V.</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.2_3.3V</name>
+ <description>Y.PL.2_3.3V : Gate Width (Channel Length) (inside YMTP_MK). : 0.13µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.2_5V</name>
+ <description>Y.PL.2_5V : Gate Width (Channel Length) (inside YMTP_MK). : 0.47µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.4_5V</name>
+ <description>Y.PL.4_5V : Poly2 extension beyond COMP to form Poly2 end cap (inside YMTP_MK). : 0.16µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5a_3.3V</name>
+ <description>Y.PL.5a_3.3V : Space from field Poly2 to unrelated COMP (inside YMTP_MK). Space from field Poly2 to Guard-ring (inside YMTP_MK). : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5a_5V</name>
+ <description>Y.PL.5a_5V : Space from field Poly2 to unrelated COMP (inside YMTP_MK). Space from field Poly2 to Guard-ring (inside YMTP_MK). : 0.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5b_3.3V</name>
+ <description>Y.PL.5b_3.3V : Space from field Poly2 to related COMP (inside YMTP_MK). : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>Y.PL.5b_5V</name>
+ <description>Y.PL.5b_5V : Space from field Poly2 to related COMP (inside YMTP_MK). : 0.2µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.4c_MV</name>
+ <description>S.DF.4c_MV : Min. (Nwell overlap of PCOMP) outside DNWELL. : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.6_MV</name>
+ <description>S.DF.6_MV : Min. COMP extend beyond gate (it also means source/drain overhang). : 0.32µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.7_MV</name>
+ <description>S.DF.7_MV : Min. (LVPWELL Spacer to PCOMP) inside DNWELL. : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.8_MV</name>
+ <description>S.DF.8_MV : Min. (LVPWELL overlap of NCOMP) Inside DNWELL. : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.16_MV</name>
+ <description>S.DF.16_MV : Min. space from (Nwell outside DNWELL) to (NCOMP outside Nwell and DNWELL). : 0.45µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.PL.5a_MV</name>
+ <description>S.PL.5a_MV : Space from field Poly2 to unrelated COMP Spacer from field Poly2 to Guard-ring. : 0.12µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.PL.5b_MV</name>
+ <description>S.PL.5b_MV : Space from field Poly2 to related COMP. : 0.12µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.4_MV</name>
+ <description>S.CO.4_MV : COMP overlap of contact. : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.4c_LV</name>
+ <description>S.DF.4c_LV : Min. (Nwell overlap of PCOMP) outside DNWELL. : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.DF.16_LV</name>
+ <description>S.DF.16_LV : Min. space from (Nwell outside DNWELL) to (NCOMP outside Nwell and DNWELL). : 0.4µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.3_LV</name>
+ <description>S.CO.3_LV : Poly2 overlap of contact. : 0.04µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.4_LV</name>
+ <description>S.CO.4_LV : COMP overlap of contact. : 0.03µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.CO.6_ii_LV</name>
+ <description>S.CO.6_ii_LV : (ii) If Metal1 overlaps contact by < 0.04um on one side, adjacent metal1 edges overlap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>S.M1.1_LV</name>
+ <description>S.M1.1_LV : min. metal1 width : 0.22µm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on comp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_angle</name>
+ <description>ACUTE : non 45 degree angle comp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>ACUTE : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>ACUTE : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvpwell_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvpwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvpwell_angle</name>
+ <description>ACUTE : non 45 degree angle lvpwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dualgate_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on dualgate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dualgate_angle</name>
+ <description>ACUTE : non 45 degree angle dualgate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on poly2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_angle</name>
+ <description>ACUTE : non 45 degree angle poly2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nplus_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on nplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nplus_angle</name>
+ <description>ACUTE : non 45 degree angle nplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pplus_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pplus_angle</name>
+ <description>ACUTE : non 45 degree angle pplus</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sab_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on sab</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sab_angle</name>
+ <description>ACUTE : non 45 degree angle sab</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on esd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_angle</name>
+ <description>ACUTE : non 45 degree angle esd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>contact_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on contact</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>contact_angle</name>
+ <description>ACUTE : non 45 degree angle contact</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_angle</name>
+ <description>ACUTE : non 45 degree angle metal1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via1_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via1_angle</name>
+ <description>ACUTE : non 45 degree angle via1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_angle</name>
+ <description>ACUTE : non 45 degree angle metal2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>ACUTE : non 45 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_angle</name>
+ <description>ACUTE : non 45 degree angle metal3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>ACUTE : non 45 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_angle</name>
+ <description>ACUTE : non 45 degree angle metal4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>ACUTE : non 45 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_angle</name>
+ <description>ACUTE : non 45 degree angle metal5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via5_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on via5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via5_angle</name>
+ <description>ACUTE : non 45 degree angle via5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>ACUTE : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>resistor_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on resistor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>resistor_angle</name>
+ <description>ACUTE : non 45 degree angle resistor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fhres_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on fhres</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fhres_angle</name>
+ <description>ACUTE : non 45 degree angle fhres</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusetop_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on fusetop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusetop_angle</name>
+ <description>ACUTE : non 45 degree angle fusetop</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusewindow_d_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on fusewindow_d</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>fusewindow_d_angle</name>
+ <description>ACUTE : non 45 degree angle fusewindow_d</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>polyfuse_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on polyfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>polyfuse_angle</name>
+ <description>ACUTE : non 45 degree angle polyfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvsd_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mvsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvsd_angle</name>
+ <description>ACUTE : non 45 degree angle mvsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvpsd_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mvpsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mvpsd_angle</name>
+ <description>ACUTE : non 45 degree angle mvpsd</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nat_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on nat</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nat_angle</name>
+ <description>ACUTE : non 45 degree angle nat</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on comp_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle comp_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on poly2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle poly2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_dummy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_dummy_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop_dummy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on comp_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>comp_label_angle</name>
+ <description>ACUTE : non 45 degree angle comp_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on poly2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly2_label_angle</name>
+ <description>ACUTE : non 45 degree angle poly2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_label_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_label_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_label_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop_label</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_slot_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metaltop_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metaltop_slot_angle</name>
+ <description>ACUTE : non 45 degree angle metaltop_slot</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmpperi_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ubmpperi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmpperi_angle</name>
+ <description>ACUTE : non 45 degree angle ubmpperi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmparray_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ubmparray</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmparray_angle</name>
+ <description>ACUTE : non 45 degree angle ubmparray</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmeplate_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ubmeplate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ubmeplate_angle</name>
+ <description>ACUTE : non 45 degree angle ubmeplate</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>schottky_diode_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on schottky_diode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>schottky_diode_angle</name>
+ <description>ACUTE : non 45 degree angle schottky_diode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>zener_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on zener</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>zener_angle</name>
+ <description>ACUTE : non 45 degree angle zener</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>res_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on res_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>res_mk_angle</name>
+ <description>ACUTE : non 45 degree angle res_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>opc_drc_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on opc_drc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>opc_drc_angle</name>
+ <description>ACUTE : non 45 degree angle opc_drc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ndmy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ndmy_angle</name>
+ <description>ACUTE : non 45 degree angle ndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pmndmy_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pmndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pmndmy_angle</name>
+ <description>ACUTE : non 45 degree angle pmndmy</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>v5_xtor_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on v5_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>v5_xtor_angle</name>
+ <description>ACUTE : non 45 degree angle v5_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap_mk_angle</name>
+ <description>ACUTE : non 45 degree angle cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mos_cap_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mos_cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mos_cap_mk_angle</name>
+ <description>ACUTE : non 45 degree angle mos_cap_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ind_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ind_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ind_mk_angle</name>
+ <description>ACUTE : non 45 degree angle ind_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diode_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diode_mk_angle</name>
+ <description>ACUTE : non 45 degree angle diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>drc_bjt_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on drc_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>drc_bjt_angle</name>
+ <description>ACUTE : non 45 degree angle drc_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_bjt_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_bjt_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_bjt</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mim_l_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mim_l_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mim_l_mk_angle</name>
+ <description>ACUTE : non 45 degree angle mim_l_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>latchup_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on latchup_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>latchup_mk_angle</name>
+ <description>ACUTE : non 45 degree angle latchup_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>guard_ring_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on guard_ring_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>guard_ring_mk_angle</name>
+ <description>ACUTE : non 45 degree angle guard_ring_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>otp_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on otp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>otp_mk_angle</name>
+ <description>ACUTE : non 45 degree angle otp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mtpmark_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mtpmark</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mtpmark_angle</name>
+ <description>ACUTE : non 45 degree angle mtpmark</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>neo_ee_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on neo_ee_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>neo_ee_mk_angle</name>
+ <description>ACUTE : non 45 degree angle neo_ee_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sramcore_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on sramcore</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>sramcore_angle</name>
+ <description>ACUTE : non 45 degree angle sramcore</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_rf_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_rf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_rf_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_rf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_drain_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_drain</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_drain_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_drain</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvpolyrs_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on hvpolyrs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvpolyrs_angle</name>
+ <description>ACUTE : non 45 degree angle hvpolyrs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_io_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_io</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_io_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_io</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>probe_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on probe_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>probe_mk_angle</name>
+ <description>ACUTE : non 45 degree angle probe_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on esd_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>esd_mk_angle</name>
+ <description>ACUTE : non 45 degree angle esd_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_source_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on lvs_source</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvs_source_angle</name>
+ <description>ACUTE : non 45 degree angle lvs_source</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>well_diode_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on well_diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>well_diode_mk_angle</name>
+ <description>ACUTE : non 45 degree angle well_diode_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ldmos_xtor_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ldmos_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ldmos_xtor_angle</name>
+ <description>ACUTE : non 45 degree angle ldmos_xtor</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>plfuse_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on plfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>plfuse_angle</name>
+ <description>ACUTE : non 45 degree angle plfuse</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>efuse_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on efuse_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>efuse_mk_angle</name>
+ <description>ACUTE : non 45 degree angle efuse_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mcell_feol_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mcell_feol_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mcell_feol_mk_angle</name>
+ <description>ACUTE : non 45 degree angle mcell_feol_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ymtp_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on ymtp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ymtp_mk_angle</name>
+ <description>ACUTE : non 45 degree angle ymtp_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dev_wf_mk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on dev_wf_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dev_wf_mk_angle</name>
+ <description>ACUTE : non 45 degree angle dev_wf_mk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metalt_blk_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metalt_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metalt_blk_angle</name>
+ <description>ACUTE : non 45 degree angle metalt_blk</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pr_bndry_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on pr_bndry</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pr_bndry_angle</name>
+ <description>ACUTE : non 45 degree angle pr_bndry</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mdiode_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on mdiode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mdiode_angle</name>
+ <description>ACUTE : non 45 degree angle mdiode</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal1_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal1_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal1_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal2_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal2_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal2_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal3_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal3_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal3_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal4_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal4_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal4_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal5_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal5_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal5_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal6_res_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on metal6_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>metal6_res_angle</name>
+ <description>ACUTE : non 45 degree angle metal6_res</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>border_OFFGRID</name>
+ <description>OFFGRID : OFFGRID vertex on border</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>border_angle</name>
+ <description>ACUTE : non 45 degree angle border</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/user_project_wrapper.xor.gds b/mpw_precheck/outputs/user_project_wrapper.xor.gds
new file mode 100644
index 0000000..68fe441
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.xor.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..156b6a7
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_erased.gds b/mpw_precheck/outputs/user_project_wrapper_erased.gds
new file mode 100644
index 0000000..563f325
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_erased.gds
Binary files differ
diff --git a/signoff/.gitignore b/signoff/.gitignore
new file mode 100644
index 0000000..6407046
--- /dev/null
+++ b/signoff/.gitignore
@@ -0,0 +1 @@
+cdrcpost/*
diff --git a/signoff/assigned_slot b/signoff/assigned_slot
new file mode 100644
index 0000000..cadb715
--- /dev/null
+++ b/signoff/assigned_slot
@@ -0,0 +1 @@
+030
diff --git a/tapeout/logs/gds.info b/tapeout/logs/gds.info
new file mode 100644
index 0000000..69c1d7e
--- /dev/null
+++ b/tapeout/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: a5b78e1dee205485a829ba28cdd3753d8636ecf7
\ No newline at end of file
diff --git a/tapeout/logs/gen_gpio_defaults.log b/tapeout/logs/gen_gpio_defaults.log
new file mode 100644
index 0000000..6d24557
--- /dev/null
+++ b/tapeout/logs/gen_gpio_defaults.log
@@ -0,0 +1,79 @@
+Step 1: Create new cells for new GPIO default vectors.
+Creating new layout file /root/project/mag/gpio_defaults_block_009.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_009.v
+Layout file /root/project/mag/gpio_defaults_block_009.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_009.v already exists and does not need to be generated.
+Creating new layout file /root/project/mag/gpio_defaults_block_007.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_007.v
+Creating new layout file /root/project/mag/gpio_defaults_block_087.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_087.v
+Layout file /root/project/mag/gpio_defaults_block_007.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_007.v already exists and does not need to be generated.
+Creating new layout file /root/project/mag/gpio_defaults_block_008.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
+Step 2: Modify top-level layouts to use the specified defaults.
+Done.
diff --git a/tapeout/logs/git.info b/tapeout/logs/git.info
new file mode 100644
index 0000000..f72366f
--- /dev/null
+++ b/tapeout/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/egorxe/ophelia_fpga_openmpw.git
+Branch: HEAD
+Commit: 4b407974710e71322cb6270d812c2b44b3e13cbb
\ No newline at end of file
diff --git a/tapeout/logs/git_clone.log b/tapeout/logs/git_clone.log
new file mode 100644
index 0000000..482e0ac
--- /dev/null
+++ b/tapeout/logs/git_clone.log
@@ -0,0 +1,20 @@
+https://github.com/egorxe/ophelia_fpga_openmpw.git
+Cloning into '/root/project'...
+Note: switching to '4b407974710e71322cb6270d812c2b44b3e13cbb'.
+
+You are in 'detached HEAD' state. You can look around, make experimental
+changes and commit them, and you can discard any commits you make in this
+state without impacting any branches by switching back to a branch.
+
+If you want to create a new branch to retain commits you create, you may
+do so (now or later) by using -c with the switch command. Example:
+
+ git switch -c <new-branch-name>
+
+Or undo this operation with:
+
+ git switch -
+
+Turn off this advice by setting config variable advice.detachedHead to false
+
+HEAD is now at 4b40797 Fixed errors found during gatelevel simulation. Updated GDS.
diff --git a/tapeout/logs/klayout_gds2oas.log b/tapeout/logs/klayout_gds2oas.log
new file mode 100644
index 0000000..e1c0a11
--- /dev/null
+++ b/tapeout/logs/klayout_gds2oas.log
@@ -0,0 +1 @@
+[INFO] Changing from /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/tapeout/fafaa606-1d8b-46f1-9a02-ae2e7c5d65af/outputs/caravel_180045d6.gds to /mnt/uffs/user/u9789_egorxe/design/ophelia_efpga/jobs/tapeout/fafaa606-1d8b-46f1-9a02-ae2e7c5d65af/outputs/caravel_180045d6.oas
diff --git a/tapeout/logs/oasis.info b/tapeout/logs/oasis.info
new file mode 100644
index 0000000..bf31d69
--- /dev/null
+++ b/tapeout/logs/oasis.info
@@ -0,0 +1 @@
+caravel_180045d6.oas: 14fae5065a2b3811334a4421d8409651f25474c7
\ No newline at end of file
diff --git a/tapeout/logs/pdks.info b/tapeout/logs/pdks.info
new file mode 100644
index 0000000..daefa55
--- /dev/null
+++ b/tapeout/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs: b8c6129fb60851c452a3136c2b8c603bb92cb180
+gf180mcuC PDK: a897aa30369d3bcec87d9d50ce9b01f320f854ef
\ No newline at end of file
diff --git a/tapeout/logs/set_user_id.log b/tapeout/logs/set_user_id.log
new file mode 100644
index 0000000..0ddf675
--- /dev/null
+++ b/tapeout/logs/set_user_id.log
@@ -0,0 +1,10 @@
+Project Chip ID is: 402671062
+Setting Project Chip ID to: 180045d6
+Step 1: Modify Layout of the user_id_programming subcell
+Done!
+Step 2: Add user project ID parameter to source verilog.
+Done!
+Step 3: Add user project ID parameter to gate-level verilog.
+Done!
+Step 4: Add user project ID text to top level layout.
+Done!
diff --git a/tapeout/logs/ship_truck.log b/tapeout/logs/ship_truck.log
new file mode 100644
index 0000000..1d37374
--- /dev/null
+++ b/tapeout/logs/ship_truck.log
@@ -0,0 +1,3783 @@
+
+Magic 8.3 revision 348 - Compiled on Mon Dec 12 01:04:33 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology gf180mcuC ...
+10 Magic internal units = 1 Lambda
+Input style import: scaleFactor=10, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ obsactive mvobsactive filldiff fillpoly m1hole obsm1 fillm1 obsv1 m2hole obsm2 fillm2 obsv2 m3hole obsm3 fillm3 m4hole obsm4 fillm4 m5hole obsm5 fillm5 glass fillblock lvstext obscomment
+Scaled tech values by 10 / 1 to match internal grid scaling
+Loading gf180mcuC Device Generator Menu ...
+Loading "/opt/scripts/mag2gds_gf180.tcl" from command line.
+Scaled magic input cell user_project_wrapper geometry by factor of 2
+user_project_wrapper: 10000 rects
+user_project_wrapper: 20000 rects
+user_project_wrapper: 30000 rects
+user_project_wrapper: 40000 rects
+user_project_wrapper: 50000 rects
+user_project_wrapper: 60000 rects
+user_project_wrapper: 70000 rects
+user_project_wrapper: 80000 rects
+user_project_wrapper: 90000 rects
+user_project_wrapper: 100000 rects
+user_project_wrapper: 110000 rects
+user_project_wrapper: 120000 rects
+user_project_wrapper: 130000 rects
+caravel_core: 10000 rects
+caravel_core: 20000 rects
+caravel_core: 30000 rects
+caravel_core: 40000 rects
+caravel_core: 50000 rects
+caravel_core: 60000 rects
+caravel_core: 70000 rects
+caravel_core: 80000 rects
+caravel_core: 90000 rects
+caravel_core: 100000 rects
+caravel_core: 110000 rects
+caravel_core: 120000 rects
+caravel_core: 130000 rects
+caravel_core: 140000 rects
+caravel_core: 150000 rects
+caravel_core: 160000 rects
+caravel_core: 170000 rects
+caravel_core: 180000 rects
+caravel_core: 190000 rects
+caravel_core: 200000 rects
+caravel_core: 210000 rects
+caravel_core: 220000 rects
+caravel_core: 230000 rects
+caravel_core: 240000 rects
+caravel_core: 250000 rects
+caravel_core: 260000 rects
+caravel_core: 270000 rects
+caravel_core: 280000 rects
+caravel_core: 290000 rects
+caravel_core: 300000 rects
+caravel_core: 310000 rects
+caravel_core: 320000 rects
+caravel_core: 330000 rects
+caravel_core: 340000 rects
+caravel_core: 350000 rects
+caravel_core: 360000 rects
+caravel_core: 370000 rects
+caravel_core: 380000 rects
+caravel_core: 390000 rects
+caravel_core: 400000 rects
+caravel_core: 410000 rects
+caravel_core: 420000 rects
+caravel_core: 430000 rects
+caravel_core: 440000 rects
+caravel_core: 450000 rects
+caravel_core: 460000 rects
+caravel_core: 470000 rects
+caravel_core: 480000 rects
+caravel_core: 490000 rects
+caravel_core: 500000 rects
+caravel_core: 510000 rects
+caravel_core: 520000 rects
+caravel_core: 530000 rects
+caravel_core: 540000 rects
+caravel_core: 550000 rects
+caravel_core: 560000 rects
+caravel_core: 570000 rects
+caravel_core: 580000 rects
+caravel_core: 590000 rects
+caravel_core: 600000 rects
+caravel_core: 610000 rects
+caravel_core: 620000 rects
+caravel_core: 630000 rects
+caravel_core: 640000 rects
+caravel_core: 650000 rects
+caravel_core: 660000 rects
+caravel_core: 670000 rects
+caravel_core: 680000 rects
+caravel_core: 690000 rects
+caravel_core: 700000 rects
+caravel_core: 710000 rects
+caravel_core: 720000 rects
+caravel_core: 730000 rects
+caravel_core: 740000 rects
+caravel_core: 750000 rects
+caravel_core: 760000 rects
+caravel_core: 770000 rects
+caravel_core: 780000 rects
+caravel_core: 790000 rects
+caravel_core: 800000 rects
+caravel_core: 810000 rects
+caravel_core: 820000 rects
+caravel_core: 830000 rects
+caravel_core: 840000 rects
+caravel_core: 850000 rects
+caravel_core: 860000 rects
+caravel_core: 870000 rects
+caravel_core: 880000 rects
+caravel_core: 890000 rects
+caravel_core: 900000 rects
+caravel_core: 910000 rects
+caravel_core: 920000 rects
+caravel_core: 930000 rects
+caravel_core: 940000 rects
+caravel_core: 950000 rects
+caravel_core: 960000 rects
+caravel_core: 970000 rects
+caravel_core: 980000 rects
+caravel_core: 990000 rects
+caravel_core: 1000000 rects
+caravel_core: 1010000 rects
+caravel_core: 1020000 rects
+caravel_core: 1030000 rects
+caravel_core: 1040000 rects
+caravel_core: 1050000 rects
+caravel_core: 1060000 rects
+caravel_core: 1070000 rects
+caravel_core: 1080000 rects
+caravel_core: 1090000 rects
+caravel_core: 1100000 rects
+caravel_core: 1110000 rects
+caravel_core: 1120000 rects
+caravel_core: 1130000 rects
+caravel_core: 1140000 rects
+caravel_core: 1150000 rects
+caravel_core: 1160000 rects
+caravel_core: 1170000 rects
+caravel_core: 1180000 rects
+caravel_core: 1190000 rects
+caravel_core: 1200000 rects
+caravel_core: 1210000 rects
+caravel_core: 1220000 rects
+caravel_core: 1230000 rects
+caravel_core: 1240000 rects
+caravel_core: 1250000 rects
+caravel_core: 1260000 rects
+caravel_core: 1270000 rects
+caravel_core: 1280000 rects
+caravel_core: 1290000 rects
+caravel_core: 1300000 rects
+caravel_core: 1310000 rects
+caravel_core: 1320000 rects
+caravel_core: 1330000 rects
+caravel_core: 1340000 rects
+caravel_core: 1350000 rects
+caravel_core: 1360000 rects
+caravel_core: 1370000 rects
+caravel_core: 1380000 rects
+caravel_core: 1390000 rects
+caravel_core: 1400000 rects
+caravel_core: 1410000 rects
+caravel_core: 1420000 rects
+caravel_core: 1430000 rects
+caravel_core: 1440000 rects
+caravel_core: 1450000 rects
+caravel_core: 1460000 rects
+caravel_core: 1470000 rects
+caravel_core: 1480000 rects
+caravel_core: 1490000 rects
+caravel_core: 1500000 rects
+caravel_core: 1510000 rects
+caravel_core: 1520000 rects
+caravel_core: 1530000 rects
+caravel_core: 1540000 rects
+caravel_core: 1550000 rects
+caravel_core: 1560000 rects
+caravel_core: 1570000 rects
+caravel_core: 1580000 rects
+caravel_core: 1590000 rects
+caravel_core: 1600000 rects
+caravel_core: 1610000 rects
+caravel_core: 1620000 rects
+caravel_core: 1630000 rects
+caravel_core: 1640000 rects
+caravel_core: 1650000 rects
+caravel_core: 1660000 rects
+caravel_core: 1670000 rects
+caravel_core: 1680000 rects
+caravel_core: 1690000 rects
+caravel_core: 1700000 rects
+caravel_core: 1710000 rects
+caravel_core: 1720000 rects
+caravel_core: 1730000 rects
+caravel_core: 1740000 rects
+caravel_core: 1750000 rects
+caravel_core: 1760000 rects
+caravel_core: 1770000 rects
+caravel_core: 1780000 rects
+caravel_core: 1790000 rects
+caravel_core: 1800000 rects
+caravel_core: 1810000 rects
+caravel_core: 1820000 rects
+caravel_core: 1830000 rects
+caravel_core: 1840000 rects
+caravel_core: 1850000 rects
+caravel_core: 1860000 rects
+caravel_core: 1870000 rects
+caravel_core: 1880000 rects
+caravel_core: 1890000 rects
+caravel_core: 1900000 rects
+caravel_core: 1910000 rects
+caravel_core: 1920000 rects
+caravel_core: 1930000 rects
+caravel_core: 1940000 rects
+caravel_core: 1950000 rects
+caravel_core: 1960000 rects
+caravel_core: 1970000 rects
+caravel_core: 1980000 rects
+caravel_core: 1990000 rects
+caravel_core: 2000000 rects
+caravel_core: 2010000 rects
+caravel_core: 2020000 rects
+caravel_core: 2030000 rects
+caravel_core: 2040000 rects
+caravel_core: 2050000 rects
+caravel_core: 2060000 rects
+caravel_core: 2070000 rects
+caravel_core: 2080000 rects
+caravel_core: 2090000 rects
+caravel_core: 2100000 rects
+caravel_core: 2110000 rects
+caravel_core: 2120000 rects
+caravel_core: 2130000 rects
+caravel_core: 2140000 rects
+caravel_core: 2150000 rects
+caravel_core: 2160000 rects
+caravel_core: 2170000 rects
+caravel_core: 2180000 rects
+caravel_core: 2190000 rects
+caravel_core: 2200000 rects
+caravel_core: 2210000 rects
+caravel_core: 2220000 rects
+caravel_core: 2230000 rects
+caravel_core: 2240000 rects
+caravel_core: 2250000 rects
+caravel_core: 2260000 rects
+Duplicate cell in caravel_core: Instance of cell user_project_wrapper is from path /root/project/mag but cell was previously read from the current directory.
+New path does not exist and will be ignored.
+Duplicate cell in caravel_core: Instance of cell simple_por is from path /root/project/mag but cell was previously read from /opt/caravel/macros/simple_por/maglef.
+New path does not exist and will be ignored.
+Processing timestamp mismatches: user_id_programmingWarning: Parent cell lists instance of "spare_logic_block" at bad file path /root/project/mag/spare_logic_block.mag.
+The cell exists in the search paths at spare_logic_block.mag.
+The discovered version will be used.
+, spare_logic_blockWarning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__tiel" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__tiel.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__tiel.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__tielWarning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__tieh" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__tieh.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__tieh.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__tiehWarning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__filltie" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__filltie.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__filltie.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__filltieWarning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__endcap" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__endcap.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__endcap.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__endcapWarning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__fillcap_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__fillcap_4Warning: Parent cell lists instance of "gf180_ram_512x8_wrapper" at bad file path /root/project/mag/gf180_ram_512x8_wrapper.mag.
+The cell exists in the search paths at /opt/caravel/mgmt_core_wrapper/mag/gf180_ram_512x8_wrapper.mag.
+The discovered version will be used.
+gf180_ram_512x8_wrapper: 10000 rects
+, gf180_ram_512x8_wrapper, simple_por, user_project_wrapperWarning: Parent cell lists instance of "housekeeping" at bad file path /root/project/mag/housekeeping.mag.
+The cell exists in the search paths at housekeeping.mag.
+The discovered version will be used.
+housekeeping: 10000 rects
+housekeeping: 20000 rects
+housekeeping: 30000 rects
+housekeeping: 40000 rects
+housekeeping: 50000 rects
+housekeeping: 60000 rects
+housekeeping: 70000 rects
+housekeeping: 80000 rects
+housekeeping: 90000 rects
+housekeeping: 100000 rects
+housekeeping: 110000 rects
+housekeeping: 120000 rects
+housekeeping: 130000 rects
+housekeeping: 140000 rects
+housekeeping: 150000 rects
+housekeeping: 160000 rects
+housekeeping: 170000 rects
+housekeeping: 180000 rects
+housekeeping: 190000 rects
+housekeeping: 200000 rects
+housekeeping: 210000 rects
+housekeeping: 220000 rects
+housekeeping: 230000 rects
+housekeeping: 240000 rects
+housekeeping: 250000 rects
+housekeeping: 260000 rects
+housekeeping: 270000 rects
+housekeeping: 280000 rects
+housekeeping: 290000 rects
+housekeeping: 300000 rects
+housekeeping: 310000 rects
+housekeeping: 320000 rects
+housekeeping: 330000 rects
+housekeeping: 340000 rects
+housekeeping: 350000 rects
+Duplicate cell in housekeeping: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in housekeeping: Instance of cell gf180mcu_fd_sc_mcu7t5v0__endcap is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in housekeeping: Instance of cell gf180mcu_fd_sc_mcu7t5v0__filltie is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in housekeeping: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tieh is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+, housekeepingWarning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__buf_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__buf_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__buf_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__buf_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkbuf_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkbuf_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkinv_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkinv_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkbuf_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkbuf_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkbuf_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkbuf_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkbuf_3" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_3.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_3.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkbuf_3Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dlyb_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dlyb_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dlyb_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dlyb_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkbuf_8" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_8.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkbuf_8Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__buf_8" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__buf_8.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__buf_8.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__buf_8Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkbuf_12" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_12.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkbuf_12.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkbuf_12Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffrnq_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffrnq_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffrnq_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffrnq_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffrnq_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffrnq_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffrnq_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffrnq_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffrnq_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffrnq_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffrnq_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffrnq_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffnsnq_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffnsnq_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffnsnq_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffnsnq_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffnrnq_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffnrnq_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffnrnq_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffnrnq_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffq_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffq_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffq_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffq_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffsnq_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffsnq_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffsnq_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffsnq_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffsnq_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffsnq_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffsnq_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffsnq_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__dffsnq_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffsnq_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__dffsnq_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__dffsnq_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__and2_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__and2_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__and2_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__and2_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__mux2_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__mux2_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__mux2_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__mux2_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__nor2_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nor2_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nor2_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__nor2_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__oai21_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai21_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai21_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__oai21_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__aoi222_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi222_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi222_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__aoi222_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__nand2_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nand2_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nand2_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__nand2_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__aoi221_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi221_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi221_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__aoi221_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__aoi22_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi22_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi22_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__aoi22_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__aoi21_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi21_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi21_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__aoi21_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__and3_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__and3_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__and3_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__and3_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__oai32_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai32_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai32_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__oai32_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__nand3_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nand3_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nand3_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__nand3_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__nor2_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nor2_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__nor2_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__nor2_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__oai211_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai211_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai211_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__oai211_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__oai31_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai31_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai31_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__oai31_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__or2_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__or2_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__or2_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__or2_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__oai22_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai22_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai22_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__oai22_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__xor2_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xor2_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xor2_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__xor2_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__aoi211_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi211_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__aoi211_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__aoi211_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__oai221_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai221_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai221_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__oai221_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkinv_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkinv_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__inv_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__inv_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__oai222_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai222_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__oai222_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__oai222_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__mux2_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__mux2_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__mux2_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__mux2_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__inv_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__inv_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__xor2_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xor2_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xor2_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__xor2_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__xor2_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xor2_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xor2_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__xor2_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__xnor2_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xnor2_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xnor2_2.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__xnor2_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__inv_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__inv_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__xnor2_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xnor2_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__xnor2_1.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__xnor2_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkinv_4" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_4.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_4.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkinv_4Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkinv_3" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_3.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_3.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkinv_3Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__clkinv_8" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_8.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__clkinv_8.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__clkinv_8Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__inv_3" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_3.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__inv_3.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__inv_3Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__fill_2" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fill_2.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fill_2.mag.
+The discovered version will be used.
+Scaled magic input cell gf180mcu_fd_sc_mcu7t5v0__fill_2 geometry by factor of 2
+, gf180mcu_fd_sc_mcu7t5v0__fill_2Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__fill_1" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fill_1.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fill_1.mag.
+The discovered version will be used.
+Scaled magic input cell gf180mcu_fd_sc_mcu7t5v0__fill_1 geometry by factor of 2
+, gf180mcu_fd_sc_mcu7t5v0__fill_1Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__fillcap_8" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_8.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_8.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__fillcap_8Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__fillcap_16" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_16.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_16.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__fillcap_16Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__fillcap_32" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_32.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_32.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__fillcap_32Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__fillcap_64" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_64.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__fillcap_64.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__fillcap_64Warning: Parent cell lists instance of "gf180mcu_fd_sc_mcu7t5v0__antenna" at bad file path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__antenna.mag.
+The cell exists in the search paths at /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag/gf180mcu_fd_sc_mcu7t5v0__antenna.mag.
+The discovered version will be used.
+, gf180mcu_fd_sc_mcu7t5v0__antennaDuplicate cell in gpio_defaults_block_008: Instance of cell gf180mcu_fd_sc_mcu7t5v0__endcap is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_008: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_008: Instance of cell gf180mcu_fd_sc_mcu7t5v0__filltie is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_008: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tieh is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_008: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tiel is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+, gpio_defaults_block_008Duplicate cell in gpio_defaults_block_007: Instance of cell gf180mcu_fd_sc_mcu7t5v0__endcap is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_007: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_007: Instance of cell gf180mcu_fd_sc_mcu7t5v0__filltie is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_007: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tieh is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_007: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tiel is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+, gpio_defaults_block_007Duplicate cell in gpio_defaults_block_087: Instance of cell gf180mcu_fd_sc_mcu7t5v0__endcap is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_087: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_087: Instance of cell gf180mcu_fd_sc_mcu7t5v0__filltie is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_087: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tieh is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_087: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tiel is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+, gpio_defaults_block_087Duplicate cell in gpio_defaults_block_009: Instance of cell gf180mcu_fd_sc_mcu7t5v0__endcap is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_009: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_009: Instance of cell gf180mcu_fd_sc_mcu7t5v0__filltie is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_009: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tieh is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in gpio_defaults_block_009: Instance of cell gf180mcu_fd_sc_mcu7t5v0__tiel is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+, gpio_defaults_block_009Warning: Parent cell lists instance of "mprj_io_buffer" at bad file path /root/project/mag/mprj_io_buffer.mag.
+The cell exists in the search paths at mprj_io_buffer.mag.
+The discovered version will be used.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__antenna is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fill_2 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fill_1 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32 is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__endcap is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+Duplicate cell in mprj_io_buffer: Instance of cell gf180mcu_fd_sc_mcu7t5v0__filltie is from path /opt/pdks/$PDK/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag but cell was previously read from /opt/pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag.
+New path does not exist and will be ignored.
+, mprj_io_buffer.
+Processing timestamp mismatches: user_id_textblock, chip_io, open_source, copyright_block, caravel_corecaravel_power_routing: 10000 rects
+caravel_power_routing: 20000 rects
+caravel_power_routing: 30000 rects
+caravel_power_routing: 40000 rects
+caravel_power_routing: 50000 rects
+caravel_power_routing: 60000 rects
+caravel_power_routing: 70000 rects
+caravel_power_routing: 80000 rects
+caravel_power_routing: 90000 rects
+caravel_power_routing: 100000 rects
+caravel_power_routing: 110000 rects
+, caravel_power_routingScaled magic input cell caravel_motto geometry by factor of 2
+, caravel_motto, caravel_logo.
+Scaled magic input cell font_73 geometry by factor of 2
+Scaled magic input cell font_69 geometry by factor of 2
+Scaled magic input cell font_68 geometry by factor of 2
+Scaled magic input cell font_67 geometry by factor of 2
+Scaled magic input cell font_65 geometry by factor of 2
+Scaled magic input cell font_61 geometry by factor of 2
+Scaled magic input cell font_54 geometry by factor of 2
+Scaled magic input cell font_53 geometry by factor of 2
+Scaled magic input cell font_49 geometry by factor of 2
+Scaled magic input cell font_43 geometry by factor of 2
+Scaled magic input cell font_22 geometry by factor of 2
+Scaled magic input cell font_6E geometry by factor of 2
+Scaled magic input cell font_6C geometry by factor of 2
+gf180mcu_fd_ip_sram__sram512x8m8wm1: 10000 rects
+gf180mcu_fd_ip_sram__sram512x8m8wm1: 20000 rects
+Scaled magic input cell pmos_5p043105913020110_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p043105913020105_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p043105913020103_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p043105913020104_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p043105913020108_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p043105913020109_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p043105913020107_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p043105913020106_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302044_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204401708_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204400684_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204399660_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204398636_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204147756_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$201252908_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$201251884_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$02_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204408876_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204407852_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204406828_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204405804_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204404780_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204403756_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204402732_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$202406956_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$202394668_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$201262124_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$46894124_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$45004844_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB_05_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$45111340_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY243105913020105_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY24310591302033_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY24310591302031_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY24310591302019_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE43105913020106_51_0 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE03_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL4310591302032_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL07_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$01_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$04_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY2_01_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_01_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p043105913020101_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p043105913020100_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p043105913020111_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302099_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p043105913020102_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204146732_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204145708_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204144684_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204143660_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$204142636_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204222508_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204221484_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204220460_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204141612_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204140588_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204139564_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$204138540_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY2$$204150828_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE$11_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE$10_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL_01_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_02_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302043_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302041_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302035_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302020_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302014_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302042_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302040_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302039_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302010_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p0431059130208_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302036_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$202397740_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M14310591302035_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$202396716_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$202395692_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE4310591302027_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_01_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE4310591302037_512x8m81 geometry by factor of 10
+Scaled magic input cell via2_x2_512x8m81 geometry by factor of 10
+Scaled magic input cell via2_512x8m81 geometry by factor of 10
+Scaled magic input cell via1_x2_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell via1_x2_512x8m81 geometry by factor of 10
+Scaled magic input cell via2_x2_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell via1_x2_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell via1_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell po_m1_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302038_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302027_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302031_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302013_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302022_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302024_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302025_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302030_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302034_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302033_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302032_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302028_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302023_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302012_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302037_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302026_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302036_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302029_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$45008940_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$45006892_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$45005868_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1c$$203396140_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$45003820_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$45002796_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$43374636_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB_285_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$44997676_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY2$$45109292_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY2$$44754988_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY2$$44753964_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE4310591302034_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL04_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL03_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL02_512x8m81 geometry by factor of 10
+Scaled magic input cell via1_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell via1_512x8m81 geometry by factor of 10
+Scaled magic input cell via2_x2_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302019_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302021_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302018_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302015_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302016_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302017_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$43371564_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB_04_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$46558252_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$46557228_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$46556204_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$46555180_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL_01_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL06_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302051_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302049_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302048_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302047_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p0431059130203_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302052_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302050_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302046_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302045_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2431059130207_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1431059130200_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$168351788_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB_02_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE4310591302040_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE4310591302039_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL_01_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE4310591302041_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE4310591302038_512x8m81 geometry by factor of 10
+mux821_512x8m81: 10000 rects
+Scaled magic input cell via2_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p0431059130201_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p0431059130202_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p0431059130200_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2431059130201_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M14310591302020_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1431059130208_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$47122476_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY24310591302030_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL09_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL05_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302029_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M14310591302018_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE4310591302028_512x8m81 geometry by factor of 10
+Scaled magic input cell po_m1_R270_512x8m81 geometry by factor of 10
+Scaled magic input cell po_m1_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p0431059130209_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p0431059130206_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p0431059130204_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302011_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p0431059130207_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p0431059130205_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$46895148_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$43368492_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$43375660_R90_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$46893100_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$46892076_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL08_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302026_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$44741676_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$43370540_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M14310591302025_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$45013036_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$45012012_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE4310591302024_512x8m81 geometry by factor of 10
+Scaled magic input cell via2_R90_512x8m81_0 geometry by factor of 10
+Scaled magic input cell via1_x2_R90_512x8m81_0 geometry by factor of 10
+Scaled magic input cell via1_R270_512x8m81_0 geometry by factor of 10
+Scaled magic input cell via1_R90_512x8m81_0 geometry by factor of 10
+Scaled magic input cell M3_M2$$43368492_512x8m81_0 geometry by factor of 10
+Scaled magic input cell M2_M1$$46894124_512x8m81_0 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$45111340_512x8m81_0 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE4310591302075_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL$$47121452_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_NWELL$$46277676_512x8m81 geometry by factor of 10
+Scaled magic input cell via2_x2_R270_512x8m81_0 geometry by factor of 10
+Scaled magic input cell via1_x2_R270_512x8m81_0 geometry by factor of 10
+Scaled magic input cell via2_x2_R90_512x8m81_0 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302097_512x8m81 geometry by factor of 10
+Scaled magic input cell pmos_5p04310591302095_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302098_512x8m81 geometry by factor of 10
+Scaled magic input cell nmos_5p04310591302096_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$47117356_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M1$$43375660_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_PSUB$$46274604_512x8m81 geometry by factor of 10
+Scaled magic input cell M1_POLY2$$46559276_512x8m81_0 geometry by factor of 10
+Scaled magic input cell M1_NWELL$$44998700_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302021_512x8m81 geometry by factor of 10
+Scaled magic input cell 018SRAM_cell1_2x_512x8m81 geometry by factor of 2
+Scaled magic input cell 018SRAM_strap1_2x_512x8m81 geometry by factor of 2
+Scaled magic input cell M3_M24310591302023_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302022_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M2$$201416748_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M243105913020102_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302095_512x8m81 geometry by factor of 10
+Scaled magic input cell M2_M14310591302097_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M243105913020101_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M243105913020100_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302099_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302098_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302096_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302094_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302091_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302090_512x8m81 geometry by factor of 10
+Scaled magic input cell M3_M24310591302089_512x8m81 geometry by factor of 10
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+Scaled magic input cell M2_M1_CDNS_40661953145772 geometry by factor of 10
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+GF_NI_IN_S_BASE: 10000 rects
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+Scaled magic input cell nmos_6p0_CDNS_4066195314520 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314519 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314518 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314514 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145181 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145238 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145235 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145234 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145233 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145232 geometry by factor of 10
+Scaled magic input cell M1_POLY2_CDNS_40661953145229 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145236 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145231 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145230 geometry by factor of 10
+Scaled magic input cell comp018green_out_drv_pleg_4T_Y geometry by factor of 2
+Scaled magic input cell comp018green_out_drv_pleg_4T_X geometry by factor of 2
+Scaled magic input cell M3_M2_CDNS_40661953145353 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145264 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145208 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145366 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145365 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145363 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145358 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145350 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145209 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145180 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145364 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145360 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145359 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145356 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145355 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145354 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145348 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145347 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145346 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145177 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145362 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145357 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145351 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145349 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145283 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145361 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145352 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145345 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145286 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145371 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145370 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145369 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145368 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145367 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145376 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145375 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145372 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145374 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145373 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145342 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145341 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145340 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145278 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145263 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145344 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145343 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145280 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145279 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145201 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145321 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145322 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145315 geometry by factor of 10
+Scaled magic input cell ppolyf_u_CDNS_4066195314533 geometry by factor of 10
+Scaled magic input cell ppolyf_u_CDNS_4066195314532 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145316 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145324 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145323 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314548 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314546 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314539 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314550 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314549 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314547 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145216 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145327 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145326 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145328 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145325 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314545 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314544 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314543 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314538 geometry by factor of 10
+Scaled magic input cell pmos_6p0_CDNS_4066195314534 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314542 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314541 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314540 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314537 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314536 geometry by factor of 10
+Scaled magic input cell nmos_6p0_CDNS_4066195314535 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145115 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145319 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145317 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145320 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145318 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145314 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145313 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145312 geometry by factor of 10
+Scaled magic input cell ppolyf_u_CDNS_4066195314525 geometry by factor of 10
+Scaled magic input cell pn_6p0_CDNS_4066195314527 geometry by factor of 10
+Scaled magic input cell np_6p0_CDNS_4066195314526 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145269 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145268 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145265 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145262 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145258 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145270 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145267 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145266 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145261 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145260 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145259 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145257 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145256 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145247 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145239 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145182 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145253 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145252 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145251 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145250 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145249 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145248 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145240 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145255 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145254 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145246 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145245 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145244 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145243 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145242 geometry by factor of 10
+Scaled magic input cell M1_NACTIVE_CDNS_40661953145241 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145332 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145330 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145213 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145212 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145210 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145207 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145206 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145204 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145202 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145200 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145199 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145197 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145196 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145194 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145193 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145190 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145188 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145186 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145179 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145174 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145172 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_40661953145170 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145378 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145333 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145331 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145329 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145214 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145211 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145205 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145203 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145198 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145195 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145189 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145187 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145185 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145178 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145176 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145173 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145171 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145169 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145163 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145120 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145116 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145114 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145339 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145338 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_40661953145215 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145168 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145167 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145166 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145165 geometry by factor of 10
+Scaled magic input cell M1_NWELL_CDNS_40661953145377 geometry by factor of 10
+GF_NI_IN_C_BASE: 10000 rects
+GF_NI_IN_C_BASE: 20000 rects
+GF_NI_BI_T_BASE: 10000 rects
+GF_NI_BI_T_BASE: 20000 rects
+Scaled magic input cell M3_M2_CDNS_40661953145335 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145334 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145337 geometry by factor of 10
+Scaled magic input cell M1_PACTIVE_CDNS_40661953145336 geometry by factor of 10
+GF_NI_DVDD_BASE: 10000 rects
+GF_NI_DVDD_BASE: 20000 rects
+GF_NI_DVDD_BASE: 30000 rects
+GF_NI_DVDD_BASE: 40000 rects
+GF_NI_DVDD_BASE: 50000 rects
+GF_NI_DVDD_BASE: 60000 rects
+GF_NI_DVDD_BASE: 70000 rects
+GF_NI_DVDD_BASE: 80000 rects
+nmos_clamp_20_50_4_DVDD: 10000 rects
+nmos_clamp_20_50_4_DVDD: 20000 rects
+nmos_clamp_20_50_4_DVDD: 30000 rects
+Scaled magic input cell M2_M1_CDNS_40661953145139 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145137 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145121 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145119 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_40661953145104 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_4066195314595 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314591 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314583 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314582 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314581 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314580 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314579 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314578 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314577 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314576 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314575 geometry by factor of 10
+gf180mcu_fd_io__fill5: 10000 rects
+Scaled magic input cell M5_M4_CDNS_4066195314513 geometry by factor of 10
+Scaled magic input cell M5_M4_CDNS_4066195314511 geometry by factor of 10
+Scaled magic input cell M4_M3_CDNS_4066195314514 geometry by factor of 10
+Scaled magic input cell M4_M3_CDNS_4066195314512 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314518 geometry by factor of 10
+Scaled magic input cell M3_M2_CDNS_4066195314517 geometry by factor of 10
+Scaled magic input cell M2_M1_CDNS_4066195314515 geometry by factor of 10
+Scaled magic input cell M1_PSUB_CDNS_4066195314516 geometry by factor of 10
+Scaled magic input cell alpha_1 geometry by factor of 12
+Scaled magic input cell alpha_8 geometry by factor of 12
+Scaled magic input cell alpha_0 geometry by factor of 12
+Scaled magic input cell alpha_4 geometry by factor of 12
+Scaled magic input cell alpha_5 geometry by factor of 12
+Scaled magic input cell alpha_D geometry by factor of 12
+Scaled magic input cell alpha_6 geometry by factor of 12
+Processing timestamp mismatches: gf180mcu_fd_ip_sram__sram512x8m8wm1, gf180mcu_fd_sc_mcu7t5v0__nor3_4, gf180mcu_fd_sc_mcu7t5v0__nand4_4, gf180mcu_fd_sc_mcu7t5v0__or3_4, gf180mcu_fd_sc_mcu7t5v0__and4_4, gf180mcu_fd_sc_mcu7t5v0__nor4_4, gf180mcu_fd_sc_mcu7t5v0__or4_4, gf180mcu_fd_sc_mcu7t5v0__clkbuf_16.
+ Generating output for cell caravel_logo
+ Generating output for cell font_73
+ Generating output for cell font_69
+ Generating output for cell font_68
+ Generating output for cell font_67
+ Generating output for cell font_65
+ Generating output for cell font_61
+ Generating output for cell font_54
+ Generating output for cell font_53
+ Generating output for cell font_49
+ Generating output for cell font_43
+ Generating output for cell font_22
+ Generating output for cell font_6E
+ Generating output for cell font_6C
+ Generating output for cell caravel_motto
+ Generating output for cell caravel_power_routing
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__filltie
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__endcap
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__fill_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__fill_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__fillcap_8
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__fillcap_16
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__fillcap_32
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_8
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__antenna
+ Generating output for cell mprj_io_buffer
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__tiel
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__tieh
+ Generating output for cell gpio_defaults_block_009
+ Generating output for cell gpio_defaults_block_087
+ Generating output for cell gpio_defaults_block_007
+ Generating output for cell gpio_defaults_block_008
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__inv_3
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkinv_8
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkinv_3
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkinv_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xnor2_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__inv_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xnor2_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xor2_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xor2_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__inv_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__mux2_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai222_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__inv_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkinv_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai221_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__aoi211_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xor2_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai22_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__or2_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai31_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai211_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nor2_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nand3_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai32_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__and3_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__aoi21_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__aoi22_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__aoi221_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nand2_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__aoi222_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai21_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nor2_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__and2_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffsnq_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffsnq_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffsnq_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffq_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffnrnq_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffnsnq_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffrnq_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_12
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__buf_8
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dlyb_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_3
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkinv_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__buf_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_16
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__or4_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nor4_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__and4_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__or3_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nand4_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nor3_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__mux2_2
+ Generating output for cell housekeeping
+ Generating output for cell user_project_wrapper
+Reading "gf180mcu_fd_sc_mcu7t5v0__fill_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__endcap".
+Reading "gf180mcu_fd_sc_mcu7t5v0__filltie".
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_64".
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_32".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_16".
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_8".
+Reading "gf180mcu_fd_sc_mcu7t5v0__fillcap_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__antenna".
+Reading "gf180mcu_fd_sc_mcu7t5v0__fill_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_3".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffq_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyb_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyd_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyc_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux4_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__tiel".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand3_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai211_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai21_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__or2_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_8".
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi22_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi21_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__and3_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__and2_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffrnq_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_8".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_3".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkinv_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_16".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor3_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor2_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand3_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand2_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand2_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand2_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__inv_1".
+Reading "fpga_struct_block".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai21_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux4_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai22_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dlyd_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__buf_3".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_8".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai32_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__or4_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor4_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor2_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi211_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi211_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor3_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__and4_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi21_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__clkbuf_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai21_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor2_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__and3_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi21_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux2_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi221_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__or2_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi22_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nor3_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__inv_3".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai211_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai211_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi211_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi221_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__tieh".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi22_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai221_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffsnq_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__aoi221_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand3_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai221_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffrnq_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__dffq_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__mux4_4".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__nand4_1".
+Reading "gf180mcu_fd_sc_mcu7t5v0__inv_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai31_2".
+Reading "gf180mcu_fd_sc_mcu7t5v0__oai31_1".
+Reading "efuse_array".
+Reading "efuse_ctrl".
+Reading "user_project_wrapper".
+ Generating output for cell simple_por
+Reading "nmos_6p0_BUMBUS".
+Reading "pmos_6p0_GUW2N9".
+Reading "nmos_6p0_BUMBJU".
+Reading "pmos_6p0_MUW2NR".
+Reading "std_inverter".
+Reading "std_buffer".
+Reading "pmos_6p0_UXEQNM".
+Reading "nmos_6p0_BJPB5U".
+Reading "pmos_6p0_9859UL".
+Reading "pmos_6p0_9YEQN4".
+Reading "nmos_6p0_L3YBEV".
+Reading "schmitt_inverter".
+Reading "mim_2p0fF_8KW78G".
+Reading "large_mimcap".
+Reading "nmos_6p0_BJXXPT".
+Reading "nmos_6p0_B4TB5U".
+Reading "via_cont_0p6um".
+Reading "via_cont_2um".
+Reading "pmos_6p0_CYEQN4".
+Reading "pmos_6p0_HUEQQM".
+Reading "pmos_6p0_EYEQQM".
+Reading "ppolyf_u_1k_6p0_TRTT7C".
+Reading "reduction_mirror".
+Reading "simple_por".
+ Generating output for cell pmos_5p043105913020110_512x8m81
+ Generating output for cell pmos_5p043105913020105_512x8m81
+ Generating output for cell pmos_5p043105913020103_512x8m81
+ Generating output for cell pmos_1p2_03_R270_512x8m81
+ Generating output for cell pmos_5p043105913020104_512x8m81
+ Generating output for cell pmos_1p2_02_R270_512x8m81
+ Generating output for cell pmos_5p043105913020108_512x8m81
+ Generating output for cell pmos_1p2_01_R270_512x8m81
+ Generating output for cell nmos_5p043105913020109_512x8m81
+ Generating output for cell nmos_5p043105913020107_512x8m81
+ Generating output for cell nmos_5p043105913020106_512x8m81
+ Generating output for cell nmos_5p04310591302044_512x8m81
+ Generating output for cell nmos_1p2_02_R270_512x8m81
+ Generating output for cell M3_M2$$204401708_512x8m81
+ Generating output for cell M3_M2$$204400684_512x8m81
+ Generating output for cell M3_M2$$204399660_512x8m81
+ Generating output for cell M3_M2$$204398636_512x8m81
+ Generating output for cell M3_M2$$204147756_512x8m81
+ Generating output for cell M3_M2$$201252908_512x8m81
+ Generating output for cell M3_M2$$201251884_512x8m81
+ Generating output for cell M2_M1$02_R270_512x8m81
+ Generating output for cell M2_M1$$204408876_512x8m81
+ Generating output for cell M2_M1$$204407852_512x8m81
+ Generating output for cell M2_M1$$204406828_512x8m81
+ Generating output for cell M2_M1$$204405804_512x8m81
+ Generating output for cell M2_M1$$204404780_512x8m81
+ Generating output for cell M2_M1$$204403756_512x8m81
+ Generating output for cell M2_M1$$204402732_512x8m81
+ Generating output for cell M2_M1$$202406956_512x8m81
+ Generating output for cell M2_M1$$202394668_512x8m81
+ Generating output for cell M2_M1$$201262124_512x8m81
+ Generating output for cell M2_M1$$46894124_512x8m81
+ Generating output for cell M2_M1$$45004844_512x8m81
+ Generating output for cell M1_PSUB_05_512x8m81
+ Generating output for cell M1_PSUB$$45111340_512x8m81
+ Generating output for cell M1_POLY243105913020105_512x8m81
+ Generating output for cell M1_POLY24310591302033_512x8m81
+ Generating output for cell M1_POLY24310591302031_512x8m81
+ Generating output for cell M1_POLY24310591302019_512x8m81
+ Generating output for cell M1_PACTIVE43105913020106_51_0
+ Generating output for cell M1_PACTIVE03_512x8m81
+ Generating output for cell M1_NWELL4310591302032_512x8m81
+ Generating output for cell M1_NWELL07_512x8m81
+ Generating output for cell xdec_512x8m81
+ Generating output for cell xdec8_512x8m81
+ Generating output for cell xdec32_512x8m81
+ Generating output for cell xdec32_468_512x8m81
+ Generating output for cell pmoscap_R270_512x8m81
+ Generating output for cell M3_M2$01_R270_512x8m81
+ Generating output for cell M2_M1$04_R270_512x8m81
+ Generating output for cell M1_POLY2_01_R270_512x8m81
+ Generating output for cell M1_PACTIVE_R270_512x8m81
+ Generating output for cell M1_NACTIVE_01_R270_512x8m81
+ Generating output for cell pmoscap_L1_W2_R270_512x8m81
+ Generating output for cell pmos_5p043105913020101_512x8m81
+ Generating output for cell pmos_5p043105913020100_512x8m81
+ Generating output for cell pmos_1p2_02_R90_512x8m81
+ Generating output for cell pmos_1p2_01_R90_512x8m81
+ Generating output for cell nmos_5p043105913020111_512x8m81
+ Generating output for cell nmos_5p04310591302099_512x8m81
+ Generating output for cell nmos_1p2_02_R90_512x8m81
+ Generating output for cell nmos_5p043105913020102_512x8m81
+ Generating output for cell nmos_1p2_01_R270_512x8m81
+ Generating output for cell M3_M2$$204146732_512x8m81
+ Generating output for cell M3_M2$$204145708_512x8m81
+ Generating output for cell M3_M2$$204144684_512x8m81
+ Generating output for cell M3_M2$$204143660_512x8m81
+ Generating output for cell M3_M2$$204142636_512x8m81
+ Generating output for cell M2_M1$$204222508_512x8m81
+ Generating output for cell M2_M1$$204221484_512x8m81
+ Generating output for cell M2_M1$$204220460_512x8m81
+ Generating output for cell M2_M1$$204141612_512x8m81
+ Generating output for cell M2_M1$$204140588_512x8m81
+ Generating output for cell M2_M1$$204139564_512x8m81
+ Generating output for cell M2_M1$$204138540_512x8m81
+ Generating output for cell M1_POLY2$$204150828_512x8m81
+ Generating output for cell M1_PACTIVE$11_512x8m81
+ Generating output for cell M1_PACTIVE$10_512x8m81
+ Generating output for cell M1_NWELL_01_512x8m81
+ Generating output for cell M1_NACTIVE_02_512x8m81
+ Generating output for cell xdec64_512x8m81
+ Generating output for cell pmos_5p04310591302043_512x8m81
+ Generating output for cell pmos_5p04310591302041_512x8m81
+ Generating output for cell pmos_5p04310591302035_512x8m81
+ Generating output for cell pmos_5p04310591302020_512x8m81
+ Generating output for cell pmos_5p04310591302014_512x8m81
+ Generating output for cell pmos_1p2$$202587180_512x8m81
+ Generating output for cell pmos_1p2$$202586156_512x8m81
+ Generating output for cell pmos_1p2$$202585132_512x8m81
+ Generating output for cell pmos_1p2$$202584108_512x8m81
+ Generating output for cell pmos_1p2$$202583084_512x8m81
+ Generating output for cell nmos_5p04310591302042_512x8m81
+ Generating output for cell nmos_5p04310591302040_512x8m81
+ Generating output for cell nmos_5p04310591302039_512x8m81
+ Generating output for cell nmos_5p04310591302010_512x8m81
+ Generating output for cell nmos_5p0431059130208_512x8m81
+ Generating output for cell nmos_1p2$$202598444_512x8m81
+ Generating output for cell nmos_1p2$$202596396_512x8m81
+ Generating output for cell nmos_1p2$$202595372_512x8m81
+ Generating output for cell nmos_1p2$$202594348_512x8m81
+ Generating output for cell M3_M24310591302036_512x8m81
+ Generating output for cell M3_M2$$202397740_512x8m81
+ Generating output for cell M2_M14310591302035_512x8m81
+ Generating output for cell M2_M1$$202396716_512x8m81
+ Generating output for cell M2_M1$$202395692_512x8m81
+ Generating output for cell M1_PACTIVE4310591302027_512x8m81
+ Generating output for cell M1_NACTIVE_01_512x8m81
+ Generating output for cell M1_NACTIVE4310591302037_512x8m81
+ Generating output for cell wen_wm1_512x8m81
+ Generating output for cell via2_x2_512x8m81
+ Generating output for cell via2_512x8m81
+ Generating output for cell via1_x2_R90_512x8m81
+ Generating output for cell via1_x2_512x8m81
+ Generating output for cell via2_x2_R90_512x8m81
+ Generating output for cell via1_2_x2_512x8m81
+ Generating output for cell via1_x2_R270_512x8m81
+ Generating output for cell via1_R90_512x8m81
+ Generating output for cell po_m1_512x8m81
+ Generating output for cell pmos_5p04310591302038_512x8m81
+ Generating output for cell pmos_5p04310591302027_512x8m81
+ Generating output for cell pmos_5p04310591302031_512x8m81
+ Generating output for cell pmos_1p2$$46287916_512x8m81
+ Generating output for cell pmos_5p04310591302013_512x8m81
+ Generating output for cell pmos_1p2$$46286892_512x8m81
+ Generating output for cell pmos_1p2$$46285868_512x8m81
+ Generating output for cell pmos_1p2$$46284844_512x8m81
+ Generating output for cell pmos_5p04310591302022_512x8m81
+ Generating output for cell pmos_1p2$$46283820_512x8m81
+ Generating output for cell pmos_5p04310591302024_512x8m81
+ Generating output for cell pmos_1p2$$46282796_512x8m81
+ Generating output for cell pmos_5p04310591302025_512x8m81
+ Generating output for cell pmos_1p2$$46281772_512x8m81
+ Generating output for cell pmos_5p04310591302030_512x8m81
+ Generating output for cell pmos_1p2$$45095980_512x8m81
+ Generating output for cell nmos_5p04310591302034_512x8m81
+ Generating output for cell nmos_5p04310591302033_512x8m81
+ Generating output for cell nmos_5p04310591302032_512x8m81
+ Generating output for cell nmos_5p04310591302028_512x8m81
+ Generating output for cell nmos_5p04310591302023_512x8m81
+ Generating output for cell nmos_5p04310591302012_512x8m81
+ Generating output for cell nmos_5p04310591302037_512x8m81
+ Generating output for cell nmos_1p2$$45103148_512x8m81
+ Generating output for cell nmos_5p04310591302026_512x8m81
+ Generating output for cell nmos_1p2$$45102124_512x8m81
+ Generating output for cell nmos_5p04310591302036_512x8m81
+ Generating output for cell nmos_1p2$$45101100_512x8m81
+ Generating output for cell nmos_5p04310591302029_512x8m81
+ Generating output for cell nmos_1p2$$45100076_512x8m81
+ Generating output for cell M3_M2$$45008940_512x8m81
+ Generating output for cell M3_M2$$45006892_512x8m81
+ Generating output for cell M3_M2$$45005868_512x8m81
+ Generating output for cell M2_M1c$$203396140_512x8m81
+ Generating output for cell M2_M1$$45003820_512x8m81
+ Generating output for cell M2_M1$$45002796_512x8m81
+ Generating output for cell M2_M1$$43374636_512x8m81
+ Generating output for cell M1_PSUB_285_512x8m81
+ Generating output for cell M1_PSUB$$44997676_512x8m81
+ Generating output for cell M1_POLY2$$45109292_512x8m81
+ Generating output for cell M1_POLY2$$44754988_512x8m81
+ Generating output for cell M1_POLY2$$44753964_512x8m81
+ Generating output for cell M1_PACTIVE4310591302034_512x8m81
+ Generating output for cell M1_NWELL04_512x8m81
+ Generating output for cell M1_NWELL03_512x8m81
+ Generating output for cell M1_NWELL02_512x8m81
+ Generating output for cell sacntl_2_512x8m81
+ Generating output for cell via1_R270_512x8m81
+ Generating output for cell via1_512x8m81
+ Generating output for cell via2_x2_R270_512x8m81
+ Generating output for cell via1_2_x2_R270_512x8m81
+ Generating output for cell via1_2_x2_R90_512x8m81
+ Generating output for cell pmos_5p04310591302019_512x8m81
+ Generating output for cell pmos_1p2$$46898220_512x8m81
+ Generating output for cell pmos_1p2$$46897196_512x8m81
+ Generating output for cell pmos_5p04310591302021_512x8m81
+ Generating output for cell pmos_1p2$$46896172_512x8m81
+ Generating output for cell pmos_5p04310591302018_512x8m81
+ Generating output for cell pmos_1p2$$46549036_512x8m81
+ Generating output for cell nmos_5p04310591302015_512x8m81
+ Generating output for cell nmos_1p2$$46553132_512x8m81
+ Generating output for cell nmos_5p04310591302016_512x8m81
+ Generating output for cell nmos_1p2$$46552108_512x8m81
+ Generating output for cell nmos_1p2$$46551084_512x8m81
+ Generating output for cell nmos_5p04310591302017_512x8m81
+ Generating output for cell nmos_1p2$$46550060_512x8m81
+ Generating output for cell nmos_1p2$$45107244_512x8m81
+ Generating output for cell M3_M2$$43371564_512x8m81
+ Generating output for cell M1_PSUB_04_R90_512x8m81
+ Generating output for cell M1_PSUB$$46558252_512x8m81
+ Generating output for cell M1_PSUB$$46557228_512x8m81
+ Generating output for cell M1_PSUB$$46556204_512x8m81
+ Generating output for cell M1_PSUB$$46555180_512x8m81
+ Generating output for cell M1_NWELL_01_R90_512x8m81
+ Generating output for cell M1_NWELL06_512x8m81
+ Generating output for cell sa_512x8m81
+ Generating output for cell pmos_5p04310591302051_512x8m81
+ Generating output for cell pmos_5p04310591302049_512x8m81
+ Generating output for cell pmos_5p04310591302048_512x8m81
+ Generating output for cell pmos_5p04310591302047_512x8m81
+ Generating output for cell pmos_5p0431059130203_512x8m81
+ Generating output for cell pmos_1p2$$171625516_512x8m81
+ Generating output for cell nmos_5p04310591302052_512x8m81
+ Generating output for cell nmos_5p04310591302050_512x8m81
+ Generating output for cell nmos_5p04310591302046_512x8m81
+ Generating output for cell nmos_5p04310591302045_512x8m81
+ Generating output for cell M3_M2431059130207_512x8m81
+ Generating output for cell M2_M1431059130200_512x8m81
+ Generating output for cell M2_M1$$168351788_R90_512x8m81
+ Generating output for cell M1_PSUB_02_512x8m81
+ Generating output for cell M1_PACTIVE4310591302040_512x8m81
+ Generating output for cell M1_PACTIVE4310591302039_512x8m81
+ Generating output for cell M1_NWELL_01_R270_512x8m81
+ Generating output for cell M1_NACTIVE4310591302041_512x8m81
+ Generating output for cell M1_NACTIVE4310591302038_512x8m81
+ Generating output for cell outbuf_oe_512x8m81
+ Generating output for cell via2_R90_512x8m81
+ Generating output for cell via1_2_512x8m81
+ Generating output for cell pmos_5p0431059130201_512x8m81
+ Generating output for cell pmos_1p2$$46889004_512x8m81
+ Generating output for cell nmos_5p0431059130202_512x8m81
+ Generating output for cell nmos_5p0431059130200_512x8m81
+ Generating output for cell nmos_1p2$$47119404_512x8m81
+ Generating output for cell M3_M2431059130201_512x8m81
+ Generating output for cell M2_M14310591302020_512x8m81
+ Generating output for cell M2_M1431059130208_512x8m81
+ Generating output for cell M1_PSUB$$47122476_512x8m81
+ Generating output for cell M1_POLY24310591302030_512x8m81
+ Generating output for cell M1_NWELL09_512x8m81
+ Generating output for cell M1_NWELL05_512x8m81
+ Generating output for cell ypass_gate_a_512x8m81
+ Generating output for cell ypass_gate_512x8m81
+ Generating output for cell M3_M24310591302029_512x8m81
+ Generating output for cell M2_M14310591302018_512x8m81
+ Generating output for cell M1_NACTIVE4310591302028_512x8m81
+ Generating output for cell mux821_512x8m81
+ Generating output for cell m2_saout01_512x8m81
+ Generating output for cell po_m1_R270_512x8m81
+ Generating output for cell po_m1_R90_512x8m81
+ Generating output for cell pmos_5p0431059130209_512x8m81
+ Generating output for cell pmos_5p0431059130206_512x8m81
+ Generating output for cell pmos_5p0431059130204_512x8m81
+ Generating output for cell pmos_1p2$$46887980_512x8m81
+ Generating output for cell pmos_1p2$$46885932_512x8m81
+ Generating output for cell pmos_1p2$$46273580_512x8m81
+ Generating output for cell nmos_5p04310591302011_512x8m81
+ Generating output for cell nmos_5p0431059130207_512x8m81
+ Generating output for cell nmos_1p2$$46884908_512x8m81
+ Generating output for cell nmos_5p0431059130205_512x8m81
+ Generating output for cell nmos_1p2$$46883884_512x8m81
+ Generating output for cell nmos_1p2$$46563372_512x8m81
+ Generating output for cell M3_M2$$46895148_512x8m81
+ Generating output for cell M3_M2$$43368492_R90_512x8m81
+ Generating output for cell M2_M1$$43375660_R90_512x8m81
+ Generating output for cell M1_PSUB$$46893100_512x8m81
+ Generating output for cell M1_PSUB$$46892076_512x8m81
+ Generating output for cell M1_NWELL08_512x8m81
+ Generating output for cell din_512x8m81
+ Generating output for cell M3_M24310591302026_512x8m81
+ Generating output for cell M3_M2$$44741676_512x8m81
+ Generating output for cell M3_M2$$43370540_512x8m81
+ Generating output for cell M2_M14310591302025_512x8m81
+ Generating output for cell M2_M1$$45013036_512x8m81
+ Generating output for cell M2_M1$$45012012_512x8m81
+ Generating output for cell M1_NACTIVE4310591302024_512x8m81
+ Generating output for cell saout_m2_512x8m81
+ Generating output for cell saout_R_m2_512x8m81
+ Generating output for cell via2_R90_512x8m81_0
+ Generating output for cell via1_x2_R90_512x8m81_0
+ Generating output for cell via1_R270_512x8m81_0
+ Generating output for cell via1_R90_512x8m81_0
+ Generating output for cell via1_2_512x8m81_0
+ Generating output for cell M3_M2$$43368492_512x8m81_0
+ Generating output for cell M2_M1$$46894124_512x8m81_0
+ Generating output for cell M1_PSUB$$45111340_512x8m81_0
+ Generating output for cell M1_PACTIVE4310591302075_512x8m81
+ Generating output for cell M1_NWELL$$47121452_512x8m81
+ Generating output for cell M1_NWELL$$46277676_512x8m81
+ Generating output for cell ypass_gate_512x8m81_0
+ Generating output for cell via2_x2_R270_512x8m81_0
+ Generating output for cell via1_x2_R270_512x8m81_0
+ Generating output for cell via1_2_x2_R270_512x8m81_0
+ Generating output for cell via2_x2_R90_512x8m81_0
+ Generating output for cell via1_2_x2_R90_512x8m81_0
+ Generating output for cell via1_2_x2_512x8m81_0
+ Generating output for cell pmos_5p04310591302097_512x8m81
+ Generating output for cell pmos_5p04310591302095_512x8m81
+ Generating output for cell nmos_5p04310591302098_512x8m81
+ Generating output for cell nmos_5p04310591302096_512x8m81
+ Generating output for cell M2_M1$$47117356_512x8m81
+ Generating output for cell M2_M1$$43375660_512x8m81
+ Generating output for cell M1_PSUB$$46274604_512x8m81
+ Generating output for cell M1_POLY2$$46559276_512x8m81_0
+ Generating output for cell M1_NWELL$$44998700_512x8m81
+ Generating output for cell 018SRAM_strap1_bndry_512x8m81
+ Generating output for cell M3_M24310591302021_512x8m81
+ Generating output for cell 018SRAM_strap1_512x8m81
+ Generating output for cell 018SRAM_cell1_dummy_R_512x8m81
+ Generating output for cell 018SRAM_cell1_dummy_512x8m81
+ Generating output for cell 018SRAM_cell1_512x8m81
+ Generating output for cell 018SRAM_cell1_2x_512x8m81
+ Generating output for cell rdummy_512x4_512x8m81
+ Generating output for cell 018SRAM_strap1_2x_512x8m81
+ Generating output for cell rarray4_512_512x8m81
+ Generating output for cell dcap_103_novia_512x8m81
+ Generating output for cell M3_M24310591302023_512x8m81
+ Generating output for cell M3_M24310591302022_512x8m81
+ Generating output for cell M3_M2$$201416748_512x8m81
+ Generating output for cell rcol4_512_512x8m81
+ Generating output for cell M3_M243105913020102_512x8m81
+ Generating output for cell M3_M24310591302095_512x8m81
+ Generating output for cell M2_M14310591302097_512x8m81
+ Generating output for cell power_route_07_512x8m81
+ Generating output for cell M3_M243105913020101_512x8m81
+ Generating output for cell M3_M243105913020100_512x8m81
+ Generating output for cell M3_M24310591302099_512x8m81
+ Generating output for cell M3_M24310591302098_512x8m81
+ Generating output for cell power_route_06_512x8m81
+ Generating output for cell M3_M24310591302096_512x8m81
+ Generating output for cell power_route_05_512x8m81
+ Generating output for cell M3_M24310591302094_512x8m81
+ Generating output for cell M3_M24310591302091_512x8m81
+ Generating output for cell M3_M24310591302090_512x8m81
+ Generating output for cell M3_M24310591302089_512x8m81
+ Generating output for cell M3_M24310591302088_512x8m81
+ Generating output for cell M3_M24310591302086_512x8m81
+ Generating output for cell M3_M24310591302085_512x8m81
+ Generating output for cell M3_M24310591302084_512x8m81
+ Generating output for cell M3_M24310591302083_512x8m81
+ Generating output for cell M3_M24310591302082_512x8m81
+ Generating output for cell M3_M24310591302042_512x8m81
+ Generating output for cell M2_M14310591302093_512x8m81
+ Generating output for cell M2_M14310591302092_512x8m81
+ Generating output for cell M2_M14310591302087_512x8m81
+ Generating output for cell M2_M14310591302081_512x8m81
+ Generating output for cell M2_M14310591302080_512x8m81
+ Generating output for cell power_route_04_512x8m81
+ Generating output for cell power_route_02_b_512x8m81
+ Generating output for cell power_route_02_a_512x8m81
+ Generating output for cell M3_M24310591302016_512x8m81
+ Generating output for cell M2_M14310591302017_512x8m81
+ Generating output for cell power_route_01_512x8m81
+ Generating output for cell M3_M2431059130206_512x8m81
+ Generating output for cell M2_M14310591302012_512x8m81
+ Generating output for cell power_route_512x8m81
+ Generating output for cell power_route_01_c_512x8m81
+ Generating output for cell power_route_01_b_512x8m81
+ Generating output for cell power_route_01_a_512x8m81
+ Generating output for cell M3_M243105913020104_512x8m81
+ Generating output for cell M2_M143105913020103_512x8m81
+ Generating output for cell power_a_512x8m81
+ Generating output for cell M3_M2431059130205_512x8m81
+ Generating output for cell m2m3_512x8m81
+ Generating output for cell new_dummyrowunit01_512x8m81
+ Generating output for cell new_dummyrow_unit_512x8m81
+ Generating output for cell 018SRAM_cell1_cutPC_512x8m81
+ Generating output for cell array16_512_dummy_01_512x8m81
+ Generating output for cell ldummy_512x4_512x8m81
+ Generating output for cell 018SRAM_strap1_2x_bndry_512x8m81
+ Generating output for cell Cell_array8x8_512x8m81
+ Generating output for cell col_512a_512x8m81
+ Generating output for cell lcol4_512_512x8m81
+ Generating output for cell pmos_5p04310591302055_512x8m81
+ Generating output for cell nmos_5p04310591302054_512x8m81
+ Generating output for cell M3_M24310591302053_512x8m81
+ Generating output for cell M2_M14310591302056_512x8m81
+ Generating output for cell M2_M14310591302055_512x8m81
+ Generating output for cell M2_M14310591302054_512x8m81
+ Generating output for cell M2_M14310591302052_512x8m81
+ Generating output for cell ypredec1_ys_512x8m81
+ Generating output for cell pmos_5p04310591302060_512x8m81
+ Generating output for cell pmos_1p2$$47821868_512x8m81
+ Generating output for cell pmos_5p04310591302061_512x8m81
+ Generating output for cell pmos_1p2$$47820844_512x8m81
+ Generating output for cell M3_M2$$47819820_512x8m81
+ Generating output for cell M3_M2$$47333420_512x8m81
+ Generating output for cell M3_M2$$47332396_512x8m81
+ Generating output for cell M3_M2$$47108140_512x8m81
+ Generating output for cell M2_M1$$47515692_512x8m81
+ Generating output for cell M2_M1$$43380780_512x8m81
+ Generating output for cell M2_M1$$43379756_512x8m81
+ Generating output for cell M2_M1$$43378732_512x8m81
+ Generating output for cell ypredec1_xa_512x8m81
+ Generating output for cell M3_M24310591302058_512x8m81
+ Generating output for cell M2_M14310591302057_512x8m81
+ Generating output for cell ypredec1_xax8_512x8m81
+ Generating output for cell nmos_5p04310591302057_512x8m81
+ Generating output for cell nmos_1p2$$47514668_512x8m81
+ Generating output for cell pmos_1p2_161_512x8m81
+ Generating output for cell pmos_1p2_160_512x8m81
+ Generating output for cell pmos_5p04310591302058_512x8m81
+ Generating output for cell pmos_1p2$$47331372_512x8m81
+ Generating output for cell nmos_1p2_157_512x8m81
+ Generating output for cell nmos_5p04310591302059_512x8m81
+ Generating output for cell nmos_1p2$$47329324_512x8m81
+ Generating output for cell M3_M2$$47333420_150_512x8m81
+ Generating output for cell M3_M2$$47108140_149_512x8m81
+ Generating output for cell M3_M2$$43368492_151_512x8m81
+ Generating output for cell M2_M1_154_512x8m81
+ Generating output for cell M2_M1$$43380780_152_512x8m81
+ Generating output for cell M2_M1$$43379756_153_512x8m81
+ Generating output for cell M1_PSUB$$45110316_512x8m81
+ Generating output for cell M1_POLY2_155_512x8m81
+ Generating output for cell alatch_512x8m81
+ Generating output for cell M3_M2$$47334444_512x8m81
+ Generating output for cell M3_M2$$43368492_512x8m81
+ Generating output for cell M2_M1$$43377708_512x8m81
+ Generating output for cell M2_M1$$34864172_512x8m81
+ Generating output for cell M1_PSUB$$47818796_512x8m81
+ Generating output for cell M1_POLY2$$46559276_512x8m81
+ Generating output for cell M1_NWELL14_512x8m81
+ Generating output for cell ypredec1_bot_512x8m81
+ Generating output for cell pmos_5p04310591302062_512x8m81
+ Generating output for cell pmos_1p2$$47109164_512x8m81
+ Generating output for cell nmos_5p04310591302056_512x8m81
+ Generating output for cell nmos_5p04310591302053_512x8m81
+ Generating output for cell nmos_1p2$$47342636_512x8m81
+ Generating output for cell M3_M2$$47633452_512x8m81
+ Generating output for cell M3_M2$$47632428_512x8m81
+ Generating output for cell M3_M2$$43368492_R270_512x8m81
+ Generating output for cell M2_M14310591302051_512x8m81
+ Generating output for cell M2_M1$$47631404_512x8m81
+ Generating output for cell M2_M1$$47630380_512x8m81
+ Generating output for cell M1_PSUB$$47114284_512x8m81
+ Generating output for cell M1_NWELL13_512x8m81
+ Generating output for cell M1_NWELL12_512x8m81
+ Generating output for cell ypredec1_512x8m81
+ Generating output for cell pmos_5p04310591302068_512x8m81
+ Generating output for cell pmos_1p2$$47513644_512x8m81
+ Generating output for cell pmos_5p04310591302072_512x8m81
+ Generating output for cell pmos_1p2$$47512620_512x8m81
+ Generating output for cell M2_M1$$47327276_512x8m81
+ Generating output for cell M2_M1$$43376684_512x8m81
+ Generating output for cell M1_POLY24310591302060_512x8m81
+ Generating output for cell xpredec1_xa_512x8m81
+ Generating output for cell pmos_5p04310591302070_512x8m81
+ Generating output for cell pmos_1p2$$47337516_512x8m81
+ Generating output for cell nmos_5p04310591302071_512x8m81
+ Generating output for cell nmos_1p2$$47336492_512x8m81
+ Generating output for cell M1_PSUB$$47335468_512x8m81
+ Generating output for cell M1_NWELL10_512x8m81
+ Generating output for cell xpredec1_bot_512x8m81
+ Generating output for cell M1_POLY2_R270_512x8m81
+ Generating output for cell xpredec1_512x8m81
+ Generating output for cell pmos_5p04310591302067_512x8m81
+ Generating output for cell pmos_1p2$$47643692_512x8m81
+ Generating output for cell pmos_1p2$$47642668_512x8m81
+ Generating output for cell nmos_1p2$$47641644_512x8m81
+ Generating output for cell M3_M2$$47644716_512x8m81
+ Generating output for cell M2_M1$$47640620_512x8m81
+ Generating output for cell M2_M1$$47500332_512x8m81
+ Generating output for cell M1_POLY24310591302059_512x8m81
+ Generating output for cell xpredec0_xa_512x8m81
+ Generating output for cell pmos_5p04310591302063_512x8m81
+ Generating output for cell pmos_1p2$$47504428_512x8m81
+ Generating output for cell pmos_5p04310591302064_512x8m81
+ Generating output for cell pmos_1p2$$47503404_512x8m81
+ Generating output for cell nmos_5p04310591302066_512x8m81
+ Generating output for cell nmos_5p04310591302065_512x8m81
+ Generating output for cell nmos_1p2$$47502380_512x8m81
+ Generating output for cell M3_M2$$47645740_512x8m81
+ Generating output for cell M1_NWELL11_512x8m81
+ Generating output for cell xpredec0_bot_512x8m81
+ Generating output for cell pmos_5p04310591302069_512x8m81
+ Generating output for cell M1_PACTIVE_02_512x8m81
+ Generating output for cell xpredec0_512x8m81
+ Generating output for cell M3_M2$$201412652_512x8m81
+ Generating output for cell M3_M2$$47115308_512x8m81
+ Generating output for cell prexdec_top_512x8m81
+ Generating output for cell pmos_5p04310591302082_512x8m81
+ Generating output for cell pmos_5p04310591302080_512x8m81
+ Generating output for cell pmos_5p04310591302079_512x8m81
+ Generating output for cell pmos_5p04310591302077_512x8m81
+ Generating output for cell nmos_5p04310591302081_512x8m81
+ Generating output for cell nmos_5p04310591302078_512x8m81
+ Generating output for cell nmos_5p04310591302076_512x8m81
+ Generating output for cell nmos_5p04310591302075_512x8m81
+ Generating output for cell M3_M24310591302072_512x8m81
+ Generating output for cell M3_M24310591302050_512x8m81
+ Generating output for cell M3_M2$$201255980_512x8m81
+ Generating output for cell M2_M14310591302074_512x8m81
+ Generating output for cell M2_M14310591302073_512x8m81
+ Generating output for cell M1_PACTIVE4310591302071_512x8m81
+ Generating output for cell M1_PACTIVE4310591302069_512x8m81
+ Generating output for cell M1_NACTIVE4310591302070_512x8m81
+ Generating output for cell wen_v2_512x8m81
+ Generating output for cell pmos_5p04310591302094_512x8m81
+ Generating output for cell pmos_5p04310591302092_512x8m81
+ Generating output for cell pmos_5p04310591302089_512x8m81
+ Generating output for cell pmos_5p04310591302088_512x8m81
+ Generating output for cell pmos_5p04310591302074_512x8m81
+ Generating output for cell pmos_5p04310591302091_512x8m81
+ Generating output for cell pmos_1p2$$48624684_512x8m81
+ Generating output for cell pmos_5p04310591302073_512x8m81
+ Generating output for cell pmos_1p2$$48623660_512x8m81
+ Generating output for cell pmos_5p04310591302087_512x8m81
+ Generating output for cell pmos_1p2$$47815724_512x8m81
+ Generating output for cell pmos_1p2$$47330348_512x8m81
+ Generating output for cell nmos_5p04310591302093_512x8m81
+ Generating output for cell nmos_5p04310591302090_512x8m81
+ Generating output for cell nmos_5p04310591302083_512x8m81
+ Generating output for cell nmos_1p2$$48629804_512x8m81
+ Generating output for cell nmos_5p04310591302084_512x8m81
+ Generating output for cell nmos_1p2$$48308268_512x8m81
+ Generating output for cell nmos_5p04310591302085_512x8m81
+ Generating output for cell nmos_1p2$$48306220_512x8m81
+ Generating output for cell nmos_5p04310591302086_512x8m81
+ Generating output for cell nmos_1p2$$48302124_512x8m81
+ Generating output for cell M3_M24310591302064_512x8m81
+ Generating output for cell M3_M2$$169756716_512x8m81
+ Generating output for cell M3_M2$$169755692_512x8m81
+ Generating output for cell M3_M2$$169753644_512x8m81
+ Generating output for cell M3_M2$$48231468_512x8m81
+ Generating output for cell M3_M2$$48229420_512x8m81
+ Generating output for cell M3_M2$$48228396_512x8m81
+ Generating output for cell M3_M2$$48227372_512x8m81
+ Generating output for cell M3_M2$$48066604_512x8m81
+ Generating output for cell M2_M14310591302065_512x8m81
+ Generating output for cell M2_M1_01_R270_512x8m81
+ Generating output for cell M2_M1$$199746604_512x8m81
+ Generating output for cell M2_M1$$170064940_512x8m81
+ Generating output for cell M2_M1$$170063916_512x8m81
+ Generating output for cell M2_M1$$170061868_512x8m81
+ Generating output for cell M2_M1$$168351788_512x8m81
+ Generating output for cell M2_M1$$48316460_512x8m81
+ Generating output for cell M2_M1$$48224300_512x8m81
+ Generating output for cell M2_M1$$48222252_512x8m81
+ Generating output for cell M2_M1$$48221228_512x8m81
+ Generating output for cell M2_M1$$48220204_512x8m81
+ Generating output for cell M2_M1$$48219180_512x8m81
+ Generating output for cell M2_M1$$48218156_512x8m81
+ Generating output for cell M2_M1$$48217132_512x8m81
+ Generating output for cell M2_M1$$34864172_R90_512x8m81
+ Generating output for cell M1_PSUB_03_R90_512x8m81
+ Generating output for cell M1_PSUB_03_512x8m81
+ Generating output for cell M1_PSUB_02_R90_512x8m81
+ Generating output for cell M1_PSUB$$48312364_512x8m81
+ Generating output for cell M1_POLY24310591302067_512x8m81
+ Generating output for cell M1_POLY24310591302066_512x8m81
+ Generating output for cell M1_POLY24310591302062_512x8m81
+ Generating output for cell M1_POLY24310591302061_512x8m81
+ Generating output for cell M1_PACTIVE_03_R90_512x8m81
+ Generating output for cell M1_PACTIVE_02_R90_512x8m81
+ Generating output for cell M1_PACTIVE_01_R90_512x8m81
+ Generating output for cell M1_PACTIVE4310591302068_512x8m81
+ Generating output for cell M1_PACTIVE06_512x8m81
+ Generating output for cell M1_PACTIVE02_512x8m81
+ Generating output for cell M1_PACTIVE01_512x8m81
+ Generating output for cell M1_NWELL_03_R90_512x8m81
+ Generating output for cell M1_NWELL_02_R90_512x8m81
+ Generating output for cell M1_NWELL17_512x8m81
+ Generating output for cell M1_NWELL16_512x8m81
+ Generating output for cell M1_NWELL01_512x8m81
+ Generating output for cell M1_NACTIVE4310591302063_512x8m81
+ Generating output for cell CON_512x8m81
+ Generating output for cell gen_512x8_512x8m81
+ Generating output for cell M3_M2$$201401388_512x8m81
+ Generating output for cell M2_M1$$202405932_512x8m81
+ Generating output for cell M1_PACTIVE4310591302049_512x8m81
+ Generating output for cell M1_PACTIVE4310591302048_512x8m81
+ Generating output for cell M1_NACTIVE4310591302047_512x8m81
+ Generating output for cell control_512x8_512x8m81
+ Generating output for cell M3_M24310591302015_512x8m81
+ Generating output for cell M3_M24310591302013_512x8m81
+ Generating output for cell M3_M24310591302011_512x8m81
+ Generating output for cell M3_M2431059130209_512x8m81
+ Generating output for cell M3_M2431059130202_512x8m81
+ Generating output for cell M3_M2$$201415724_512x8m81
+ Generating output for cell M3_M2$$201414700_512x8m81
+ Generating output for cell M3_M2$$201413676_512x8m81
+ Generating output for cell M3_M2$$201258028_512x8m81
+ Generating output for cell M3_M2$$201254956_512x8m81
+ Generating output for cell M3_M2$$201253932_512x8m81
+ Generating output for cell M3_M2$$201250860_512x8m81
+ Generating output for cell M3_M2$$201249836_512x8m81
+ Generating output for cell M3_M2$$201248812_512x8m81
+ Generating output for cell M2_M1431059130204_512x8m81
+ Generating output for cell M2_M1431059130203_512x8m81
+ Generating output for cell M2_M1$$201261100_512x8m81
+ Generating output for cell M2_M1$$201260076_512x8m81
+ Generating output for cell M2_M1$$199747628_512x8m81
+ Generating output for cell M1_PSUB4310591302014_512x8m81
+ Generating output for cell M1_PSUB4310591302010_512x8m81
+ Generating output for cell M1_PSUB4310591302046_512x8m81
+ Generating output for cell M1_PSUB4310591302045_512x8m81
+ Generating output for cell M1_PSUB4310591302044_512x8m81
+ Generating output for cell M1_PSUB4310591302043_512x8m81
+ Generating output for cell G_ring_512x8m81
+ Generating output for cell GF018_512x8M8WM1_lef_512x8m81
+ Generating output for cell M3_M24310591302079_512x8m81
+ Generating output for cell M3_M24310591302078_512x8m81
+ Generating output for cell M3_M24310591302077_512x8m81
+ Generating output for cell M2_M14310591302076_512x8m81
+ Generating output for cell 512x8M8W_PWR_512x8m81
+ Generating output for cell gf180mcu_fd_ip_sram__sram512x8m8wm1
+ Generating output for cell gf180_ram_512x8_wrapper
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__nand2_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffrsnq_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__inv_12
+ Generating output for cell spare_logic_block
+ Generating output for cell user_id_programming
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__buf_12
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkbuf_20
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__buf_16
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__buf_20
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__invz_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__invz_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__invz_8
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__invz_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffrsnq_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffnrnq_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffrsnq_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffq_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffq_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffnsnq_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffnrnq_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__dffnsnq_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xor3_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xnor3_1
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__oai33_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xor3_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xnor2_4
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkinv_12
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__clkinv_16
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__xnor3_2
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__inv_8
+ Generating output for cell gf180mcu_fd_sc_mcu7t5v0__inv_16
+ Generating output for cell caravel_core
+ Generating output for cell font_76
+ Generating output for cell font_75
+ Generating output for cell font_72
+ Generating output for cell font_70
+ Generating output for cell font_66
+ Generating output for cell font_64
+ Generating output for cell font_63
+ Generating output for cell font_62
+ Generating output for cell font_50
+ Generating output for cell font_47
+ Generating output for cell font_46
+ Generating output for cell font_45
+ Generating output for cell font_44
+ Generating output for cell font_32
+ Generating output for cell font_30
+ Generating output for cell font_29
+ Generating output for cell font_28
+ Generating output for cell font_6F
+ Generating output for cell font_4B
+ Generating output for cell font_2D
+ Generating output for cell copyright_block
+ Generating output for cell open_source
+ Generating output for cell M5_M4_CDNS_406619531451
+ Generating output for cell M5_M4_CDNS_406619531450
+ Generating output for cell M4_M3_CDNS_406619531453
+ Generating output for cell M4_M3_CDNS_406619531452
+ Generating output for cell POLY_SUB_FILL_1
+ Generating output for cell M3_M2_CDNS_4066195314510
+ Generating output for cell M3_M2_CDNS_406619531459
+ Generating output for cell M3_M2_CDNS_406619531457
+ Generating output for cell M3_M2_CDNS_406619531456
+ Generating output for cell M2_M1_CDNS_406619531454
+ Generating output for cell M1_PSUB_CDNS_406619531458
+ Generating output for cell M1_PSUB_CDNS_406619531455
+ Generating output for cell GF_NI_FILL10_1
+ Generating output for cell GF_NI_FILL10_0
+ Generating output for cell gf180mcu_fd_io__fill10
+ Generating output for cell M5_M4_CDNS_40661953145532
+ Generating output for cell M5_M4_CDNS_40661953145531
+ Generating output for cell M5_M4_CDNS_40661953145530
+ Generating output for cell M5_M4_CDNS_40661953145505
+ Generating output for cell M5_M4_CDNS_40661953145504
+ Generating output for cell M5_M4_CDNS_40661953145503
+ Generating output for cell M5_M4_CDNS_40661953145493
+ Generating output for cell M5_M4_CDNS_40661953145506
+ Generating output for cell M5_M4_CDNS_40661953145507
+ Generating output for cell M5_M4_CDNS_40661953145508
+ Generating output for cell M5_M4_CDNS_40661953145509
+ Generating output for cell M5_M4_CDNS_40661953145510
+ Generating output for cell M5_M4_CDNS_40661953145511
+ Generating output for cell M5_M4_CDNS_40661953145512
+ Generating output for cell M5_M4_CDNS_40661953145513
+ Generating output for cell M5_M4_CDNS_40661953145514
+ Generating output for cell M5_M4_CDNS_40661953145515
+ Generating output for cell M5_M4_CDNS_40661953145516
+ Generating output for cell M5_M4_CDNS_40661953145501
+ Generating output for cell M5_M4_CDNS_40661953145517
+ Generating output for cell M5_M4_CDNS_40661953145518
+ Generating output for cell M5_M4_CDNS_40661953145519
+ Generating output for cell M5_M4_CDNS_40661953145495
+ Generating output for cell M5_M4_CDNS_40661953145496
+ Generating output for cell M5_M4_CDNS_40661953145441
+ Generating output for cell M5_M4_CDNS_40661953145462
+ Generating output for cell M5_M4_CDNS_40661953145468
+ Generating output for cell M5_M4_CDNS_40661953145469
+ Generating output for cell M5_M4_CDNS_40661953145470
+ Generating output for cell M5_M4_CDNS_40661953145484
+ Generating output for cell M5_M4_CDNS_40661953145485
+ Generating output for cell M5_M4_CDNS_40661953145460
+ Generating output for cell M5_M4_CDNS_40661953145443
+ Generating output for cell M5_M4_CDNS_40661953145487
+ Generating output for cell M5_M4_CDNS_40661953145459
+ Generating output for cell M5_M4_CDNS_40661953145456
+ Generating output for cell M5_M4_CDNS_40661953145454
+ Generating output for cell M5_M4_CDNS_40661953145497
+ Generating output for cell M5_M4_CDNS_40661953145498
+ Generating output for cell M5_M4_CDNS_40661953145499
+ Generating output for cell M5_M4_CDNS_40661953145500
+ Generating output for cell M5_M4_CDNS_40661953145533
+ Generating output for cell M5_M4_CDNS_40661953145534
+ Generating output for cell M5_M4_CDNS_40661953145535
+ Generating output for cell M5_M4_CDNS_40661953145536
+ Generating output for cell M5_M4_CDNS_40661953145537
+ Generating output for cell M5_M4_CDNS_40661953145538
+ Generating output for cell M5_M4_CDNS_40661953145539
+ Generating output for cell M5_M4_CDNS_40661953145540
+ Generating output for cell M5_M4_CDNS_40661953145541
+ Generating output for cell M5_M4_CDNS_40661953145458
+ Generating output for cell M5_M4_CDNS_40661953145440
+ Generating output for cell M5_M4_CDNS_40661953145463
+ Generating output for cell M5_M4_CDNS_40661953145415
+ Generating output for cell M5_M4_CDNS_40661953145461
+ Generating output for cell M5_M4_CDNS_40661953145444
+ Generating output for cell M5_M4_CDNS_40661953145457
+ Generating output for cell M5_M4_CDNS_40661953145488
+ Generating output for cell M5_M4_CDNS_40661953145486
+ Generating output for cell M5_M4_CDNS_40661953145448
+ Generating output for cell M5_M4_CDNS_40661953145452
+ Generating output for cell M5_M4_CDNS_40661953145525
+ Generating output for cell M5_M4_CDNS_40661953145524
+ Generating output for cell M5_M4_CDNS_40661953145523
+ Generating output for cell M5_M4_CDNS_40661953145522
+ Generating output for cell M5_M4_CDNS_40661953145521
+ Generating output for cell M5_M4_CDNS_40661953145520
+ Generating output for cell M5_M4_CDNS_40661953145502
+ Generating output for cell M5_M4_CDNS_40661953145483
+ Generating output for cell M5_M4_CDNS_40661953145482
+ Generating output for cell M5_M4_CDNS_40661953145480
+ Generating output for cell M5_M4_CDNS_40661953145479
+ Generating output for cell M5_M4_CDNS_40661953145467
+ Generating output for cell M5_M4_CDNS_40661953145450
+ Generating output for cell M5_M4_CDNS_40661953145478
+ Generating output for cell M5_M4_CDNS_40661953145477
+ Generating output for cell M5_M4_CDNS_40661953145476
+ Generating output for cell M5_M4_CDNS_40661953145475
+ Generating output for cell M5_M4_CDNS_40661953145474
+ Generating output for cell M5_M4_CDNS_40661953145473
+ Generating output for cell M5_M4_CDNS_40661953145494
+ Generating output for cell M5_M4_CDNS_40661953145472
+ Generating output for cell M5_M4_CDNS_40661953145471
+ Generating output for cell M5_M4_CDNS_40661953145436
+ Generating output for cell M5_M4_CDNS_40661953145529
+ Generating output for cell M5_M4_CDNS_40661953145528
+ Generating output for cell M5_M4_CDNS_40661953145527
+ Generating output for cell M5_M4_CDNS_40661953145526
+ Generating output for cell M5_M4_CDNS_40661953145481
+ Generating output for cell M5_M4_CDNS_40661953145446
+ Generating output for cell M5_M4_CDNS_40661953145445
+ Generating output for cell M5_M4_CDNS_40661953145442
+ Generating output for cell M5_M4_CDNS_40661953145425
+ Generating output for cell M5_M4_CDNS_40661953145435
+ Generating output for cell M5_M4_CDNS_40661953145433
+ Generating output for cell M5_M4_CDNS_40661953145434
+ Generating output for cell M5_M4_CDNS_40661953145455
+ Generating output for cell M5_M4_CDNS_40661953145432
+ Generating output for cell M5_M4_CDNS_40661953145430
+ Generating output for cell M5_M4_CDNS_40661953145431
+ Generating output for cell M5_M4_CDNS_40661953145451
+ Generating output for cell M5_M4_CDNS_40661953145429
+ Generating output for cell M5_M4_CDNS_40661953145453
+ Generating output for cell M5_M4_CDNS_40661953145439
+ Generating output for cell M5_M4_CDNS_40661953145427
+ Generating output for cell M5_M4_CDNS_40661953145492
+ Generating output for cell M5_M4_CDNS_40661953145449
+ Generating output for cell M5_M4_CDNS_40661953145447
+ Generating output for cell M5_M4_CDNS_40661953145417
+ Generating output for cell M5_M4_CDNS_40661953145423
+ Generating output for cell M5_M4_CDNS_40661953145419
+ Generating output for cell M5_M4_CDNS_40661953145428
+ Generating output for cell M5_M4_CDNS_40661953145438
+ Generating output for cell M5_M4_CDNS_40661953145416
+ Generating output for cell polygon00035
+ Generating output for cell polygon00036
+ Generating output for cell M5_M4_CDNS_40661953145422
+ Generating output for cell M5_M4_CDNS_40661953145421
+ Generating output for cell M5_M4_CDNS_40661953145420
+ Generating output for cell M5_M4_CDNS_40661953145437
+ Generating output for cell polygon00032
+ Generating output for cell polygon00033
+ Generating output for cell polygon00034
+ Generating output for cell M5_M4_CDNS_40661953145491
+ Generating output for cell M5_M4_CDNS_40661953145490
+ Generating output for cell M5_M4_CDNS_40661953145489
+ Generating output for cell M5_M4_CDNS_40661953145466
+ Generating output for cell M5_M4_CDNS_40661953145465
+ Generating output for cell M5_M4_CDNS_40661953145464
+ Generating output for cell M5_M4_CDNS_40661953145426
+ Generating output for cell M5_M4_CDNS_40661953145424
+ Generating output for cell M5_M4_CDNS_40661953145418
+ Generating output for cell M4_M3_CDNS_40661953145615
+ Generating output for cell M4_M3_CDNS_40661953145614
+ Generating output for cell M4_M3_CDNS_40661953145554
+ Generating output for cell M4_M3_CDNS_40661953145551
+ Generating output for cell M4_M3_CDNS_40661953145550
+ Generating output for cell M4_M3_CDNS_40661953145549
+ Generating output for cell M4_M3_CDNS_40661953145548
+ Generating output for cell M4_M3_CDNS_40661953145610
+ Generating output for cell M4_M3_CDNS_40661953145611
+ Generating output for cell M4_M3_CDNS_40661953145612
+ Generating output for cell M4_M3_CDNS_40661953145613
+ Generating output for cell M4_M3_CDNS_40661953145606
+ Generating output for cell M4_M3_CDNS_40661953145607
+ Generating output for cell M4_M3_CDNS_40661953145608
+ Generating output for cell M4_M3_CDNS_40661953145609
+ Generating output for cell M4_M3_CDNS_40661953145603
+ Generating output for cell M4_M3_CDNS_40661953145604
+ Generating output for cell M4_M3_CDNS_40661953145605
+ Generating output for cell M4_M3_CDNS_40661953145599
+ Generating output for cell M4_M3_CDNS_40661953145600
+ Generating output for cell M4_M3_CDNS_40661953145601
+ Generating output for cell M4_M3_CDNS_40661953145602
+ Generating output for cell M4_M3_CDNS_40661953145552
+ Generating output for cell M4_M3_CDNS_40661953145598
+ Generating output for cell M4_M3_CDNS_40661953145571
+ Generating output for cell M4_M3_CDNS_40661953145573
+ Generating output for cell M4_M3_CDNS_40661953145580
+ Generating output for cell M4_M3_CDNS_40661953145581
+ Generating output for cell M4_M3_CDNS_40661953145584
+ Generating output for cell M4_M3_CDNS_40661953145585
+ Generating output for cell M4_M3_CDNS_40661953145579
+ Generating output for cell M4_M3_CDNS_40661953145586
+ Generating output for cell M4_M3_CDNS_40661953145578
+ Generating output for cell M4_M3_CDNS_40661953145588
+ Generating output for cell M4_M3_CDNS_40661953145590
+ Generating output for cell M4_M3_CDNS_40661953145592
+ Generating output for cell M4_M3_CDNS_40661953145546
+ Generating output for cell M4_M3_CDNS_40661953145544
+ Generating output for cell M4_M3_CDNS_40661953145555
+ Generating output for cell M4_M3_CDNS_40661953145561
+ Generating output for cell M4_M3_CDNS_40661953145593
+ Generating output for cell M4_M3_CDNS_40661953145594
+ Generating output for cell M4_M3_CDNS_40661953145595
+ Generating output for cell M4_M3_CDNS_40661953145596
+ Generating output for cell M4_M3_CDNS_40661953145597
+ Generating output for cell M4_M3_CDNS_40661953145616
+ Generating output for cell M4_M3_CDNS_40661953145646
+ Generating output for cell M4_M3_CDNS_40661953145647
+ Generating output for cell M4_M3_CDNS_40661953145648
+ Generating output for cell M4_M3_CDNS_40661953145649
+ Generating output for cell M4_M3_CDNS_40661953145583
+ Generating output for cell M4_M3_CDNS_40661953145582
+ Generating output for cell M4_M3_CDNS_40661953145572
+ Generating output for cell M4_M3_CDNS_40661953145574
+ Generating output for cell M4_M3_CDNS_40661953145587
+ Generating output for cell M4_M3_CDNS_40661953145589
+ Generating output for cell M4_M3_CDNS_40661953145591
+ Generating output for cell M4_M3_CDNS_40661953145556
+ Generating output for cell M4_M3_CDNS_40661953145543
+ Generating output for cell M4_M3_CDNS_40661953145558
+ Generating output for cell M4_M3_CDNS_40661953145542
+ Generating output for cell M4_M3_CDNS_40661953145650
+ Generating output for cell M4_M3_CDNS_40661953145570
+ Generating output for cell M4_M3_CDNS_40661953145569
+ Generating output for cell M4_M3_CDNS_40661953145568
+ Generating output for cell M4_M3_CDNS_40661953145567
+ Generating output for cell M4_M3_CDNS_40661953145566
+ Generating output for cell M4_M3_CDNS_40661953145656
+ Generating output for cell M4_M3_CDNS_40661953145655
+ Generating output for cell M4_M3_CDNS_40661953145654
+ Generating output for cell M4_M3_CDNS_40661953145653
+ Generating output for cell M4_M3_CDNS_40661953145652
+ Generating output for cell M4_M3_CDNS_40661953145651
+ Generating output for cell M4_M3_CDNS_40661953145617
+ Generating output for cell M4_M3_CDNS_40661953145662
+ Generating output for cell M4_M3_CDNS_40661953145661
+ Generating output for cell M4_M3_CDNS_40661953145660
+ Generating output for cell M4_M3_CDNS_40661953145659
+ Generating output for cell M4_M3_CDNS_40661953145658
+ Generating output for cell M4_M3_CDNS_40661953145657
+ Generating output for cell M4_M3_CDNS_40661953145666
+ Generating output for cell M4_M3_CDNS_40661953145665
+ Generating output for cell M4_M3_CDNS_40661953145664
+ Generating output for cell M4_M3_CDNS_40661953145663
+ Generating output for cell M4_M3_CDNS_40661953145577
+ Generating output for cell M4_M3_CDNS_40661953145565
+ Generating output for cell M4_M3_CDNS_40661953145564
+ Generating output for cell M4_M3_CDNS_40661953145563
+ Generating output for cell M4_M3_CDNS_40661953145562
+ Generating output for cell M4_M3_CDNS_40661953145619
+ Generating output for cell M4_M3_CDNS_40661953145621
+ Generating output for cell M4_M3_CDNS_40661953145623
+ Generating output for cell M4_M3_CDNS_40661953145625
+ Generating output for cell M4_M3_CDNS_40661953145629
+ Generating output for cell M4_M3_CDNS_40661953145627
+ Generating output for cell M4_M3_CDNS_40661953145631
+ Generating output for cell M4_M3_CDNS_40661953145545
+ Generating output for cell M4_M3_CDNS_40661953145635
+ Generating output for cell M4_M3_CDNS_40661953145633
+ Generating output for cell M4_M3_CDNS_40661953145547
+ Generating output for cell M4_M3_CDNS_40661953145557
+ Generating output for cell M4_M3_CDNS_40661953145553
+ Generating output for cell M4_M3_CDNS_40661953145559
+ Generating output for cell M4_M3_CDNS_40661953145560
+ Generating output for cell M4_M3_CDNS_40661953145618
+ Generating output for cell M4_M3_CDNS_40661953145637
+ Generating output for cell M4_M3_CDNS_40661953145620
+ Generating output for cell M4_M3_CDNS_40661953145624
+ Generating output for cell M4_M3_CDNS_40661953145622
+ Generating output for cell M4_M3_CDNS_40661953145628
+ Generating output for cell M4_M3_CDNS_40661953145626
+ Generating output for cell M4_M3_CDNS_40661953145630
+ Generating output for cell M4_M3_CDNS_40661953145634
+ Generating output for cell M4_M3_CDNS_40661953145632
+ Generating output for cell polygon00024
+ Generating output for cell polygon00025
+ Generating output for cell M4_M3_CDNS_40661953145636
+ Generating output for cell M4_M3_CDNS_40661953145640
+ Generating output for cell M4_M3_CDNS_40661953145638
+ Generating output for cell M4_M3_CDNS_40661953145642
+ Generating output for cell polygon00021
+ Generating output for cell polygon00022
+ Generating output for cell polygon00023
+ Generating output for cell M4_M3_CDNS_40661953145668
+ Generating output for cell M4_M3_CDNS_40661953145667
+ Generating output for cell M4_M3_CDNS_40661953145645
+ Generating output for cell M4_M3_CDNS_40661953145644
+ Generating output for cell M4_M3_CDNS_40661953145643
+ Generating output for cell M4_M3_CDNS_40661953145641
+ Generating output for cell M4_M3_CDNS_40661953145639
+ Generating output for cell M4_M3_CDNS_40661953145576
+ Generating output for cell M4_M3_CDNS_40661953145575
+ Generating output for cell polygon00013
+ Generating output for cell polygon00014
+ Generating output for cell M1_PSUB_CDNS_40661953145674
+ Generating output for cell polygon00012
+ Generating output for cell M1_PSUB_CDNS_40661953145669
+ Generating output for cell M3_M2_CDNS_40661953145676
+ Generating output for cell M3_M2_CDNS_40661953145675
+ Generating output for cell M1_PSUB_CDNS_40661953145673
+ Generating output for cell polygon00011
+ Generating output for cell polygon00010
+ Generating output for cell polygon00009
+ Generating output for cell polygon00008
+ Generating output for cell polygon00007
+ Generating output for cell M1_PSUB_CDNS_40661953145672
+ Generating output for cell M1_PSUB_CDNS_40661953145670
+ Generating output for cell M1_PSUB_CDNS_40661953145671
+ Generating output for cell polygon00001
+ Generating output for cell polygon00002
+ Generating output for cell polygon00003
+ Generating output for cell polygon00004
+ Generating output for cell polygon00005
+ Generating output for cell polygon00006
+ Generating output for cell POWER_RAIL_COR_1
+ Generating output for cell polygon00015
+ Generating output for cell polygon00016
+ Generating output for cell polygon00017
+ Generating output for cell polygon00018
+ Generating output for cell polygon00019
+ Generating output for cell polygon00020
+ Generating output for cell POWER_RAIL_COR_0
+ Generating output for cell polygon00026
+ Generating output for cell polygon00027
+ Generating output for cell polygon00028
+ Generating output for cell polygon00029
+ Generating output for cell polygon00030
+ Generating output for cell polygon00031
+ Generating output for cell POWER_RAIL_COR
+ Generating output for cell M3_M2_CDNS_40661953145776
+ Generating output for cell M3_M2_CDNS_40661953145773
+ Generating output for cell M3_M2_CDNS_40661953145771
+ Generating output for cell M3_M2_CDNS_40661953145770
+ Generating output for cell M3_M2_CDNS_40661953145768
+ Generating output for cell M3_M2_CDNS_40661953145766
+ Generating output for cell M3_M2_CDNS_40661953145764
+ Generating output for cell M3_M2_CDNS_40661953145762
+ Generating output for cell M3_M2_CDNS_40661953145760
+ Generating output for cell M3_M2_CDNS_40661953145758
+ Generating output for cell M3_M2_CDNS_40661953145756
+ Generating output for cell M3_M2_CDNS_40661953145754
+ Generating output for cell M3_M2_CDNS_40661953145753
+ Generating output for cell M3_M2_CDNS_40661953145750
+ Generating output for cell M3_M2_CDNS_40661953145747
+ Generating output for cell M3_M2_CDNS_40661953145746
+ Generating output for cell M3_M2_CDNS_40661953145744
+ Generating output for cell M3_M2_CDNS_40661953145742
+ Generating output for cell M3_M2_CDNS_40661953145741
+ Generating output for cell M3_M2_CDNS_40661953145739
+ Generating output for cell M3_M2_CDNS_40661953145738
+ Generating output for cell M3_M2_CDNS_40661953145737
+ Generating output for cell M3_M2_CDNS_40661953145730
+ Generating output for cell M3_M2_CDNS_40661953145727
+ Generating output for cell M3_M2_CDNS_40661953145726
+ Generating output for cell M3_M2_CDNS_40661953145719
+ Generating output for cell M3_M2_CDNS_40661953145696
+ Generating output for cell M3_M2_CDNS_40661953145693
+ Generating output for cell M3_M2_CDNS_40661953145691
+ Generating output for cell M3_M2_CDNS_40661953145690
+ Generating output for cell M3_M2_CDNS_40661953145689
+ Generating output for cell M3_M2_CDNS_40661953145175
+ Generating output for cell M2_M1_CDNS_40661953145775
+ Generating output for cell M2_M1_CDNS_40661953145774
+ Generating output for cell M2_M1_CDNS_40661953145772
+ Generating output for cell M2_M1_CDNS_40661953145769
+ Generating output for cell M2_M1_CDNS_40661953145767
+ Generating output for cell M2_M1_CDNS_40661953145765
+ Generating output for cell M2_M1_CDNS_40661953145763
+ Generating output for cell M2_M1_CDNS_40661953145761
+ Generating output for cell M2_M1_CDNS_40661953145759
+ Generating output for cell M2_M1_CDNS_40661953145757
+ Generating output for cell M2_M1_CDNS_40661953145755
+ Generating output for cell M2_M1_CDNS_40661953145752
+ Generating output for cell M2_M1_CDNS_40661953145751
+ Generating output for cell M2_M1_CDNS_40661953145749
+ Generating output for cell M2_M1_CDNS_40661953145748
+ Generating output for cell M2_M1_CDNS_40661953145745
+ Generating output for cell M2_M1_CDNS_40661953145743
+ Generating output for cell M2_M1_CDNS_40661953145740
+ Generating output for cell M2_M1_CDNS_40661953145736
+ Generating output for cell M2_M1_CDNS_40661953145735
+ Generating output for cell M2_M1_CDNS_40661953145734
+ Generating output for cell M2_M1_CDNS_40661953145733
+ Generating output for cell M2_M1_CDNS_40661953145732
+ Generating output for cell M2_M1_CDNS_40661953145731
+ Generating output for cell M2_M1_CDNS_40661953145729
+ Generating output for cell M2_M1_CDNS_40661953145728
+ Generating output for cell M2_M1_CDNS_40661953145725
+ Generating output for cell M2_M1_CDNS_40661953145724
+ Generating output for cell M2_M1_CDNS_40661953145722
+ Generating output for cell M2_M1_CDNS_40661953145694
+ Generating output for cell M2_M1_CDNS_40661953145692
+ Generating output for cell M2_M1_CDNS_40661953145688
+ Generating output for cell M2_M1_CDNS_40661953145687
+ Generating output for cell M2_M1_CDNS_40661953145686
+ Generating output for cell M2_M1_CDNS_40661953145183
+ Generating output for cell M1_PSUB_CDNS_40661953145723
+ Generating output for cell M1_PSUB_CDNS_40661953145721
+ Generating output for cell M1_PSUB_CDNS_40661953145720
+ Generating output for cell M1_PSUB_CDNS_40661953145718
+ Generating output for cell M1_PSUB_CDNS_40661953145717
+ Generating output for cell M1_PSUB_CDNS_40661953145716
+ Generating output for cell M1_PSUB_CDNS_40661953145715
+ Generating output for cell M1_PSUB_CDNS_40661953145714
+ Generating output for cell M1_PSUB_CDNS_40661953145713
+ Generating output for cell M1_PSUB_CDNS_40661953145712
+ Generating output for cell M1_PSUB_CDNS_40661953145711
+ Generating output for cell M1_PSUB_CDNS_40661953145710
+ Generating output for cell M1_PSUB_CDNS_40661953145709
+ Generating output for cell M1_PSUB_CDNS_40661953145708
+ Generating output for cell M1_PSUB_CDNS_40661953145707
+ Generating output for cell M1_PSUB_CDNS_40661953145706
+ Generating output for cell M1_PSUB_CDNS_40661953145705
+ Generating output for cell M1_PSUB_CDNS_40661953145704
+ Generating output for cell M1_PSUB_CDNS_40661953145703
+ Generating output for cell M1_PSUB_CDNS_40661953145702
+ Generating output for cell M1_PSUB_CDNS_40661953145701
+ Generating output for cell M1_PSUB_CDNS_40661953145700
+ Generating output for cell M1_PSUB_CDNS_40661953145699
+ Generating output for cell M1_PSUB_CDNS_40661953145698
+ Generating output for cell M1_PSUB_CDNS_40661953145697
+ Generating output for cell M1_PSUB_CDNS_40661953145695
+ Generating output for cell M1_PSUB_CDNS_40661953145685
+ Generating output for cell moscap_routing
+ Generating output for cell nmoscap_6p0_CDNS_406619531454
+ Generating output for cell M1_PSUB_CDNS_40661953145129
+ Generating output for cell M1_PSUB_CDNS_40661953145126
+ Generating output for cell moscap_corner
+ Generating output for cell M1_PSUB_CDNS_40661953145684
+ Generating output for cell M1_PSUB_CDNS_40661953145683
+ Generating output for cell M1_PSUB_CDNS_40661953145682
+ Generating output for cell M1_PSUB_CDNS_40661953145681
+ Generating output for cell moscap_corner_3
+ Generating output for cell M1_PSUB_CDNS_40661953145680
+ Generating output for cell M1_PSUB_CDNS_40661953145679
+ Generating output for cell moscap_corner_2
+ Generating output for cell M1_PSUB_CDNS_40661953145678
+ Generating output for cell moscap_corner_1
+ Generating output for cell M1_PSUB_CDNS_40661953145677
+ Generating output for cell top_routing_cor
+ Generating output for cell M3_M2_CDNS_40661953145804
+ Generating output for cell M3_M2_CDNS_40661953145803
+ Generating output for cell M3_M2_CDNS_40661953145802
+ Generating output for cell M3_M2_CDNS_40661953145801
+ Generating output for cell M3_M2_CDNS_40661953145800
+ Generating output for cell M3_M2_CDNS_40661953145799
+ Generating output for cell M3_M2_CDNS_40661953145798
+ Generating output for cell M3_M2_CDNS_40661953145797
+ Generating output for cell M3_M2_CDNS_40661953145796
+ Generating output for cell M3_M2_CDNS_40661953145795
+ Generating output for cell M3_M2_CDNS_40661953145786
+ Generating output for cell M3_M2_CDNS_40661953145785
+ Generating output for cell M3_M2_CDNS_40661953145784
+ Generating output for cell M3_M2_CDNS_40661953145783
+ Generating output for cell M3_M2_CDNS_40661953145782
+ Generating output for cell M3_M2_CDNS_40661953145781
+ Generating output for cell M3_M2_CDNS_4066195314590
+ Generating output for cell M3_M2_CDNS_4066195314587
+ Generating output for cell M3_M2_CDNS_4066195314584
+ Generating output for cell M2_M1_CDNS_4066195314588
+ Generating output for cell power_via_cor_5
+ Generating output for cell M3_M2_CDNS_40661953145780
+ Generating output for cell M3_M2_CDNS_40661953145779
+ Generating output for cell M3_M2_CDNS_40661953145778
+ Generating output for cell M3_M2_CDNS_40661953145777
+ Generating output for cell power_via_cor_3
+ Generating output for cell M2_M1_CDNS_40661953145805
+ Generating output for cell M2_M1_CDNS_40661953145794
+ Generating output for cell M2_M1_CDNS_40661953145793
+ Generating output for cell M2_M1_CDNS_40661953145791
+ Generating output for cell M2_M1_CDNS_40661953145788
+ Generating output for cell M2_M1_CDNS_40661953145292
+ Generating output for cell M2_M1_CDNS_40661953145147
+ Generating output for cell top_route_1
+ Generating output for cell pmos_6p0_CDNS_406619531456
+ Generating output for cell pmos_6p0_CDNS_406619531455
+ Generating output for cell pmos_6p0_CDNS_406619531452
+ Generating output for cell nmos_6p0_CDNS_406619531457
+ Generating output for cell M2_M1_CDNS_40661953145792
+ Generating output for cell M2_M1_CDNS_40661953145790
+ Generating output for cell M2_M1_CDNS_40661953145789
+ Generating output for cell M2_M1_CDNS_40661953145787
+ Generating output for cell M2_M1_CDNS_40661953145158
+ Generating output for cell M2_M1_CDNS_40661953145149
+ Generating output for cell M2_M1_CDNS_40661953145136
+ Generating output for cell M1_PSUB_CDNS_40661953145134
+ Generating output for cell M1_PSUB_CDNS_40661953145133
+ Generating output for cell M1_PSUB_CDNS_40661953145130
+ Generating output for cell M1_POLY2_CDNS_40661953145132
+ Generating output for cell M1_NWELL_CDNS_40661953145135
+ Generating output for cell M1_NWELL_CDNS_40661953145131
+ Generating output for cell nmos_clamp_20_50_4
+ Generating output for cell nmos_6p0_CDNS_406619531459
+ Generating output for cell nmos_6p0_CDNS_406619531458
+ Generating output for cell ppolyf_u_CDNS_406619531453
+ Generating output for cell M1_NWELL_CDNS_40661953145128
+ Generating output for cell M1_NWELL_CDNS_40661953145127
+ Generating output for cell comp018green_esd_rc_v5p0
+ Generating output for cell M2_M1_CDNS_40661953145103
+ Generating output for cell M1_PSUB_CDNS_40661953145102
+ Generating output for cell M1_POLY2_CDNS_40661953145110
+ Generating output for cell M1_POLY2_CDNS_40661953145109
+ Generating output for cell M1_POLY2_CDNS_40661953145108
+ Generating output for cell M1_POLY2_CDNS_40661953145106
+ Generating output for cell M1_POLY2_CDNS_40661953145105
+ Generating output for cell M1_NWELL_CDNS_40661953145111
+ Generating output for cell M1_NWELL_CDNS_40661953145107
+ Generating output for cell comp018green_esd_clamp_v5p0_2
+ Generating output for cell top_route
+ Generating output for cell comp018green_esd_rc_v5p0_1
+ Generating output for cell comp018green_esd_clamp_v5p0_1
+ Generating output for cell ESD_CLAMP_COR
+ Generating output for cell GF_NI_COR_BASE
+ Generating output for cell gf180mcu_fd_io__cor
+ Generating output for cell np_6p0_CDNS_406619531451
+ Generating output for cell nmoscap_6p0_CDNS_406619531450
+ Generating output for cell M2_M1_CDNS_40661953145162
+ Generating output for cell M2_M1_CDNS_40661953145146
+ Generating output for cell M2_M1_CDNS_40661953145140
+ Generating output for cell M2_M1_CDNS_40661953145138
+ Generating output for cell M2_M1_CDNS_4066195314586
+ Generating output for cell M2_M1_CDNS_4066195314585
+ Generating output for cell M2_M1_CDNS_4066195314574
+ Generating output for cell M2_M1_CDNS_4066195314573
+ Generating output for cell nmos_clamp_20_50_4_DVSS
+ Generating output for cell M2_M1_CDNS_40661953145161
+ Generating output for cell M2_M1_CDNS_40661953145160
+ Generating output for cell M2_M1_CDNS_40661953145159
+ Generating output for cell M2_M1_CDNS_40661953145125
+ Generating output for cell M2_M1_CDNS_40661953145122
+ Generating output for cell M2_M1_CDNS_40661953145118
+ Generating output for cell M2_M1_CDNS_40661953145117
+ Generating output for cell M2_M1_CDNS_40661953145113
+ Generating output for cell M2_M1_CDNS_40661953145112
+ Generating output for cell M1_PSUB_CDNS_40661953145124
+ Generating output for cell M1_PSUB_CDNS_40661953145123
+ Generating output for cell comp018green_esd_clamp_v5p0_DVSS
+ Generating output for cell M3_M2_CDNS_40661953145155
+ Generating output for cell M3_M2_CDNS_40661953145153
+ Generating output for cell M3_M2_CDNS_40661953145152
+ Generating output for cell M3_M2_CDNS_40661953145150
+ Generating output for cell M3_M2_CDNS_4066195314598
+ Generating output for cell M3_M2_CDNS_4066195314597
+ Generating output for cell M3_M2_CDNS_4066195314596
+ Generating output for cell M3_M2_CDNS_4066195314594
+ Generating output for cell M3_M2_CDNS_4066195314593
+ Generating output for cell M3_M2_CDNS_4066195314592
+ Generating output for cell M3_M2_CDNS_4066195314589
+ Generating output for cell M2_M1_CDNS_40661953145157
+ Generating output for cell M2_M1_CDNS_40661953145156
+ Generating output for cell M2_M1_CDNS_40661953145154
+ Generating output for cell M2_M1_CDNS_40661953145151
+ Generating output for cell M2_M1_CDNS_40661953145148
+ Generating output for cell M2_M1_CDNS_40661953145145
+ Generating output for cell M2_M1_CDNS_40661953145144
+ Generating output for cell M2_M1_CDNS_40661953145143
+ Generating output for cell M2_M1_CDNS_40661953145142
+ Generating output for cell M2_M1_CDNS_40661953145141
+ Generating output for cell M1_PSUB_CDNS_40661953145101
+ Generating output for cell M1_PSUB_CDNS_40661953145100
+ Generating output for cell M1_PSUB_CDNS_4066195314599
+ Generating output for cell M1_PSUB_CDNS_4066195314570
+ Generating output for cell M1_PSUB_CDNS_4066195314569
+ Generating output for cell M1_PSUB_CDNS_4066195314568
+ Generating output for cell M1_PSUB_CDNS_4066195314567
+ Generating output for cell M1_PSUB_CDNS_4066195314566
+ Generating output for cell M1_PSUB_CDNS_4066195314565
+ Generating output for cell M1_PSUB_CDNS_4066195314564
+ Generating output for cell M1_NWELL_CDNS_4066195314572
+ Generating output for cell M1_NWELL_CDNS_4066195314571
+ Generating output for cell GF_NI_DVSS_BASE
+ Generating output for cell M5_M4_CDNS_4066195314556
+ Generating output for cell M5_M4_CDNS_4066195314555
+ Generating output for cell M5_M4_CDNS_4066195314554
+ Generating output for cell M5_M4_CDNS_4066195314553
+ Generating output for cell M4_M3_CDNS_4066195314551
+ Generating output for cell M4_M3_CDNS_4066195314549
+ Generating output for cell M4_M3_CDNS_4066195314547
+ Generating output for cell M4_M3_CDNS_4066195314546
+ Generating output for cell M3_M2_CDNS_4066195314552
+ Generating output for cell M3_M2_CDNS_4066195314550
+ Generating output for cell M3_M2_CDNS_4066195314548
+ Generating output for cell M3_M2_CDNS_4066195314545
+ Generating output for cell Bondpad_5LM
+ Generating output for cell M5_M4_CDNS_4066195314561
+ Generating output for cell M5_M4_CDNS_4066195314560
+ Generating output for cell M5_M4_CDNS_4066195314559
+ Generating output for cell M4_M3_CDNS_4066195314558
+ Generating output for cell M4_M3_CDNS_4066195314557
+ Generating output for cell M4_M3_CDNS_4066195314562
+ Generating output for cell M1_PSUB_CDNS_4066195314563
+ Generating output for cell 3LM_METAL_RAIL
+ Generating output for cell 4LM_METAL_RAIL
+ Generating output for cell 5LM_METAL_RAIL
+ Generating output for cell 5LM_METAL_RAIL_PAD_60
+ Generating output for cell gf180mcu_fd_io__dvss
+ Generating output for cell ppolyf_u_CDNS_4066195314551
+ Generating output for cell pn_6p0_CDNS_4066195314528
+ Generating output for cell nmoscap_6p0_CDNS_4066195314523
+ Generating output for cell nmoscap_6p0_CDNS_4066195314522
+ Generating output for cell pmos_6p0_CDNS_4066195314529
+ Generating output for cell pmos_6p0_CDNS_4066195314512
+ Generating output for cell nmos_6p0_CDNS_4066195314531
+ Generating output for cell nmos_6p0_CDNS_4066195314530
+ Generating output for cell M1_PSUB_CDNS_40661953145275
+ Generating output for cell M1_PSUB_CDNS_40661953145237
+ Generating output for cell M1_PSUB_CDNS_40661953145228
+ Generating output for cell M1_PSUB_CDNS_40661953145226
+ Generating output for cell M1_POLY2_CDNS_40661953145222
+ Generating output for cell M1_NWELL_CDNS_40661953145274
+ Generating output for cell M1_NWELL_CDNS_40661953145273
+ Generating output for cell M1_NWELL_CDNS_40661953145223
+ Generating output for cell comp018green_sigbuf_1
+ Generating output for cell pn_6p0_CDNS_4066195314510
+ Generating output for cell pmos_6p0_CDNS_4066195314513
+ Generating output for cell nmos_6p0_CDNS_4066195314511
+ Generating output for cell M2_M1_CDNS_40661953145227
+ Generating output for cell M2_M1_CDNS_40661953145164
+ Generating output for cell M1_PSUB_CDNS_40661953145224
+ Generating output for cell M1_PSUB_CDNS_40661953145221
+ Generating output for cell M1_NWELL_CDNS_40661953145225
+ Generating output for cell M1_NWELL_CDNS_40661953145218
+ Generating output for cell comp018green_out_sigbuf_oe
+ Generating output for cell M1_PSUB_CDNS_40661953145271
+ Generating output for cell M1_NWELL_CDNS_40661953145272
+ Generating output for cell comp018green_out_sigbuf_a
+ Generating output for cell pmos_6p0_CDNS_4066195314521
+ Generating output for cell pmos_6p0_CDNS_4066195314517
+ Generating output for cell pmos_6p0_CDNS_4066195314516
+ Generating output for cell pmos_6p0_CDNS_4066195314515
+ Generating output for cell nmos_6p0_CDNS_4066195314520
+ Generating output for cell nmos_6p0_CDNS_4066195314519
+ Generating output for cell nmos_6p0_CDNS_4066195314518
+ Generating output for cell nmos_6p0_CDNS_4066195314514
+ Generating output for cell M2_M1_CDNS_40661953145181
+ Generating output for cell M1_PSUB_CDNS_40661953145238
+ Generating output for cell M1_PSUB_CDNS_40661953145235
+ Generating output for cell M1_PSUB_CDNS_40661953145234
+ Generating output for cell M1_PSUB_CDNS_40661953145233
+ Generating output for cell M1_PSUB_CDNS_40661953145232
+ Generating output for cell M1_POLY2_CDNS_40661953145229
+ Generating output for cell M1_NWELL_CDNS_40661953145236
+ Generating output for cell M1_NWELL_CDNS_40661953145231
+ Generating output for cell M1_NWELL_CDNS_40661953145230
+ Generating output for cell comp018green_out_predrv
+ Generating output for cell pmos_6p0_esd_40
+ Generating output for cell comp018green_out_drv_pleg_4T_Y
+ Generating output for cell comp018green_out_drv_pleg_4T_X
+ Generating output for cell M3_M2_CDNS_40661953145353
+ Generating output for cell M3_M2_CDNS_40661953145264
+ Generating output for cell M3_M2_CDNS_40661953145208
+ Generating output for cell M2_M1_CDNS_40661953145366
+ Generating output for cell M2_M1_CDNS_40661953145365
+ Generating output for cell PMOS_4T_metal_stack
+ Generating output for cell M3_M2_CDNS_40661953145363
+ Generating output for cell M3_M2_CDNS_40661953145358
+ Generating output for cell M3_M2_CDNS_40661953145350
+ Generating output for cell M3_M2_CDNS_40661953145209
+ Generating output for cell M3_M2_CDNS_40661953145180
+ Generating output for cell M2_M1_CDNS_40661953145364
+ Generating output for cell M2_M1_CDNS_40661953145360
+ Generating output for cell M2_M1_CDNS_40661953145359
+ Generating output for cell M2_M1_CDNS_40661953145356
+ Generating output for cell M2_M1_CDNS_40661953145355
+ Generating output for cell M2_M1_CDNS_40661953145354
+ Generating output for cell M2_M1_CDNS_40661953145348
+ Generating output for cell M2_M1_CDNS_40661953145347
+ Generating output for cell M2_M1_CDNS_40661953145346
+ Generating output for cell M2_M1_CDNS_40661953145177
+ Generating output for cell M1_PSUB_CDNS_40661953145362
+ Generating output for cell M1_PSUB_CDNS_40661953145357
+ Generating output for cell M1_PSUB_CDNS_40661953145351
+ Generating output for cell M1_PSUB_CDNS_40661953145349
+ Generating output for cell M1_PSUB_CDNS_40661953145283
+ Generating output for cell M1_NWELL_CDNS_40661953145361
+ Generating output for cell M1_NWELL_CDNS_40661953145352
+ Generating output for cell M1_NWELL_CDNS_40661953145345
+ Generating output for cell M1_NWELL_CDNS_40661953145286
+ Generating output for cell comp018green_out_paddrv_4T_PMOS_GROUP
+ Generating output for cell M3_M2_CDNS_40661953145371
+ Generating output for cell M3_M2_CDNS_40661953145370
+ Generating output for cell M3_M2_CDNS_40661953145369
+ Generating output for cell M2_M1_CDNS_40661953145368
+ Generating output for cell M2_M1_CDNS_40661953145367
+ Generating output for cell nmos_4T_metal_stack
+ Generating output for cell comp018green_out_drv_nleg_4T
+ Generating output for cell M1_PSUB_CDNS_40661953145376
+ Generating output for cell M1_PSUB_CDNS_40661953145375
+ Generating output for cell M1_PSUB_CDNS_40661953145372
+ Generating output for cell M1_NWELL_CDNS_40661953145374
+ Generating output for cell M1_NWELL_CDNS_40661953145373
+ Generating output for cell GR_NMOS_4T
+ Generating output for cell comp018green_out_paddrv_4T_NMOS_GROUP
+ Generating output for cell M3_M2_CDNS_40661953145342
+ Generating output for cell M3_M2_CDNS_40661953145341
+ Generating output for cell M3_M2_CDNS_40661953145340
+ Generating output for cell M3_M2_CDNS_40661953145278
+ Generating output for cell M3_M2_CDNS_40661953145263
+ Generating output for cell M2_M1_CDNS_40661953145344
+ Generating output for cell M2_M1_CDNS_40661953145343
+ Generating output for cell M2_M1_CDNS_40661953145280
+ Generating output for cell M2_M1_CDNS_40661953145279
+ Generating output for cell M2_M1_CDNS_40661953145201
+ Generating output for cell comp018green_out_paddrv_16T
+ Generating output for cell M1_PSUB_CDNS_40661953145321
+ Generating output for cell M1_NWELL_CDNS_40661953145322
+ Generating output for cell M1_NWELL_CDNS_40661953145315
+ Generating output for cell comp018green_sigbuf
+ Generating output for cell ppolyf_u_CDNS_4066195314533
+ Generating output for cell ppolyf_u_CDNS_4066195314532
+ Generating output for cell M1_NWELL_CDNS_40661953145316
+ Generating output for cell comp018green_in_pupd
+ Generating output for cell M1_PSUB_CDNS_40661953145324
+ Generating output for cell M1_NWELL_CDNS_40661953145323
+ Generating output for cell comp018green_std_xor2
+ Generating output for cell comp018green_std_nand2
+ Generating output for cell comp018green_in_logic_pupd
+ Generating output for cell pmos_6p0_CDNS_4066195314548
+ Generating output for cell pmos_6p0_CDNS_4066195314546
+ Generating output for cell pmos_6p0_CDNS_4066195314539
+ Generating output for cell nmos_6p0_CDNS_4066195314550
+ Generating output for cell nmos_6p0_CDNS_4066195314549
+ Generating output for cell nmos_6p0_CDNS_4066195314547
+ Generating output for cell M2_M1_CDNS_40661953145216
+ Generating output for cell M1_PSUB_CDNS_40661953145327
+ Generating output for cell M1_PSUB_CDNS_40661953145326
+ Generating output for cell M1_NWELL_CDNS_40661953145328
+ Generating output for cell M1_NWELL_CDNS_40661953145325
+ Generating output for cell comp018green_in_drv
+ Generating output for cell pmos_6p0_CDNS_4066195314545
+ Generating output for cell pmos_6p0_CDNS_4066195314544
+ Generating output for cell pmos_6p0_CDNS_4066195314543
+ Generating output for cell pmos_6p0_CDNS_4066195314538
+ Generating output for cell pmos_6p0_CDNS_4066195314534
+ Generating output for cell nmos_6p0_CDNS_4066195314542
+ Generating output for cell nmos_6p0_CDNS_4066195314541
+ Generating output for cell nmos_6p0_CDNS_4066195314540
+ Generating output for cell nmos_6p0_CDNS_4066195314537
+ Generating output for cell nmos_6p0_CDNS_4066195314536
+ Generating output for cell nmos_6p0_CDNS_4066195314535
+ Generating output for cell M2_M1_CDNS_40661953145115
+ Generating output for cell M1_PSUB_CDNS_40661953145319
+ Generating output for cell M1_PSUB_CDNS_40661953145317
+ Generating output for cell M1_NWELL_CDNS_40661953145320
+ Generating output for cell M1_NWELL_CDNS_40661953145318
+ Generating output for cell comp018green_in_cms_smt
+ Generating output for cell M3_M2_CDNS_40661953145314
+ Generating output for cell M3_M2_CDNS_40661953145313
+ Generating output for cell M2_M1_CDNS_40661953145312
+ Generating output for cell comp018green_inpath_cms_smt
+ Generating output for cell ppolyf_u_CDNS_4066195314525
+ Generating output for cell pn_6p0_CDNS_4066195314527
+ Generating output for cell np_6p0_CDNS_4066195314526
+ Generating output for cell M3_M2_CDNS_40661953145269
+ Generating output for cell M3_M2_CDNS_40661953145268
+ Generating output for cell M3_M2_CDNS_40661953145265
+ Generating output for cell M3_M2_CDNS_40661953145262
+ Generating output for cell M3_M2_CDNS_40661953145258
+ Generating output for cell M2_M1_CDNS_40661953145270
+ Generating output for cell M2_M1_CDNS_40661953145267
+ Generating output for cell M2_M1_CDNS_40661953145266
+ Generating output for cell M2_M1_CDNS_40661953145261
+ Generating output for cell M2_M1_CDNS_40661953145260
+ Generating output for cell M2_M1_CDNS_40661953145259
+ Generating output for cell M2_M1_CDNS_40661953145257
+ Generating output for cell M2_M1_CDNS_40661953145256
+ Generating output for cell M2_M1_CDNS_40661953145247
+ Generating output for cell M2_M1_CDNS_40661953145239
+ Generating output for cell M2_M1_CDNS_40661953145182
+ Generating output for cell M1_PACTIVE_CDNS_40661953145253
+ Generating output for cell M1_PACTIVE_CDNS_40661953145252
+ Generating output for cell M1_PACTIVE_CDNS_40661953145251
+ Generating output for cell M1_PACTIVE_CDNS_40661953145250
+ Generating output for cell M1_PACTIVE_CDNS_40661953145249
+ Generating output for cell M1_PACTIVE_CDNS_40661953145248
+ Generating output for cell M1_PACTIVE_CDNS_40661953145240
+ Generating output for cell M1_NACTIVE_CDNS_40661953145255
+ Generating output for cell M1_NACTIVE_CDNS_40661953145254
+ Generating output for cell M1_NACTIVE_CDNS_40661953145246
+ Generating output for cell M1_NACTIVE_CDNS_40661953145245
+ Generating output for cell M1_NACTIVE_CDNS_40661953145244
+ Generating output for cell M1_NACTIVE_CDNS_40661953145243
+ Generating output for cell M1_NACTIVE_CDNS_40661953145242
+ Generating output for cell M1_NACTIVE_CDNS_40661953145241
+ Generating output for cell comp018green_esd_cdm
+ Generating output for cell M3_M2_CDNS_40661953145332
+ Generating output for cell M3_M2_CDNS_40661953145330
+ Generating output for cell M3_M2_CDNS_40661953145213
+ Generating output for cell M3_M2_CDNS_40661953145212
+ Generating output for cell M3_M2_CDNS_40661953145210
+ Generating output for cell M3_M2_CDNS_40661953145207
+ Generating output for cell M3_M2_CDNS_40661953145206
+ Generating output for cell M3_M2_CDNS_40661953145204
+ Generating output for cell M3_M2_CDNS_40661953145202
+ Generating output for cell M3_M2_CDNS_40661953145200
+ Generating output for cell M3_M2_CDNS_40661953145199
+ Generating output for cell M3_M2_CDNS_40661953145197
+ Generating output for cell M3_M2_CDNS_40661953145196
+ Generating output for cell M3_M2_CDNS_40661953145194
+ Generating output for cell M3_M2_CDNS_40661953145193
+ Generating output for cell M3_M2_CDNS_40661953145190
+ Generating output for cell M3_M2_CDNS_40661953145188
+ Generating output for cell M3_M2_CDNS_40661953145186
+ Generating output for cell M3_M2_CDNS_40661953145179
+ Generating output for cell M3_M2_CDNS_40661953145174
+ Generating output for cell M3_M2_CDNS_40661953145172
+ Generating output for cell M3_M2_CDNS_40661953145170
+ Generating output for cell M2_M1_CDNS_40661953145378
+ Generating output for cell M2_M1_CDNS_40661953145333
+ Generating output for cell M2_M1_CDNS_40661953145331
+ Generating output for cell M2_M1_CDNS_40661953145329
+ Generating output for cell M2_M1_CDNS_40661953145214
+ Generating output for cell M2_M1_CDNS_40661953145211
+ Generating output for cell M2_M1_CDNS_40661953145205
+ Generating output for cell M2_M1_CDNS_40661953145203
+ Generating output for cell M2_M1_CDNS_40661953145198
+ Generating output for cell M2_M1_CDNS_40661953145195
+ Generating output for cell M2_M1_CDNS_40661953145189
+ Generating output for cell M2_M1_CDNS_40661953145187
+ Generating output for cell M2_M1_CDNS_40661953145185
+ Generating output for cell M2_M1_CDNS_40661953145178
+ Generating output for cell M2_M1_CDNS_40661953145176
+ Generating output for cell M2_M1_CDNS_40661953145173
+ Generating output for cell M2_M1_CDNS_40661953145171
+ Generating output for cell M2_M1_CDNS_40661953145169
+ Generating output for cell M2_M1_CDNS_40661953145163
+ Generating output for cell M2_M1_CDNS_40661953145120
+ Generating output for cell M2_M1_CDNS_40661953145116
+ Generating output for cell M2_M1_CDNS_40661953145114
+ Generating output for cell M1_PSUB_CDNS_40661953145339
+ Generating output for cell M1_PSUB_CDNS_40661953145338
+ Generating output for cell M1_PSUB_CDNS_40661953145215
+ Generating output for cell M1_PACTIVE_CDNS_40661953145168
+ Generating output for cell M1_PACTIVE_CDNS_40661953145167
+ Generating output for cell M1_PACTIVE_CDNS_40661953145166
+ Generating output for cell M1_PACTIVE_CDNS_40661953145165
+ Generating output for cell M1_NWELL_CDNS_40661953145377
+ Generating output for cell GF_NI_IN_S_BASE
+ Generating output for cell gf180mcu_fd_io__in_s
+ Generating output for cell GF_NI_IN_C_BASE
+ Generating output for cell gf180mcu_fd_io__in_c
+ Generating output for cell M3_M2_CDNS_40661953145335
+ Generating output for cell M2_M1_CDNS_40661953145334
+ Generating output for cell M1_PACTIVE_CDNS_40661953145337
+ Generating output for cell M1_PACTIVE_CDNS_40661953145336
+ Generating output for cell GF_NI_BI_T_BASE
+ Generating output for cell gf180mcu_fd_io__bi_t
+ Generating output for cell M2_M1_CDNS_40661953145139
+ Generating output for cell M2_M1_CDNS_40661953145137
+ Generating output for cell nmos_clamp_20_50_4_DVDD
+ Generating output for cell M2_M1_CDNS_40661953145121
+ Generating output for cell M2_M1_CDNS_40661953145119
+ Generating output for cell M2_M1_CDNS_40661953145104
+ Generating output for cell comp018green_esd_clamp_v5p0_DVDD
+ Generating output for cell M3_M2_CDNS_4066195314595
+ Generating output for cell M2_M1_CDNS_4066195314591
+ Generating output for cell M2_M1_CDNS_4066195314583
+ Generating output for cell M2_M1_CDNS_4066195314582
+ Generating output for cell M2_M1_CDNS_4066195314581
+ Generating output for cell M2_M1_CDNS_4066195314580
+ Generating output for cell M2_M1_CDNS_4066195314579
+ Generating output for cell M2_M1_CDNS_4066195314578
+ Generating output for cell M2_M1_CDNS_4066195314577
+ Generating output for cell M2_M1_CDNS_4066195314576
+ Generating output for cell M2_M1_CDNS_4066195314575
+ Generating output for cell GF_NI_DVDD_BASE
+ Generating output for cell gf180mcu_fd_io__dvdd
+ Generating output for cell M5_M4_CDNS_4066195314513
+ Generating output for cell M5_M4_CDNS_4066195314511
+ Generating output for cell M4_M3_CDNS_4066195314514
+ Generating output for cell M4_M3_CDNS_4066195314512
+ Generating output for cell M2_M1_CDNS_4066195314518
+ Generating output for cell POLY_SUB_FILL
+ Generating output for cell M3_M2_CDNS_4066195314517
+ Generating output for cell M2_M1_CDNS_4066195314515
+ Generating output for cell M1_PSUB_CDNS_4066195314516
+ Generating output for cell GF_NI_FILL5_1
+ Generating output for cell GF_NI_FILL5_0
+ Generating output for cell gf180mcu_fd_io__fill5
+ Generating output for cell chip_io
+ Generating output for cell alpha_1
+ Generating output for cell alpha_8
+ Generating output for cell alpha_0
+ Generating output for cell alpha_4
+ Generating output for cell alpha_5
+ Generating output for cell alpha_D
+ Generating output for cell alpha_6
+ Generating output for cell user_id_textblock
+ Generating output for cell caravel_180045d6
diff --git a/tapeout/logs/tools.info b/tapeout/logs/tools.info
new file mode 100644
index 0000000..98b8cee
--- /dev/null
+++ b/tapeout/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.28
+Magic: 8.3.348
\ No newline at end of file
diff --git a/tapeout/logs/uncompress.log b/tapeout/logs/uncompress.log
new file mode 100644
index 0000000..5ca3179
--- /dev/null
+++ b/tapeout/logs/uncompress.log
@@ -0,0 +1,24 @@
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+/bin/sh: line 0: cd: /root/project/verilog/dv/caravel/mgmt_soc/: No such file or directory
+make: Nothing to be done for `check-env'.
+def/efuse_ctrl.def.gz -> def/efuse_ctrl.def
+def/fpga_struct_block.def.gz -> def/fpga_struct_block.def
+def/user_project_wrapper.def.gz -> def/user_project_wrapper.def
+gds/efuse_ctrl.gds.gz -> gds/efuse_ctrl.gds
+gds/fpga_struct_block.gds.gz -> gds/fpga_struct_block.gds
+gds/user_project_wrapper.gds.gz -> gds/user_project_wrapper.gds
+sdf/efuse_ctrl.sdf.gz -> sdf/efuse_ctrl.sdf
+sdf/fpga_struct_block.sdf.gz -> sdf/fpga_struct_block.sdf
+sdf/user_project_wrapper.sdf.gz -> sdf/user_project_wrapper.sdf
+verilog/gl/efuse_ctrl.v.gz -> verilog/gl/efuse_ctrl.v
+verilog/gl/fpga_struct_block.v.gz -> verilog/gl/fpga_struct_block.v
+verilog/gl/user_project_wrapper.v.gz -> verilog/gl/user_project_wrapper.v
+All files are uncompressed!
