tapeout/outputs/drc/drc_run_2022_12_13_06_15_04.log - third_party/shuttle/gf180mcu/mpw-000/slot-006 - Git at Google

 13-Dec-2022 06:15:04 | INFO    | Your Klayout version is: KLayout 0.28
 13-Dec-2022 06:15:05 | INFO    | ## Generating template with for the following rule tables: ['comp.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['contact.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['dnwell.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['drc_bjt.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['dualgate.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['dummy_exclude.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['efuse.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['esd.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['geom.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['hres.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['lres.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['lvpwell.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['lvs_bjt.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['main.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['mcell.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['metal1.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['metal2.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['metal3.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['metal4.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['metal5.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['metaltop.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['mim.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['nat.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['nplus.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['otp_mk.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['poly2.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['pplus.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['pres.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['sab.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['sram.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['tail.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['via1.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['via2.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['via3.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['via4.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['via5.drc']
 13-Dec-2022 06:15:06 | INFO    | ## Generating template with for the following rule tables: ['ymtp_mk.drc']
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design comp on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design contact on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design dnwell on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design drc_bjt on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design dualgate on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design dummy_exclude on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design efuse on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design esd on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design geom on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design hres on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design lres on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design lvpwell on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design lvs_bjt on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design main on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design mcell on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal1 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal2 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal3 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal4 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal5 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metaltop on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design mim on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design nat on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design nplus on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design otp_mk on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design poly2 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design pplus on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design pres on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design sab on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design sram on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design tail on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via1 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via2 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via3 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via4 on cell caravel_1800eb3d:
 13-Dec-2022 06:15:06 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via5 on cell caravel_1800eb3d:
 13-Dec-2022 06:16:16 | INFO    | Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design ymtp_mk on cell caravel_1800eb3d:
 13-Dec-2022 07:19:38 | INFO    | Klayout DRC run is clean. GDS has no DRC violations.
	13-Dec-2022 06:15:04 \| INFO \| Your Klayout version is: KLayout 0.28
	13-Dec-2022 06:15:05 \| INFO \| ## Generating template with for the following rule tables: ['comp.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['contact.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['dnwell.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['drc_bjt.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['dualgate.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['dummy_exclude.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['efuse.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['esd.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['geom.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['hres.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['lres.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['lvpwell.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['lvs_bjt.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['main.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['mcell.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['metal1.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['metal2.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['metal3.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['metal4.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['metal5.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['metaltop.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['mim.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['nat.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['nplus.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['otp_mk.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['poly2.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['pplus.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['pres.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['sab.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['sram.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['tail.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['via1.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['via2.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['via3.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['via4.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['via5.drc']
	13-Dec-2022 06:15:06 \| INFO \| ## Generating template with for the following rule tables: ['ymtp_mk.drc']
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design comp on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design contact on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design dnwell on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design drc_bjt on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design dualgate on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design dummy_exclude on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design efuse on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design esd on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design geom on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design hres on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design lres on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design lvpwell on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design lvs_bjt on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design main on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design mcell on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal1 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal2 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal3 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal4 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metal5 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design metaltop on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design mim on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design nat on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design nplus on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design otp_mk on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design poly2 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design pplus on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design pres on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design sab on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design sram on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design tail on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via1 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via2 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via3 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via4 on cell caravel_1800eb3d:
	13-Dec-2022 06:15:06 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design via5 on cell caravel_1800eb3d:
	13-Dec-2022 06:16:16 \| INFO \| Running Global Foundries 180nm MCU /mnt/shuttles/shuttle/gfmpw-0/u6180_uchiyam/caravel_jacaranda-8_gf180/tapeout/outputs/oas/caravel_1800eb3d.oas checks on design ymtp_mk on cell caravel_1800eb3d:
	13-Dec-2022 07:19:38 \| INFO \| Klayout DRC run is clean. GDS has no DRC violations.