blob: 05d0a3d27c8b06d9294413bb5c6f95d44d4fc8d9 [file] [log] [blame]
Project Chip ID is: 402677881
Setting Project Chip ID to: 18006079
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!