blob: ae94a2155b7a478664cae5fa36b07a3b49c9c0e7 [file] [log] [blame]
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001###
2### Source file sky130.tech
3### Process this file with the preproc.py macro processor
4### Note that the tech name is always TECHNAME for
5### magic; this keeps compatibility between layouts
6### for all process variants.
7###
Tim Edwards78cc9eb2020-08-14 16:49:57 -04008#------------------------------------------------------------------------
Tim Edwards55f4d0e2020-07-05 15:41:02 -04009# Copyright (c) 2020 R. Timothy Edwards
10# Revisions: See below
11#
12# This file is an Open Source foundry process describing
Tim Edwardsb4da28f2020-07-25 16:43:32 -040013# the SkyWater sky130 hybrid 0.18um / 0.13um fabrication
Tim Edwards55f4d0e2020-07-05 15:41:02 -040014# process. The file may be distributed under the terms
Tim Edwardsab5bae82020-07-05 17:40:59 -040015# of the Apache 2.0 license agreement.
Tim Edwards55f4d0e2020-07-05 15:41:02 -040016#
Tim Edwards78cc9eb2020-08-14 16:49:57 -040017#------------------------------------------------------------------------
Tim Edwards55f4d0e2020-07-05 15:41:02 -040018# This file is designed to be used with magic versions
19# 8.3.24 or newer.
Tim Edwards78cc9eb2020-08-14 16:49:57 -040020#------------------------------------------------------------------------
Tim Edwards55f4d0e2020-07-05 15:41:02 -040021tech
22 format 35
23 TECHNAME
24end
25
26version
27 version REVISION
28 description "SkyWater SKY130: PRE ALPHA Vendor Open Source rules and DRC"
29end
30
Tim Edwards78cc9eb2020-08-14 16:49:57 -040031#------------------------------------------------------------------------
Tim Edwardsa043e432020-07-10 16:50:44 -040032# Status 7/10/20: Rev 1 (alpha):
Tim Edwardsab5bae82020-07-05 17:40:59 -040033# First public release
Tim Edwards78cc9eb2020-08-14 16:49:57 -040034# Status 8/14/20: Rev 2 (alpha):
35# Started updating with new device/model naming convention
36#------------------------------------------------------------------------
Tim Edwards55f4d0e2020-07-05 15:41:02 -040037
Tim Edwards78cc9eb2020-08-14 16:49:57 -040038#------------------------------------------------------------------------
Tim Edwards55f4d0e2020-07-05 15:41:02 -040039# Supported device types
Tim Edwards78cc9eb2020-08-14 16:49:57 -040040#------------------------------------------------------------------------
41# device name magic ID layer description
42#------------------------------------------------------------------------
43# sky130_fd_pr__nfet_01v8 nfet standard nFET
44# sky130_fd_pr__nfet_01v8 scnfet standard nFET in standard cell**
Tim Edwardsd7289eb2020-09-10 21:48:31 -040045# sky130_fd_pr__special_nfet_latch npd special nFET in SRAM cell
46# sky130_fd_pr__special_nfet_pass npass special nFET in SRAM cell
Tim Edwards78cc9eb2020-08-14 16:49:57 -040047# sky130_fd_pr__nfet_01v8_lvt nfetlvt low Vt nFET
Tim Edwardsd7289eb2020-09-10 21:48:31 -040048# sky130_fd_bs_flash__special_sonosfet_star nsonos SONOS nFET
Tim Edwards78cc9eb2020-08-14 16:49:57 -040049# sky130_fd_pr__pfet_01v8 pfet standard pFET
50# sky130_fd_pr__pfet_01v8 scpfet standard pFET in standard cell**
Tim Edwardsd7289eb2020-09-10 21:48:31 -040051# sky130_fd_pr__special_pfet_pass ppu special pFET in SRAM cell
Tim Edwards78cc9eb2020-08-14 16:49:57 -040052# sky130_fd_pr__pfet_01v8_lvt pfetlvt low Vt pFET
53# sky130_fd_pr__pfet_01v8_mvt pfetmvt med Vt pFET
54# sky130_fd_pr__pfet_01v8_hvt pfethvt high Vt pFET
55# sky130_fd_pr__nfet_03v3_nvt --- native nFET
56# sky130_fd_pr__pfet_g5v0d10v5 mvpfet thickox pFET
57# sky130_fd_pr__nfet_g5v0d10v5 mvnfet thickox nFET
58# sky130_fd_pr__nfet_01v8_nvt mvnnfet thickox native nFET
Tim Edwardsd7289eb2020-09-10 21:48:31 -040059# sky130_fd_pr__diode_pw2nd_05v5 ndiode n+ diff diode
Tim Edwardsbe6f1202020-10-29 10:37:46 -040060# sky130_fd_pr__diode_pw2nd_05v5_lvt ndiodelvt low Vt n+ diff diode
61# sky130_fd_pr__diode_pw2nd_05v5_nvt nndiode diode with nndiff
Tim Edwardsd7289eb2020-09-10 21:48:31 -040062# sky130_fd_pr__diode_pw2nd_11v0 mvndiode thickox n+ diff diode
63# sky130_fd_pr__diode_pd2nw_05v5 pdiode p+ diff diode
Tim Edwardsbe6f1202020-10-29 10:37:46 -040064# sky130_fd_pr__diode_pd2nw_05v5_lvt pdiodelvt low Vt p+ diff diode
65# sky130_fd_pr__diode_pd2nw_05v5_hvt pdiodehvt high Vt p+ diff diode
Tim Edwardsd7289eb2020-09-10 21:48:31 -040066# sky130_fd_pr__diode_pd2nw_11v0 mvpdiode thickox p+ diff diode
Tim Edwards862eeac2020-09-09 12:20:07 -040067# sky130_fd_pr__npn_05v0 pbase NPN in deep nwell
Tim Edwardsfcec6442020-10-26 11:09:27 -040068# sky130_fd_pr__npn_11v0 pbase thick oxide gated NPN
Tim Edwards862eeac2020-09-09 12:20:07 -040069# sky130_fd_pr__pnp_05v0 nbase PNP
Tim Edwardsd7289eb2020-09-10 21:48:31 -040070# sky130_fd_pr__cap_mim_m3_1 mimcap MiM cap 1st plate
71# sky130_fd_pr__cap_mim_m3_2 mimcap2 MiM cap 2nd plate
72# sky130_fd_pr__res_generic_nd rdn n+ diff resistor
Tim Edwards69901142020-09-21 15:09:56 -040073# sky130_fd_pr__res_generic_nd__hv mvrdn thickox n+ diff resistor
Tim Edwardsd7289eb2020-09-10 21:48:31 -040074# sky130_fd_pr__res_generic_pd rdp p+ diff resistor
Tim Edwards69901142020-09-21 15:09:56 -040075# sky130_fd_pr__res_generic_pd__nv mvrdp thickox p+ diff resistor
Tim Edwardsd7289eb2020-09-10 21:48:31 -040076# sky130_fd_pr__res_generic_l1 rli local interconnect resistor
77# sky130_fd_pr__res_generic_po npres n+ poly resistor
78# sky130_fd_pr__res_high_po_* ppres (*) p+ poly resistor (300 Ohms/sq)
79# sky130_fd_pr__res_xhigh_po_* xres (*) p+ poly resistor (2k Ohms/sq)
80# sky130_fd_pr__cap_var_lvt varactor low Vt varactor
81# sky130_fd_pr__cap_var_hvt varactorhvt high Vt varactor
82# sky130_fd_pr__cap_var mvvaractor thickox varactor
83# sky130_fd_pr__res_iso_pw rpw pwell resistor (in deep nwell)
Tim Edwards55f4d0e2020-07-05 15:41:02 -040084#
Tim Edwardsd7289eb2020-09-10 21:48:31 -040085# (*) Note that ppres may extract into some generic type called
86# "sky130_fd_pr__res_xhigh_po", but only specific sizes of xhrpoly are
87# allowed, and these are created from fixed layouts like the types below.
Tim Edwards55f4d0e2020-07-05 15:41:02 -040088#
89# (**) nFET and pFET in standard cells are the same as devices
90# outside of the standard cell except for the DRC rule for
91# FET to diffusion contact spacing (which is 0.05um, not 0.055um)
92#
Tim Edwards55f4d0e2020-07-05 15:41:02 -040093#-------------------------------------------------------------
94# The following devices are not extracted but are represented
95# only by script-generated subcells in the PDK.
96#-------------------------------------------------------------
Tim Edwardsd7289eb2020-09-10 21:48:31 -040097# sky130_fd_pr__esd_nfet_01v8 ESD nFET
98# sky130_fd_pr__esd_nfet_g5v0d10v5 ESD thickox nFET
99# sky130_fd_pr__esd_nfet_05v0_nvt ESD native nFET
100# sky130_fd_pr__esd_pfet_g5v0d10v5 ESD thickox pFET
101# sky130_fd_pr__special_nfet_pass_flash flash nFET device
102# sky130_fd_pr__esd_rf_diode_pw2nd_11v0 ESD n+ diode
103# sky130_fd_pr__esd_rf_diode_pd2nw_11v0 ESD p+ diode
104# sky130_fd_pr__cap_vpp_* Vpp cap
105# sky130_fd_pr__ind_* inductor
106# sky130_fd_pr__fuse_m4 metal fuse device
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400107#--------------------------------------------------------------
108
109#-----------------------------------------------------
110# Tile planes
111#-----------------------------------------------------
112
113planes
114 dwell,dw
115 well,w
116 active,a
117 locali,li1,li
118 metal1,m1
119 metal2,m2
120 metal3,m3
121#ifdef METAL5
122#ifdef MIM
123 cap1,c1
124#endif (MIM)
125 metal4,m4
126#ifdef MIM
127 cap2,c2
128#endif (MIM)
129 metal5,m5
130#endif (METAL5)
131#ifdef REDISTRIBUTION
132 metali,mi
133#endif
134 block,b
135 comment,c
136end
137
138#-----------------------------------------------------
139# Tile types
140#-----------------------------------------------------
141
142types
143# Deep nwell
144 dwell dnwell,dnw
145
146# Wells
147 well nwell,nw
Tim Edwards96c1e832020-09-16 11:42:16 -0400148 well pwell,pw
149 well rpw,rpwell
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400150 -well obswell
Tim Edwards96c1e832020-09-16 11:42:16 -0400151 well pbase,npn
Tim Edwards96c1e832020-09-16 11:42:16 -0400152 well nbase,pnp
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400153
154# Transistors
155 active nmos,ntransistor,nfet
156 -active scnmos,scntransistor,scnfet
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400157 -active npd,npdfet,sramnfet
158 -active npass,npassfet,srampassfet
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400159 active pmos,ptransistor,pfet
160 -active scpmos,scptransistor,scpfet
Tim Edwards363c7e02020-11-03 14:26:29 -0500161 -active scpmoshvt,scpfethvt
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400162 -active ppu,ppufet,srampfet
Tim Edwards96c1e832020-09-16 11:42:16 -0400163 active nnmos,nntransistor
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400164 active mvnmos,mvntransistor,mvnfet
165 active mvpmos,mvptransistor,mvpfet
Tim Edwards96c1e832020-09-16 11:42:16 -0400166 active mvnnmos,mvnntransistor,mvnnfet,nnfet
167 active varactor,varact,var
168 active mvvaractor,mvvaract,mvvar
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400169
Tim Edwards96c1e832020-09-16 11:42:16 -0400170 active pmoslvt,pfetlvt
171 active pmosmvt,pfetmvt
172 active pmoshvt,pfethvt
173 active nmoslvt,nfetlvt
174 active varactorhvt,varacthvt,varhvt
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400175 -active nsonos,sonos
176
177# Diffusions
178 active ndiff,ndiffusion,ndif
179 active pdiff,pdiffusion,pdif
Tim Edwards96c1e832020-09-16 11:42:16 -0400180 active mvndiff,mvndiffusion,mvndif
181 active mvpdiff,mvpdiffusion,mvpdif
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400182 active ndiffc,ndcontact,ndc
183 active pdiffc,pdcontact,pdc
Tim Edwards96c1e832020-09-16 11:42:16 -0400184 active mvndiffc,mvndcontact,mvndc
185 active mvpdiffc,mvpdcontact,mvpdc
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400186 active psubdiff,psubstratepdiff,ppdiff,ppd,psd
187 active nsubdiff,nsubstratendiff,nndiff,nnd,nsd
Tim Edwards96c1e832020-09-16 11:42:16 -0400188 active mvpsubdiff,mvpsubstratepdiff,mvppdiff,mvppd,mvpsd
189 active mvnsubdiff,mvnsubstratendiff,mvnndiff,mvnnd,mvnsd
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400190 active psubdiffcont,psubstratepcontact,psc
191 active nsubdiffcont,nsubstratencontact,nsc
Tim Edwards96c1e832020-09-16 11:42:16 -0400192 active mvpsubdiffcont,mvpsubstratepcontact,mvpsc
193 active mvnsubdiffcont,mvnsubstratencontact,mvnsc
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400194 -active obsactive
195 -active mvobsactive
196
197# Poly
198 active poly,p,polysilicon
199 active polycont,pc,pcontact,polycut,polyc
200 active xpolycontact,xpolyc,xpc
201
202# Resistors
Tim Edwards96c1e832020-09-16 11:42:16 -0400203 active npolyres,npres,mrp1
204 active ppolyres,ppres,xhrpoly
205 active xpolyres,xpres,xres,uhrpoly
206 active ndiffres,rnd,rdn,rndiff
207 active pdiffres,rpd,rdp,rpdiff
208 active mvndiffres,mvrnd,mvrdn,mvrndiff
209 active mvpdiffres,mvrpd,mvrdp,mvrpdiff
210 active rmp
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400211
212# Diodes
Tim Edwards96c1e832020-09-16 11:42:16 -0400213 active pdiode,pdi
214 active ndiode,ndi
215 active nndiode,nndi
216 active pdiodec,pdic
217 active ndiodec,ndic
218 active nndiodec,nndic
219 active mvpdiode,mvpdi
220 active mvndiode,mvndi
221 active mvpdiodec,mvpdic
222 active mvndiodec,mvndic
223 active pdiodelvt,pdilvt
224 active pdiodehvt,pdihvt
225 active ndiodelvt,ndilvt
226 active pdiodelvtc,pdilvtc
227 active pdiodehvtc,pdihvtc
228 active ndiodelvtc,ndilvtc
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400229
230# Local Interconnect
231 locali locali,li1,li
232 -locali corelocali,coreli1,coreli
Tim Edwards96c1e832020-09-16 11:42:16 -0400233 locali rlocali,rli1,rli
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400234 locali viali,vial,lic,licon,m1c,v0
235 -locali obsli1,obsli
236 -locali obsli1c,obslic,obslicon
237
238# Metal 1
239 metal1 metal1,m1,met1
Tim Edwards96c1e832020-09-16 11:42:16 -0400240 metal1 rmetal1,rm1,rmet1
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400241 metal1 via1,m2contact,m2cut,m2c,via,v,v1
242 -metal1 obsm1
Tim Edwards96c1e832020-09-16 11:42:16 -0400243 metal1 padl
Tim Edwardseba70cf2020-08-01 21:08:46 -0400244 -metal1 m1fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400245
246# Metal 2
247 metal2 metal2,m2,met2
Tim Edwards96c1e832020-09-16 11:42:16 -0400248 metal2 rmetal2,rm2,rmet2
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400249 metal2 via2,m3contact,m3cut,m3c,v2
250 -metal2 obsm2
Tim Edwardseba70cf2020-08-01 21:08:46 -0400251 -metal2 m2fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400252
253# Metal 3
254 metal3 metal3,m3,met3
Tim Edwards96c1e832020-09-16 11:42:16 -0400255 metal3 rmetal3,rm3,rmet3
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400256 -metal3 obsm3
257#ifdef METAL5
258 metal3 via3,v3
Tim Edwardseba70cf2020-08-01 21:08:46 -0400259 -metal3 m3fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400260
261#ifdef MIM
Tim Edwards96c1e832020-09-16 11:42:16 -0400262 cap1 mimcap,mim,capm
263 cap1 mimcapcontact,mimcapc,mimcc,capmc
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400264#endif
265
266# Metal 4
267 metal4 metal4,m4,met4
Tim Edwards96c1e832020-09-16 11:42:16 -0400268 metal4 rmetal4,rm4,rmet4
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400269 -metal4 obsm4
270 metal4 via4,v4
Tim Edwardseba70cf2020-08-01 21:08:46 -0400271 -metal4 m4fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400272
273#ifdef MIM
Tim Edwards96c1e832020-09-16 11:42:16 -0400274 cap2 mimcap2,mim2,capm2
275 cap2 mimcap2contact,mimcap2c,mim2cc,capm2c
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400276#endif
277
278# Metal 5
279 metal5 metal5,m5,met5
Tim Edwards96c1e832020-09-16 11:42:16 -0400280 metal5 rm5,rmetal5,rmet5
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400281 -metal5 obsm5
Tim Edwardseba70cf2020-08-01 21:08:46 -0400282 -metal5 m5fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400283#endif (METAL5)
284
285#ifdef REDISTRIBUTION
Tim Edwards96c1e832020-09-16 11:42:16 -0400286 metal5 mrdlcontact,mrdlc
287 metali metalrdl,mrdl,metrdl
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400288 -metali obsmrdl
289#endif (REDISTRIBUTION)
290
291# Miscellaneous
292 -block glass
293 -block fillblock
Tim Edwards96c1e832020-09-16 11:42:16 -0400294 comment comment
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400295 -comment obscomment
Tim Edwardsbf5ec172020-08-09 14:04:00 -0400296# fixed resistor width identifiers
297 -comment res0p35
298 -comment res0p69
299 -comment res1p41
300 -comment res2p85
301 -comment res5p73
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400302
303end
304
305#-----------------------------------------------------
306# Magic contact types
307#-----------------------------------------------------
308
309contact
310 pc poly locali
311 ndc ndiff locali
312 pdc pdiff locali
313 nsc nsd locali
314 psc psd locali
315 ndic ndiode locali
316 ndilvtc ndiodelvt locali
317 nndic nndiode locali
318 pdic pdiode locali
319 pdilvtc pdiodelvt locali
320 pdihvtc pdiodehvt locali
321 xpc xpc locali
322
323 mvndc mvndiff locali
324 mvpdc mvpdiff locali
325 mvnsc mvnsd locali
326 mvpsc mvpsd locali
327 mvndic mvndiode locali
328 mvpdic mvpdiode locali
329
330 lic locali metal1
Tim Edwards42f79a32020-09-21 14:18:09 -0400331 obslic obsli metal1
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400332
333 via1 metal1 metal2
334 via2 metal2 metal3
335#ifdef METAL5
336 via3 metal3 metal4
337 via4 metal4 metal5
338#endif (METAL5)
339 stackable
340
341#ifdef METAL5
342#ifdef MIM
343 # MiM cap contacts are not stackable!
344 mimcc mimcap metal4
345 mim2cc mimcap2 metal5
346#endif (MIM)
347
348 padl m1 m2 m3 m4 m5 glass
349#else
350 padl m1 m2 m3 glass
351#endif (!METAL5)
352
353#ifdef REDISTRIBUTION
354 mrdlc metal5 mrdl
355#endif (REDISTRIBUTION)
356end
357
358#-----------------------------------------------------
359# Layer aliases
360#-----------------------------------------------------
361
362aliases
363
364 allwellplane nwell
Tim Edwards862eeac2020-09-09 12:20:07 -0400365 allnwell nwell,obswell,pnp
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400366
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400367 allnfets nfet,npass,npd,scnfet,mvnfet,mvnnfet,nfetlvt,nsonos
Tim Edwards363c7e02020-11-03 14:26:29 -0500368 allpfets pfet,ppu,scpfet,scpfethvt,mvpfet,pfethvt,pfetlvt,pfetmvt
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400369 allfets allnfets,allpfets,varactor,mvvaractor,varhvt
Tim Edwardse6a454b2020-10-17 22:52:39 -0400370 allfetsstd nfet,mvnfet,mvnnfet,nfetlvt,pfet,mvpfet,pfethvt,pfetlvt,pfetmvt
Tim Edwards363c7e02020-11-03 14:26:29 -0500371 allfetsspecial npass,npd,scnfet,nsonos,ppu,scpfet,scpfethvt
372 allfetsnolvt nfet,npass,npd,scnfet,mvnfet,mvnnfet,nsonos,pfet,ppu,scpfet,scpfethvt,mvpfet,pfethvt,pfetmvt,varactor,mvvaractor,varhvt
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400373
374 allnactivenonfet *ndiff,*nsd,*ndiode,*nndiode,*mvndiff,*mvnsd,*mvndiode,*ndiodelvt
375 allnactive allnactivenonfet,allnfets
376 allnactivenontap *ndiff,*ndiode,*nndiode,*mvndiff,*mvndiode,*ndiodelvt,allnfets
377 allnactivetap *nsd,*mvnsd,var,varhvt,mvvar
378
379 allpactivenonfet *pdiff,*psd,*pdiode,*mvpdiff,*mvpsd,*mvpdiode,*pdiodelvt,*pdiodehvt
380 allpactive allpactivenonfet,allpfets
381 allpactivenontap *pdiff,*pdiode,*mvpdiff,*mvpdiode,*pdiodelvt,*pdiodehvt,allpfets
382 allpactivetap *psd,*mvpsd
383
384 allactivenonfet allnactivenonfet,allpactivenonfet
385 allactive allactivenonfet,allfets
386
387 allactiveres ndiffres,pdiffres,mvndiffres,mvpdiffres
388
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400389 allndifflv *ndif,*nsd,*ndiode,ndiffres,nfet,npass,npd,scnfet,nfetlvt,nsonos
Tim Edwards363c7e02020-11-03 14:26:29 -0500390 allpdifflv *pdif,*psd,*pdiode,pdiffres,pfet,ppu,scpfet,scpfethvt,pfetlvt,pfetmvt,pfethvt
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400391 alldifflv allndifflv,allpdifflv
392 allndifflvnonfet *ndif,*nsd,*ndiode,*nndiode,ndiffres,*ndiodelvt
393 allpdifflvnonfet *pdif,*psd,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt
394 alldifflvnonfet allndifflvnonfet,allpdifflvnonfet
395
396 allndiffmv *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnnfet
397 allpdiffmv *mvpdif,*mvpsd,*mvpdiode,mvpdiffres,mvpfet
398 alldiffmv allndiffmv,allpdiffmv
399 allndiffmvnontap *mvndif,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnnfet
400 allpdiffmvnontap *mvpdif,*mvpdiode,mvpdiffres,mvpfet
401 alldiffmvnontap allndiffmvnontap,allpdiffmvnontap
402 allndiffmvnonfet *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres
403 allpdiffmvnonfet *mvpdif,*mvpsd,*mvpdiode,mvpdiffres
404 alldiffmvnonfet allndiffmvnonfet,allpdiffmvnonfet
405
406 alldiffnonfet alldifflvnonfet,alldiffmvnonfet
407 alldiff alldifflv,alldiffmv
408
409 allpolyres mrp1,xhrpoly,uhrpoly,rmp
410 allpolynonfet *poly,allpolyres,xpc
411 allpolynonres *poly,allfets,xpc
412
413 allpoly allpolynonfet,allfets
414 allpolynoncap *poly,xpc,allfets,allpolyres
415
416 allndiffcontlv ndc,nsc,ndic,nndic,ndilvtc
417 allpdiffcontlv pdc,psc,pdic,pdilvtc,pdihvtc
418 allndiffcontmv mvndc,mvnsc,mvndic
419 allpdiffcontmv mvpdc,mvpsc,mvpdic
420 allndiffcont allndiffcontlv,allndiffcontmv
421 allpdiffcont allpdiffcontlv,allpdiffcontmv
422 alldiffcontlv allndiffcontlv,allpdiffcontlv
423 alldiffcontmv allndiffcontmv,allpdiffcontmv
424 alldiffcont alldiffcontlv,alldiffcontmv
425
426 allcont alldiffcont,pc
427
428 allres allpolyres,allactiveres
429
430 allli *locali,coreli,rli
431 allm1 *m1,rm1
432 allm2 *m2,rm2
433 allm3 *m3,rm3
434#ifdef METAL5
435 allm4 *m4,rm4
436 allm5 *m5,rm5
437#endif (METAL5)
438
439 allpad padl
440
441 psub pwell
442
443end
444
445#-----------------------------------------------------
446# Layer drawing styles
447#-----------------------------------------------------
448
449styles
450 styletype mos
451 dnwell cwell
452 nwell nwell
453 pwell pwell
454 rpwell pwell ptransistor_stripes
455 ndiff ndiffusion
456 pdiff pdiffusion
457 nsd ndiff_in_nwell
458 psd pdiff_in_pwell
459 nfet ntransistor ntransistor_stripes
460 scnfet ntransistor ntransistor_stripes
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400461 npass ntransistor ntransistor_stripes
462 npd ntransistor ntransistor_stripes
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400463 pfet ptransistor ptransistor_stripes
464 scpfet ptransistor ptransistor_stripes
Tim Edwards363c7e02020-11-03 14:26:29 -0500465 scpfethvt ptransistor ptransistor_stripes implant2
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400466 ppu ptransistor ptransistor_stripes
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400467 var polysilicon ndiff_in_nwell
468 ndc ndiffusion metal1 contact_X'es
469 pdc pdiffusion metal1 contact_X'es
470 nsc ndiff_in_nwell metal1 contact_X'es
471 psc pdiff_in_pwell metal1 contact_X'es
472
Tim Edwards862eeac2020-09-09 12:20:07 -0400473 pnp nwell ntransistor_stripes
474 npn pwell ptransistor_stripes
Tim Edwards862eeac2020-09-09 12:20:07 -0400475
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400476 pfetlvt ptransistor ptransistor_stripes implant1
Tim Edwards78cc9eb2020-08-14 16:49:57 -0400477 pfetmvt ptransistor ptransistor_stripes implant3
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400478 pfethvt ptransistor ptransistor_stripes implant2
479 nfetlvt ntransistor ntransistor_stripes implant1
480 nsonos ntransistor implant3
481 varhvt polysilicon ndiff_in_nwell implant2
482
483 mvndiff ndiffusion hvndiff_mask
484 mvpdiff pdiffusion hvpdiff_mask
485 mvnsd ndiff_in_nwell hvndiff_mask
486 mvpsd pdiff_in_pwell hvpdiff_mask
487 mvnfet ntransistor ntransistor_stripes hvndiff_mask
488 mvnnfet ntransistor ndiff_in_nwell hvndiff_mask
489 mvpfet ptransistor ptransistor_stripes
490 mvvar polysilicon ndiff_in_nwell hvndiff_mask
491 mvndc ndiffusion metal1 contact_X'es hvndiff_mask
492 mvpdc pdiffusion metal1 contact_X'es hvpdiff_mask
493 mvnsc ndiff_in_nwell metal1 contact_X'es hvndiff_mask
494 mvpsc pdiff_in_pwell metal1 contact_X'es hvpdiff_mask
495
496 poly polysilicon
497 pc polysilicon metal1 contact_X'es
498 npolyres polysilicon silicide_block nselect2
499 ppolyres polysilicon silicide_block pselect2
500 xpc polysilicon pselect2 metal1 contact_X'es
501 rmp polysilicon poly_resist_stripes
502
Tim Edwards7ac1f032020-08-12 17:40:36 -0400503 res0p35 implant1
504 res0p69 implant1
505 res1p41 implant1
506 res2p85 implant1
507 res5p73 implant1
508
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400509 pdiode pdiffusion pselect2
510 ndiode ndiffusion nselect2
511 pdiodec pdiffusion pselect2 metal1 contact_X'es
512 ndiodec ndiffusion nselect2 metal1 contact_X'es
513
514 nndiode ndiffusion nselect2 implant3
515 ndiodelvt ndiffusion nselect2 implant1
516 pdiodelvt pdiffusion pselect2 implant1
517 pdiodehvt pdiffusion pselect2 implant2
518 pdilvtc pdiffusion pselect2 implant1 metal1 contact_X'es
519 pdihvtc pdiffusion pselect2 implant2 metal1 contact_X'es
520 ndilvtc ndiffusion nselect2 implant1 metal1 contact_X'es
521
522 mvpdiode pdiffusion pselect2 hvpdiff_mask
523 mvndiode ndiffusion nselect2 hvndiff_mask
524 mvpdiodec pdiffusion pselect2 metal1 contact_X'es hvpdiff_mask
525 mvndiodec ndiffusion nselect2 metal1 contact_X'es hvndiff_mask
526 nndiodec ndiff_in_nwell nselect2 metal1 contact_X'es hvndiff_mask
527
528 locali metal1
529 coreli metal1
530 rli metal1 poly_resist_stripes
531 lic metal1 metal2 via1arrow
532 obsli metal1
533 obslic metal1 metal2 via1arrow
534
535 metal1 metal2
Tim Edwardseba70cf2020-08-01 21:08:46 -0400536 m1fill metal2
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400537 rm1 metal2 poly_resist_stripes
538 obsm1 metal2
539 m2c metal2 metal3 via2arrow
540 metal2 metal3
Tim Edwardseba70cf2020-08-01 21:08:46 -0400541 m2fill metal3
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400542 rm2 metal3 poly_resist_stripes
543 obsm2 metal3
544 m3c metal3 metal4 via3alt
545 metal3 metal4
Tim Edwardseba70cf2020-08-01 21:08:46 -0400546 m3fill metal4
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400547 rm3 metal4 poly_resist_stripes
548 obsm3 metal4
549#ifdef METAL5
550#ifdef MIM
551 mimcap metal3 mems
552 mimcc metal3 contact_X'es mems
553 mimcap2 metal4 mems
554 mim2cc metal4 contact_X'es mems
555#endif (MIM)
556 via3 metal4 metal5 via4
557 metal4 metal5
Tim Edwardseba70cf2020-08-01 21:08:46 -0400558 m4fill metal5
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400559 rm4 metal5 poly_resist_stripes
560 obsm4 metal5
561 via4 metal5 metal6 via5
562 metal5 metal6
Tim Edwardseba70cf2020-08-01 21:08:46 -0400563 m5fill metal6
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400564 rm5 metal6 poly_resist_stripes
565 obsm5 metal6
566#endif (METAL5)
567#ifdef REDISTRIBUTION
568 mrdlc metal6 metal7 via6
569 metalrdl metal7
570 obsmrdl metal7
571#endif (REDISTRIBUTION)
572
573 glass overglass
574 mrp1 poly_resist poly_resist_stripes
575 xhrpoly poly_resist silicide_block
576 uhrpoly poly_resist
577 ndiffres ndiffusion ndop_stripes
578 pdiffres pdiffusion pdop_stripes
579 mvndiffres ndiffusion hvndiff_mask ndop_stripes
580 mvpdiffres pdiffusion hvpdiff_mask pdop_stripes
581 comment comment
582 error_p error_waffle
583 error_s error_waffle
584 error_ps error_waffle
585 fillblock cwell
586
587 obswell cwell
588 obsactive implant4
589
590#ifndef METAL5
591 padl metal4 via4 overglass
592#else
593 padl metal6 via6 overglass
594#endif
595
596 magnet substrate_field_implant
597 rotate via3alt
598 fence via5
599end
600
601#-----------------------------------------------------
602# Special paint/erase rules
603#-----------------------------------------------------
604
605compose
606 compose nfet poly ndiff
607 compose pfet poly pdiff
608 compose var poly nsd
609
610 compose mvnfet poly mvndiff
611 compose mvpfet poly mvpdiff
612 compose mvvar poly mvnsd
Tim Edwards42f79a32020-09-21 14:18:09 -0400613
614 paint obslic locali via1
Tim Edwardsd44d18d2020-09-22 15:29:11 -0400615 paint obslic obsm1 obsli,obsm1
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400616
617 paint ndc nwell pdc
618 paint nfet nwell pfet
619 paint scnfet nwell scpfet
620 paint ndiff nwell pdiff
621 paint psd nwell nsd
622 paint psc nwell nsc
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400623 paint npd nwell ppu
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400624
625 paint pdc pwell ndc
626 paint pfet pwell nfet
627 paint scpfet pwell scnfet
628 paint pdiff pwell ndiff
629 paint nsd pwell psd
630 paint nsc pwell psc
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400631 paint ppu pwell npd
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400632
633 paint pdc coreli pdc
634 paint ndc coreli ndc
635 paint pc coreli pc
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400636 paint nsc coreli nsc
637 paint psc coreli psc
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400638 paint viali coreli viali
639
640 paint coreli pdc pdc
641 paint coreli ndc ndc
642 paint coreli pc pc
643 paint coreli nsc nsc
644 paint coreli psc psc
645 paint coreli viali viali
646
647#ifdef METAL5
648 paint m4 obsm4 m4
649 paint m5 obsm5 m5
650#endif (METAL5)
651end
652
653#-----------------------------------------------------
654# Electrical connectivity
655#-----------------------------------------------------
656
657connect
Tim Edwards862eeac2020-09-09 12:20:07 -0400658 *nwell,*nsd,*mvnsd,dnwell,pnp *nwell,*nsd,*mvnsd,dnwell,pnp
659 pwell,*psd,*mvpsd,npn pwell,*psd,*mvpsd,npn
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400660 *li,coreli *li,coreli
Tim Edwards48db3e12020-09-22 15:41:41 -0400661 *m1,m1fill,obslic *m1,m1fill,obslic
Tim Edwardseba70cf2020-08-01 21:08:46 -0400662 *m2,m2fill *m2,m2fill
663 *m3,m3fill *m3,m3fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400664#ifdef METAL5
Tim Edwardseba70cf2020-08-01 21:08:46 -0400665 *m4,m4fill *m4,m4fill
666 *m5,m5fill *m5,m5fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400667#ifdef MIM
668 *mimcap *mimcap
669 *mimcap2 *mimcap2
670#endif (MIM)
671#endif (METAL5)
672 allnactivenonfet allnactivenonfet
673 allpactivenonfet allpactivenonfet
674 *poly,xpc,allfets *poly,xpc,allfets
675#ifdef REDISTRIBUTION
676 # RDL connects to m5 (i.e., padl) through glass cut
677 *mrdl *mrdl
678 glass metrdl
679#endif (REDISTRIBUTION)
680end
681
682#-----------------------------------------------------
683# CIF/GDS output layer definitions
684#-----------------------------------------------------
685# NOTE: All values in this section MUST be multiples of 25
686# or else magic will scale below the allowed layout grid size
687
688cifoutput
689
690#----------------------------------------------------------------
691style gdsii
692# NOTE: This section is used for actual GDS output
693#----------------------------------------------------------------
694 scalefactor 10 nanometers
695 options calma-permissive-labels
696 gridlimit 5
697
698#----------------------------------------------------------------
699# Create a temp layer from the cell bounding box for use in
700# generating ID layers. Note that "boundary", unlike "bbox",
701# requires the FIXED_BBOX property (abutment box) in the cell.
702#----------------------------------------------------------------
703 templayer CELLBOUND
704 boundary
705
706#----------------------------------------------------------------
707# BOUND
708#----------------------------------------------------------------
709 layer BOUND CELLBOUND
710 calma 235 4
711
712# Create a boundary outside of an abutment box, so that layers
713# can be made to stretch to the abutment box edges. First strink
714# so that any box that would be so small as to interact with
715# itself will be removed.
716
717 templayer CELLRING CELLBOUND
718 shrink 345
719 grow 545
720 and-not CELLBOUND
721
722#----------------------------------------------------------------
723# DNWELL
724#----------------------------------------------------------------
725
Tim Edwards862eeac2020-09-09 12:20:07 -0400726 layer DNWELL dnwell,pnp
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400727 calma 64 18
728
729 layer PWRES rpw
730 and dnwell
731 calma 64 13
732
733#----------------------------------------------------------------
734# NWELL
735#----------------------------------------------------------------
736
737 layer NWELL allnwell
738 bloat-all rpw dnwell
739 and-not rpw,pwell
740 calma 64 20
741
742 layer WELLTXT
743 labels allnwell noport
744 calma 64 16
745
746 layer WELLPIN
747 labels allnwell port
748 calma 64 5
749
750#----------------------------------------------------------------
751# SUB (text/port only)
752#----------------------------------------------------------------
753
754 layer SUBTXT
755 labels pwell noport
756 calma 122 16
757
758 layer SUBPIN
759 labels pwell port
760 calma 64 59
761
762#----------------------------------------------------------------
763# DIFF
764#----------------------------------------------------------------
765
766 layer DIFF allnactivenontap,allpactivenontap,allactiveres
767 labels allnactivenontap,allpactivenontap
768 calma 65 20
769
770#----------------------------------------------------------------
771# TAP
772#----------------------------------------------------------------
773
774 layer TAP allnactivetap,allpactivetap
775 labels allnactivetap,allpactivetap
776 calma 65 44
777
778#----------------------------------------------------------------
779# PPLUS, NPLUS (PSDM, NSDM)
780#----------------------------------------------------------------
781
782 templayer basePPLUS pdiffres,mvpdiffres
783 grow 15
784 or xhrpoly,uhrpoly,xpc
785 grow 110
786 bloat-or allpactivetap * 125 allnactivenontap 0
787 bloat-or allpactivenontap * 125 allnactivetap 0
Tim Edwards95effb32020-10-17 14:56:41 -0400788
789 templayer baseNPLUS ndiffres,mvndiffres
790 grow 125
791 bloat-or allnactivetap * 125 allpactivenontap 0
792 bloat-or allnactivenontap * 125 allpactivetap 0
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400793
794 templayer extendPPLUS basePPLUS,CELLRING
Tim Edwards95effb32020-10-17 14:56:41 -0400795 bridge 380 380
796 and-not baseNPLUS
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400797 and-not CELLRING
798
799 layer PPLUS basePPLUS,extendPPLUS
800 close 265000
801 calma 94 20
802
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400803 templayer extendNPLUS baseNPLUS,CELLRING
Tim Edwards95effb32020-10-17 14:56:41 -0400804 bridge 380 380
805 and-not basePPLUS
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400806 and-not CELLRING
807
808 layer NPLUS baseNPLUS,extendNPLUS
809 close 265000
810 calma 93 44
811
812#----------------------------------------------------------------
813# LVTN
814#----------------------------------------------------------------
815
816 layer LVTN pfetlvt,nfetlvt,mvvar,mvnnfet,nsonos,*pdiodelvt,*ndiodelvt,*nndiode
817 grow 180
818 bridge 380 380
819 grow 185
820 shrink 185
821 close 265000
822 calma 125 44
823
824#----------------------------------------------------------------
Tim Edwards78cc9eb2020-08-14 16:49:57 -0400825# HVTR
826#----------------------------------------------------------------
827
828 layer HVTR pfetmvt
829 grow 180
830 bridge 380 380
831 grow 185
832 shrink 185
833 close 265000
834 calma 18 20
835
836#----------------------------------------------------------------
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400837# HVTP
838#----------------------------------------------------------------
839
Tim Edwards363c7e02020-11-03 14:26:29 -0500840 layer HVTP scpfethvt,pfethvt,varhvt,*pdiodehvt
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400841 grow 180
842 bridge 380 380
843 grow 185
844 shrink 185
845 close 265000
846 calma 78 44
847
848#----------------------------------------------------------------
849# SONOS
850#----------------------------------------------------------------
851
852 layer SONOS nsonos
853 grow 100
854 grow-min 410
855 bridge 500 410
856 grow 250
857 shrink 250
858 calma 80 20
859
860#----------------------------------------------------------------
861# SONOS requires COREID around area (areaid.ce). Also, the
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400862# coreli layer indicates a cell needing COREID. Also, devices
863# npd, npass, and ppu indicate a COREID cell.
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400864#----------------------------------------------------------------
865
866 layer COREID
Tim Edwards5ebe4cf2020-07-31 15:56:02 -0400867 bloat-all nsonos,coreli,ppu,npd,npass CELLBOUND
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400868 calma 81 2
869
870#----------------------------------------------------------------
871# STDCELL applies to all cells containing scnfet or scpfet.
872#----------------------------------------------------------------
873
874 layer STDCELL scnfet
Tim Edwards363c7e02020-11-03 14:26:29 -0500875 bloat-all scpfet,scpfethvt,scnfet CELLBOUND
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400876 calma 81 4
877
878#----------------------------------------------------------------
Tim Edwards862eeac2020-09-09 12:20:07 -0400879# NPNID and PNPID apply to bipolar transistors
880#----------------------------------------------------------------
881
882 layer NPNID
Tim Edwardsfcec6442020-10-26 11:09:27 -0400883 bloat-all npn dnwell
Tim Edwards862eeac2020-09-09 12:20:07 -0400884 calma 82 20
885
886 templayer pnparea pnp
887 grow 400
888
889 layer PNPID
890 bloat-all pnparea *psd
891 or pnparea
892 calma 82 44
893
894#----------------------------------------------------------------
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400895# RPM
896#----------------------------------------------------------------
897
898 layer RPM
899 bloat-all xhrpoly xpc
900 grow 200
901 grow-min 1270
902 grow 420
903 shrink 420
904 calma 86 20
905
906#----------------------------------------------------------------
907# URPM (2kOhms/sq. poly implant)
908#----------------------------------------------------------------
909
910 layer URPM
911 bloat-all uhrpoly xpc
912 grow 200
913 grow-min 1270
914 grow 420
915 shrink 420
916 calma 79 20
917
918#----------------------------------------------------------------
919# LDNTM (Tip implant for SONOS FETs)
920#----------------------------------------------------------------
921
922 layer LDNTM
923 bloat-all nsonos *ndiff
924 grow 185
925 grow 345
926 shrink 345
927 calma 11 44
928
929#----------------------------------------------------------------
930# HVNTM (Tip implant for MV ndiff devices)
931#----------------------------------------------------------------
932
933 templayer hvntm_block *mvpsd
934 grow 185
935
936 layer HVNTM
937 bloat-all mvnfet,mvnnfet,*mvndiode,mvrdn,*nndiode *mvndiff
938 bloat-all mvvaractor *mvnsd
939 and-not hvntm_block
940 grow 185
941 grow 345
942 shrink 345
Tim Edwardsfaac36a2020-11-06 20:37:24 -0500943 and-not hvntm_block
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400944 calma 125 20
945
946#----------------------------------------------------------------
947# POLY
948#----------------------------------------------------------------
949
950 layer POLY allpoly
951 calma 66 20
952
953 layer POLYTXT
954 labels allpoly noport
955 calma 66 16
956
957 layer POLYPIN
958 labels allpoly port
959 calma 66 5
960
961#----------------------------------------------------------------
962# THKOX (HVI) (includes rules NWELL 8-11 and DIFFTAP 14-26)
963#----------------------------------------------------------------
964
965 templayer baseTHKOX *mvpsd
966 grow-min 470
967 or alldiffmv,mvvar
968 grow 185
969 bloat-all alldiffmv nwell
Tim Edwardsfaac36a2020-11-06 20:37:24 -0500970 # (HVI min width rule is 0.6 but CNTM min width rule is 0.84um)
971 grow-min 840
972 # grow-min 600
Tim Edwards55f4d0e2020-07-05 15:41:02 -0400973 bridge 700 600
974
975 templayer extendTHKOX baseTHKOX,CELLRING
976 grow 345
977 shrink 345
978 and-not CELLRING
979
980 layer THKOX baseTHKOX,extendTHKOX
981 calma 75 20
982
983#----------------------------------------------------------------
984# CONT (LICON)
985#----------------------------------------------------------------
986
987 layer CONT allcont
988 squares-grid 0 170 170
989 calma 66 44
990
991 # Contact for pres is different than other LICON contacts
992 # See rules LICON 1b, 1c (width/length) and 2b (spacing)
993 templayer xpc_horiz xpc
994 shrink 1007
995 grow 1007
996
997 layer CONT xpc
998 and-not xpc_horiz
999 # Force long edge vertical for contacts narrower than 2um
1000 # Minimum space is 350 but 520 satisfies no. of contacts rule
1001 slots 80 190 520 80 2000 350
1002 calma 66 44
1003
1004 layer CONT xpc
1005 and xpc_horiz
1006 # Force long edge vertical for contacts wider than 2um
1007 # Minimum space is 350 but 520 satisfies no. of contacts rule
1008 slots 80 2000 350 80 190 520
1009 calma 66 44
1010
1011#----------------------------------------------------------------
1012# NPC (Nitride poly cut)
1013# surrounds CONT (LICON) on poly only (i.e., pc)
1014#----------------------------------------------------------------
1015
1016 layer NPC pc
1017 squares-grid 0 170 170
1018 grow 100
1019 bridge 270 270
1020 grow 130
1021 shrink 130
1022 calma 95 20
1023
1024 # NPC is also generated on xhrpoly and uhrpoly resistors
1025
1026 layer NPC xpc,xhrpoly,uhrpoly
1027 # xpc surrounds precision_resistor by 0.095um
1028 grow 95
1029 grow 130
1030 shrink 130
1031 calma 95 20
1032
1033#----------------------------------------------------------------
1034# Device markers
1035#----------------------------------------------------------------
1036
1037 layer DIFFRES rdn,mvrdn,rdp,mvrdp
1038 calma 65 13
1039
1040 layer POLYRES mrp1
1041 calma 66 13
1042
1043 # POLYSHORT is a poly layer resistor like rli, rm1, etc., for metal layers
1044 layer POLYSHORT rmp
1045 calma 66 15
1046
1047 # POLYRES extends to edge of contact cut
1048 layer POLYRES xhrpoly,uhrpoly
1049 grow 60
1050 and xpc
1051 or xhrpoly,uhrpoly
1052 calma 66 13
1053
1054 layer DIODE *pdi,*ndi,*nndi,*mvpdi,*mvndi,*pdilvt,*pdihvt,*ndilvt
1055 # To be done: Expand to include anode, cathode, and guard ring
1056 calma 81 23
1057
1058#----------------------------------------------------------------
1059# LI
1060#----------------------------------------------------------------
1061 layer LI allli
1062 calma 67 20
1063
1064 layer LITXT
1065 labels *locali,coreli noport
1066 calma 67 16
1067
1068 layer LIPIN
1069 labels *locali,coreli port
1070 calma 67 5
1071
1072 layer LIRES rli
1073 labels rli
1074 calma 67 13
1075
1076#----------------------------------------------------------------
1077# MCON
1078#----------------------------------------------------------------
1079 layer MCON lic
1080 squares-grid 0 170 190
1081 calma 67 44
1082
1083#----------------------------------------------------------------
1084# MET1
1085#----------------------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001086 layer MET1 allm1,m1fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001087 calma 68 20
1088
1089 layer MET1TXT
1090 labels allm1 noport
1091 calma 68 16
1092
1093 layer MET1PIN
1094 labels allm1 port
1095 calma 68 5
1096
1097 layer MET1RES rm1
1098 labels rm1
1099 calma 68 13
1100
1101#----------------------------------------------------------------
1102# VIA1
1103#----------------------------------------------------------------
1104 layer VIA1 via1
1105 squares-grid 55 150 170
1106 calma 68 44
1107
1108#----------------------------------------------------------------
1109# MET2
1110#----------------------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001111 layer MET2 allm2,m2fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001112 calma 69 20
1113
1114 layer MET2TXT
1115 labels allm2 noport
1116 calma 69 16
1117
1118 layer MET2PIN
1119 labels allm2 port
1120 calma 69 5
1121
1122 layer MET2RES rm2
1123 labels rm2
1124 calma 69 13
1125
1126#----------------------------------------------------------------
1127# VIA2
1128#----------------------------------------------------------------
1129 layer VIA2 via2
1130 squares-grid 40 200 200
1131 calma 69 44
1132
1133#----------------------------------------------------------------
1134# MET3
1135#----------------------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001136 layer MET3 allm3,m3fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001137 calma 70 20
1138
1139 layer MET3TXT
1140 labels allm3 noport
1141 calma 70 16
1142
1143 layer MET3PIN
1144 labels allm3 port
1145 calma 70 5
1146
1147 layer MET3RES rm3
1148 labels rm3
1149 calma 70 13
1150
1151#ifdef METAL5
1152#----------------------------------------------------------------
1153# VIA3
1154#----------------------------------------------------------------
1155 layer VIA3 via3
1156#ifdef MIM
1157 or mimcc
1158#endif (MIM)
1159 squares-grid 60 200 200
1160 calma 70 44
1161
1162#----------------------------------------------------------------
1163# MET4
1164#----------------------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001165 layer MET4 allm4,m4fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001166 calma 71 20
1167
1168 layer MET4TXT
1169 labels allm4 noport
1170 calma 71 16
1171
1172 layer MET4PIN
1173 labels allm4 port
1174 calma 71 5
1175
1176 layer MET4RES rm4
1177 labels rm4
1178 calma 71 13
1179
1180#----------------------------------------------------------------
1181# VIA4
1182#----------------------------------------------------------------
1183 layer VIA4 via4
1184#ifdef MIM
1185 or mim2cc
1186#endif (MIM)
1187 squares-grid 190 800 800
1188 calma 71 44
1189
1190#----------------------------------------------------------------
1191# MET5
1192#----------------------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001193 layer MET5 allm5,m5fill
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001194 calma 72 20
1195
1196 layer MET5TXT
1197 labels allm5 noport
1198 calma 72 16
1199
1200 layer MET5PIN
1201 labels allm5 port
1202 calma 72 5
1203
1204 layer MET5RES rm5
1205 labels rm5
1206 calma 72 13
1207
1208#endif (METAL5)
1209
1210#ifdef REDISTRIBUTION
1211#----------------------------------------------------------------
1212# RDL
1213#----------------------------------------------------------------
1214 layer RDL *metrdl
1215 calma 74 20
1216
1217 layer RDLTXT
1218 labels *metrdl noport
1219 calma 74 16
1220
1221 layer RDLPIN
1222 labels *metrdl port
1223 calma 74 5
1224
Tim Edwardsfa35ae22020-10-21 10:59:05 -04001225 layer PI1 *metrdl
1226 and padl,glass
1227 # Test only---needs GDS layer number
1228
1229 layer UBM *metrdl
1230 shrink 50000
1231 grow 40000
1232 # Test only---needs GDS layer number
1233
1234 layer PI2 *metrdl
1235 shrink 50000
1236 grow 25000
1237 # Test only---needs GDS layer number
1238
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001239#endif REDISTRIBUTION
1240
1241#----------------------------------------------------------------
1242# GLASS
1243#----------------------------------------------------------------
1244 layer GLASS glass
1245 calma 76 20
1246
1247#ifdef MIM
1248#----------------------------------------------------------------
1249# CAPM
1250#----------------------------------------------------------------
1251 layer CAPM *mimcap
1252 labels mimcap
1253 calma 89 44
1254
1255 layer CAPM2 *mimcap2
1256 labels mimcap2
1257 calma 97 44
1258#endif (MIM)
1259
1260#----------------------------------------------------------------
1261# Chip top level marker for DRC latchup rules to check 15um
1262# distance to taps (otherwise 6um is used)
1263#----------------------------------------------------------------
1264
1265 layer LOWTAPDENSITY
1266 bbox top
1267 # Clear 200um for pads + 50um for required high tap density
1268 # in critical area.
1269 shrink 250000
1270 calma 81 14
1271
1272#----------------------------------------------------------------
1273# FILLBLOCK
1274#----------------------------------------------------------------
1275 layer FILLOBSM1 fillblock
1276 calma 62 24
1277
1278 layer FILLOBSM2 fillblock
1279 calma 105 52
1280
1281 layer FILLOBSM3 fillblock
1282 calma 107 24
1283
1284 layer FILLOBSM4 fillblock
1285 calma 112 4
1286
1287 render DNWELL cwell -0.1 0.1
1288 render NWELL nwell 0.0 0.2062
1289 render DIFF ndiffusion 0.2062 0.12
1290 render TAP pdiffusion 0.2062 0.12
1291 render POLY polysilicon 0.3262 0.18
1292 render CONT via 0.5062 0.43
1293 render LI metal1 0.9361 0.10
1294 render MCON via 1.0361 0.34
1295 render MET1 metal2 1.3761 0.36
1296 render VIA1 via 1.7361 0.27
1297 render MET2 metal3 2.0061 0.36
1298 render VIA2 via 2.3661 0.42
1299 render MET3 metal4 2.7861 0.845
1300#ifdef METAL5
1301 render VIA3 via 3.6311 0.39
1302 render MET4 metal5 4.0211 0.845
1303 render VIA4 via 4.8661 0.505
1304 render MET5 metal6 5.3711 1.26
1305 render CAPM metal8 2.4661 0.2
1306 render CAPM2 metal9 3.7311 0.2
1307#ifdef REDISTRIBUTION
1308 render RDL metal7 11.8834 4.0
1309#endif (!REDISTRIBUTION)
1310#endif (!METAL5)
1311
1312#----------------------------------------------------------------
1313style drc
1314#----------------------------------------------------------------
1315# NOTE: This style is used for DRC only, not for GDS output
1316#----------------------------------------------------------------
1317 scalefactor 10 nanometers
1318 options calma-permissive-labels
1319
1320 # Ensure nwell overlaps dnwell at least 0.4um outside and 1.03um inside
1321 templayer dnwell_shrink dnwell
1322 shrink 1030
1323
1324 templayer nwell_missing dnwell
1325 grow 400
1326 and-not dnwell_shrink
1327 and-not nwell
1328
Tim Edwards5b50e7a2020-10-17 17:31:49 -04001329 templayer pwell_in_dnwell dnwell
1330 and-not nwell
1331
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001332 # SONOS nFET devices must be in deep nwell
1333 templayer dnwell_missing nsonos
1334 and-not dnwell
1335
Tim Edwardse6a454b2020-10-17 22:52:39 -04001336 # SONOS nFET devices must be in cell with abutment box
1337 templayer abutment_box
1338 boundary
1339
1340 templayer bbox_missing nsonos
1341 and-not abutment_box
1342
1343 # Make sure nwell covers varactor poly
1344 templayer var_poly_no_nwell
Tim Edwards859ff4b2020-10-18 14:59:38 -04001345 bloat-all varactor,mvvaractor *poly
Tim Edwardse6a454b2020-10-17 22:52:39 -04001346 grow 150
1347 and-not nwell
1348
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001349 # Define MiM cap bottom plate for spacing rule
1350 templayer mim_bottom
1351 bloat-all *mimcap *metal3
1352
1353 # Define MiM2 cap bottom plate for spacing rule
1354 templayer mim2_bottom
1355 bloat-all *mimcap2 *metal4
1356
1357 # Note that metal fill is performed by the foundry and so is not
1358 # an option for a cifoutput style.
1359
1360 # Check latchup rule (15um minimum from tap LICON center to any
1361 # non-tap diffusion. Note that to count as a tap, the diffusion
1362 # must be contacted to LI
1363
1364 templayer ptap_reach psc,mvpsc
1365 and-not dnwell
1366 # grow total is 15um. grow in 0.84um increments to ensure that
1367 # no nwell ring is crossed
1368 grow 840
1369 and-not nwell,dnwell
1370 grow 840
1371 and-not nwell,dnwell
1372 grow 840
1373 and-not nwell,dnwell
1374 grow 840
1375 and-not nwell,dnwell
1376 grow 840
1377 and-not nwell,dnwell
1378 grow 840
1379 and-not nwell,dnwell
1380 grow 840
1381 and-not nwell,dnwell
1382 grow 840
1383 and-not nwell,dnwell
1384 grow 840
1385 and-not nwell,dnwell
1386 grow 840
1387 and-not nwell,dnwell
1388 grow 840
1389 and-not nwell,dnwell
1390 grow 840
1391 and-not nwell,dnwell
1392 grow 840
1393 and-not nwell,dnwell
1394 grow 840
1395 and-not nwell,dnwell
1396 grow 840
1397 and-not nwell,dnwell
1398 grow 840
1399 and-not nwell,dnwell
1400 grow 840
1401 and-not nwell,dnwell
1402 grow 635
1403 and-not nwell,dnwell
1404
1405 templayer ptap_missing *ndiff,*mvndiff
1406 and-not dnwell
1407 and-not ptap_reach
1408
1409 templayer ntap_reach nsc,mvnsc
1410 # grow total is 15um. grow in 1.27um increments to ensure that
1411 # no nwell ring is crossed. There is no difference between
1412 # ntaps in and out of deep nwell.
1413 grow 1270
1414 and nwell
1415 grow 1270
1416 and nwell
1417 grow 1270
1418 and nwell
1419 grow 1270
1420 and nwell
1421 grow 1270
1422 and nwell
1423 grow 1270
1424 and nwell
1425 grow 1270
1426 and nwell
1427 grow 1270
1428 and nwell
1429 grow 1270
1430 and nwell
1431 grow 1270
1432 and nwell
1433 grow 1270
1434 and nwell
1435 grow 945
1436 and nwell
1437
1438 templayer ntap_missing *pdiff,*mvpdiff
Tim Edwards5b50e7a2020-10-17 17:31:49 -04001439 and-not pwell_in_dnwell
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001440 and-not ntap_reach
1441
1442 templayer dptap_reach psc,mvpsc
1443 and dnwell
1444 grow 840
1445 and-not nwell
1446 and dnwell
1447 grow 840
1448 and-not nwell
1449 and dnwell
1450 grow 840
1451 and-not nwell
1452 and dnwell
1453 grow 840
1454 and-not nwell
1455 and dnwell
1456 grow 840
1457 and-not nwell
1458 and dnwell
1459 grow 840
1460 and-not nwell
1461 and dnwell
1462 grow 840
1463 and-not nwell
1464 and dnwell
1465 grow 840
1466 and-not nwell
1467 and dnwell
1468 grow 840
1469 and-not nwell
1470 and dnwell
1471 grow 840
1472 and-not nwell
1473 and dnwell
1474 grow 840
1475 and-not nwell
1476 and dnwell
1477 grow 840
1478 and-not nwell
1479 and dnwell
1480 grow 840
1481 and-not nwell
1482 and dnwell
1483 grow 840
1484 and-not nwell
1485 and dnwell
1486 grow 840
1487 and-not nwell
1488 and dnwell
1489 grow 840
1490 and-not nwell
1491 and dnwell
1492 grow 840
1493 and-not nwell
1494 and dnwell
1495 grow 635
1496 and-not nwell
1497 and dnwell
1498
1499 templayer dptap_missing *ndiff,*mvndiff
1500 and dnwell
1501 and-not dptap_reach
1502
Tim Edwards5b50e7a2020-10-17 17:31:49 -04001503 templayer pdiff_crosses_dnwell dnwell
1504 grow 20
1505 and-not dnwell
1506 and allpdifflv,allpdiffmv
1507
Tim Edwardse6a454b2020-10-17 22:52:39 -04001508 templayer nwell_with_tap
1509 bloat-all nsc,mvnsc nwell
1510
1511 templayer nwell_missing_tap nwell
1512 and-not nwell_with_tap
1513
1514 # Make sure varactor nwell contains no P diffusion
1515 templayer pdiff_in_varactor_well
1516 bloat-all varactor,mvvaractor nwell
1517 and allpactive
1518
Tim Edwards28cea2f2020-09-17 22:09:30 -04001519 templayer m1_small_hole allm1,obsm1,obslic
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001520 close 140000
1521
1522 templayer m1_hole_empty m1_small_hole
Tim Edwards28cea2f2020-09-17 22:09:30 -04001523 and-not allm1,obsm1,obslic
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001524
Tim Edwards28cea2f2020-09-17 22:09:30 -04001525 templayer m2_small_hole allm2,obsm2
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001526 close 140000
1527
1528 templayer m2_hole_empty m2_small_hole
Tim Edwards28cea2f2020-09-17 22:09:30 -04001529 and-not allm2,obsm2
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001530
Tim Edwardse6a454b2020-10-17 22:52:39 -04001531 templayer m1_huge allm1
1532 shrink 1500
1533 grow 1500
1534
1535 templayer m1_large_halo m1_huge
1536 grow 280
1537 and-not m1_huge
1538 and allm1
1539
1540 templayer m2_huge allm2
1541 shrink 1500
1542 grow 1500
1543
1544 templayer m2_large_halo m2_huge
1545 grow 280
1546 and-not m2_huge
1547 and allm2
1548
1549 templayer m3_huge allm3
1550 shrink 1500
1551 grow 1500
1552
1553 templayer m3_large_halo m3_huge
1554 grow 400
1555 and-not m3_huge
1556 and allm3
1557
1558 templayer m4_huge allm4
1559 shrink 1500
1560 grow 1500
1561
1562 templayer m4_large_halo m4_huge
1563 grow 400
1564 and-not m4_huge
1565 and allm4
1566
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001567#ifdef EXPERIMENTAL
1568#----------------------------------------------------------------
1569style paint
1570#----------------------------------------------------------------
1571# NOTE: This style is used for database manipulations only via
1572# the "cif paint" command.
1573#----------------------------------------------------------------
1574
1575 scalefactor 10 nanometers
1576
1577 templayer m1grow *m1
1578 grow 290
1579
1580 # layer listrap: Use the following set of commands to strap local
1581 # interconnect wires with metal1 (inside the cursor box) to satisfy
1582 # the maximum aspect ratio rule for local interconnect:
1583 #
1584 # tech unlock *
1585 # cif ostyle paint
1586 # cif paint m1strap comment
1587 # cif paint m1strap m1
1588 # cif paint listrap licon
1589 # erase comment
1590
1591 templayer m1strap *li
1592 and-not m1grow
1593 grow 30
1594
1595 templayer listrap comment
1596 slots 30 170 170 60
1597
1598#endif (EXPERIMENTAL)
1599
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04001600#----------------------------------------------------------------
1601style wafflefill
1602#----------------------------------------------------------------
1603# Style used by scripts for automatically generating fill layers
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04001604#----------------------------------------------------------------
1605 scalefactor 10 nanometers
1606 options calma-permissive-labels
1607 gridlimit 5
1608
Tim Edwards7ac1f032020-08-12 17:40:36 -04001609#----------------------------------------------------------------
1610# Generate guard-band around nwells to keep FOM from crossing
1611# Spacing from nwell = Diff/Tap 9 = 0.34um
1612# Enclosure by nwell = Diff/Tap 8 = 0.18um
1613#----------------------------------------------------------------
1614 templayer well_shrink nwell
1615 shrink 180
1616 templayer well_guardband nwell
1617 grow 340
1618 and-not well_shrink
1619
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04001620#---------------------------------------------------
Tim Edwards7ac1f032020-08-12 17:40:36 -04001621# Interleaved FOM and POLY fill
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04001622#---------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001623 templayer slots_fom_pass1
1624 bbox top
1625 slots 0 4080 1320 0 4080 1320 1360 0
1626 templayer obstruct_fom_pass1 alldiff,allpoly,rpw
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04001627 grow 500
Tim Edwards7ac1f032020-08-12 17:40:36 -04001628 or well_guardband
Tim Edwardseba70cf2020-08-01 21:08:46 -04001629 templayer fomfill_pass1 slots_fom_pass1
1630 and-not obstruct_fom_pass1
1631 shrink 2035
1632 grow 2035
1633
Tim Edwards7ac1f032020-08-12 17:40:36 -04001634#---------------------------------------------------
1635
1636 templayer slots_poly_pass1
1637 bbox top
1638 slots 0 720 360 0 720 360 240 0
1639 templayer obstruct_poly_pass1 alldiff,allpoly,rpw
1640 grow 700
1641 or fomfill_pass1
1642 grow 300
1643 or well_guardband
1644 templayer polyfill_pass1 slots_poly_pass1
1645 and-not obstruct_poly_pass1
1646 shrink 355
1647 grow 355
1648
1649#---------------------------------------------------
1650
Tim Edwardseba70cf2020-08-01 21:08:46 -04001651 templayer slots_fom_pass2
1652 bbox top
1653 slots 0 2500 1320 0 2500 1320 1360 0
1654 templayer obstruct_fom_pass2 fomfill_pass1
1655 grow 820
Tim Edwards7ac1f032020-08-12 17:40:36 -04001656 grow 200
1657 or polyfill_pass1
1658 grow 300
1659 or obstruct_fom_pass1
Tim Edwardseba70cf2020-08-01 21:08:46 -04001660 templayer fomfill_pass2 slots_fom_pass2
1661 and-not obstruct_fom_pass2
1662 shrink 1245
1663 grow 1245
1664
Tim Edwardseba70cf2020-08-01 21:08:46 -04001665#---------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001666
1667 templayer slots_poly_coarse
1668 bbox top
1669 slots 0 720 360 0 720 360 240 120
Tim Edwards7ac1f032020-08-12 17:40:36 -04001670 templayer obstruct_poly_coarse polyfill_pass1
1671 grow 60
1672 or fomfill_pass1,fomfill_pass2
1673 grow 300
1674 or obstruct_poly_pass1
Tim Edwardseba70cf2020-08-01 21:08:46 -04001675 templayer polyfill_coarse slots_poly_coarse
1676 and-not obstruct_poly_coarse
1677 shrink 355
1678 grow 355
1679
Tim Edwards7ac1f032020-08-12 17:40:36 -04001680#---------------------------------------------------
1681
1682 templayer slots_fom_coarse
1683 bbox top
1684 slots 0 1500 1320 0 1500 1320 1360 0
1685 templayer obstruct_fom_coarse fomfill_pass1,fomfill_pass2
1686 grow 1020
1687 or polyfill_pass1,polyfill_coarse
1688 grow 300
1689 or obstruct_fom_pass1
1690 templayer fomfill_coarse slots_fom_coarse
1691 and-not obstruct_fom_coarse
1692 shrink 745
1693 grow 745
1694
1695#---------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001696 templayer slots_poly_medium
1697 bbox top
1698 slots 0 540 360 0 540 360 240 100
Tim Edwards7ac1f032020-08-12 17:40:36 -04001699 templayer obstruct_poly_medium polyfill_pass1,polyfill_coarse
1700 grow 1010
1701 or obstruct_poly_pass1
Tim Edwardseba70cf2020-08-01 21:08:46 -04001702 templayer polyfill_medium slots_poly_medium
1703 and-not obstruct_poly_medium
1704 shrink 265
1705 grow 265
1706
Tim Edwards7ac1f032020-08-12 17:40:36 -04001707#---------------------------------------------------
1708
1709 templayer slots_fom_fine
1710 bbox top
1711 slots 0 500 400 0 500 400 160 0
1712 templayer obstruct_fom_fine fomfill_pass1,fomfill_pass2,fomfill_coarse
1713 grow 1320
1714 or obstruct_fom_pass1
1715 templayer fomfill_fine slots_fom_fine
1716 and-not obstruct_fom_fine
1717 shrink 245
1718 grow 245
1719
1720#---------------------------------------------------
Tim Edwardseba70cf2020-08-01 21:08:46 -04001721 templayer slots_poly_fine
1722 bbox top
1723 slots 0 480 360 0 480 360 240 200
Tim Edwards7ac1f032020-08-12 17:40:36 -04001724 templayer obstruct_poly_fine polyfill_pass1,polyfill_coarse,polyfill_medium
Tim Edwardseba70cf2020-08-01 21:08:46 -04001725 grow 650
1726 or polyfill_pass1,polyfill_coarse,polyfill_medium
1727 grow 360
Tim Edwards7ac1f032020-08-12 17:40:36 -04001728 or obstruct_poly_pass1
Tim Edwardseba70cf2020-08-01 21:08:46 -04001729 templayer polyfill_fine slots_poly_fine
1730 and-not obstruct_poly_fine
1731 shrink 235
1732 grow 235
1733
Tim Edwards7ac1f032020-08-12 17:40:36 -04001734#---------------------------------------------------
1735 templayer fomfill fomfill_pass1
1736 or fomfill_pass2
1737 or fomfill_coarse
1738 or fomfill_fine
Tim Edwards7ac1f032020-08-12 17:40:36 -04001739
1740 templayer polyfill polyfill_pass1
Tim Edwardseba70cf2020-08-01 21:08:46 -04001741 or polyfill_coarse
1742 or polyfill_medium
1743 or polyfill_fine
Tim Edwardseba70cf2020-08-01 21:08:46 -04001744
Tim Edwards7ac1f032020-08-12 17:40:36 -04001745 layer FOMMASK fomfill
Tim Edwards475b5272020-08-25 14:05:50 -04001746 calma 23 0
Tim Edwards7ac1f032020-08-12 17:40:36 -04001747 layer POLYMASK polyfill
Tim Edwards475b5272020-08-25 14:05:50 -04001748 calma 28 0
Tim Edwards7ac1f032020-08-12 17:40:36 -04001749
Tim Edwardseba70cf2020-08-01 21:08:46 -04001750#---------------------------------------------------
1751# MET1 fill
1752#---------------------------------------------------
1753 templayer slots_m1_coarse
1754 bbox top
1755 slots 0 2000 200 0 2000 200 700 0
1756 templayer obstruct_m1_coarse allm1,allpad,obsm1,m1fill,fillblock
1757 grow 3000
1758 templayer met1fill_coarse slots_m1_coarse
1759 and-not obstruct_m1_coarse
1760 shrink 995
1761 grow 995
1762
1763 templayer slots_m1_medium
1764 bbox top
1765 slots 0 1000 200 0 1000 200 700 0
1766 templayer obstruct_m1_medium allm1,allpad,obsm1,m1fill,fillblock
1767 grow 2800
1768 or met1fill_coarse
1769 grow 200
1770 templayer met1fill_medium slots_m1_medium
1771 and-not obstruct_m1_medium
1772 shrink 495
1773 grow 495
1774
1775 templayer slots_m1_fine
1776 bbox top
1777 slots 0 580 200 0 580 200 700 0
1778 templayer obstruct_m1_fine allm1,allpad,obsm1,m1fill,fillblock
1779 grow 300
1780 or met1fill_coarse,met1fill_medium
1781 grow 200
1782 templayer met1fill_fine slots_m1_fine
1783 and-not obstruct_m1_fine
1784 shrink 285
1785 grow 285
1786
1787 templayer slots_m1_veryfine
1788 bbox top
1789 slots 0 300 200 0 300 200 100 50
1790 templayer obstruct_m1_veryfine allm1,allpad,obsm1,m1fill,fillblock
1791 grow 100
1792 or met1fill_coarse,met1fill_medium,met1fill_fine
1793 grow 200
1794 templayer met1fill_veryfine slots_m1_veryfine
1795 and-not obstruct_m1_veryfine
1796 shrink 145
1797 grow 145
1798
1799 layer MET1MASK met1fill_coarse
1800 or met1fill_medium
1801 or met1fill_fine
1802 or met1fill_veryfine
1803 calma 36 0
1804
1805#---------------------------------------------------
1806# MET2 fill
1807#---------------------------------------------------
1808 templayer slots_m2_coarse
1809 bbox top
1810 slots 0 2000 200 0 2000 200 700 350
1811 templayer obstruct_m2 allm2,allpad,obsm2,m2fill,fillblock
1812 grow 3000
1813 templayer met2fill_coarse slots_m2_coarse
1814 and-not obstruct_m2
1815 shrink 995
1816 grow 995
1817
1818 templayer slots_m2_medium
1819 bbox top
1820 slots 0 1000 200 0 1000 200 700 350
1821 templayer obstruct_m2_medium allm2,allpad,obsm2,m2fill,fillblock
1822 grow 2800
1823 or met2fill_coarse
1824 grow 200
1825 templayer met2fill_medium slots_m2_medium
1826 and-not obstruct_m2_medium
1827 shrink 495
1828 grow 495
1829
1830 templayer slots_m2_fine
1831 bbox top
1832 slots 0 580 200 0 580 200 700 350
1833 templayer obstruct_m2_fine allm2,allpad,obsm2,m2fill,fillblock
1834 grow 300
1835 or met2fill_coarse,met2fill_medium
1836 grow 200
1837 templayer met2fill_fine slots_m2_fine
1838 and-not obstruct_m2_fine
1839 shrink 285
1840 grow 285
1841
1842 templayer slots_m2_veryfine
1843 bbox top
1844 slots 0 300 200 0 300 200 100 100
1845 templayer obstruct_m2_veryfine allm2,allpad,obsm2,m2fill,fillblock
1846 grow 100
1847 or met2fill_coarse,met2fill_medium,met2fill_fine
1848 grow 200
1849 templayer met2fill_veryfine slots_m2_veryfine
1850 and-not obstruct_m2_veryfine
1851 shrink 145
1852 grow 145
1853
1854 layer MET2MASK met2fill_coarse
1855 or met2fill_medium
1856 or met2fill_fine
1857 or met2fill_veryfine
1858 calma 41 0
1859
1860#---------------------------------------------------
1861# MET3 fill
1862#---------------------------------------------------
1863 templayer slots_m3_coarse
1864 bbox top
1865 slots 0 2000 300 0 2000 300 700 700
1866 templayer obstruct_m3 allm3,allpad,obsm3,m3fill,fillblock
1867 grow 3000
1868 templayer met3fill_coarse slots_m3_coarse
1869 and-not obstruct_m3
1870 shrink 995
1871 grow 995
1872
1873 templayer slots_m3_medium
1874 bbox top
1875 slots 0 1000 300 0 1000 300 700 700
1876 templayer obstruct_m3_medium allm3,allpad,obsm3,m3fill,fillblock
1877 grow 2700
1878 or met3fill_coarse
1879 grow 300
1880 templayer met3fill_medium slots_m3_medium
1881 and-not obstruct_m3_medium
1882 shrink 495
1883 grow 495
1884
1885 templayer slots_m3_fine
1886 bbox top
1887 slots 0 580 300 0 580 300 700 700
1888 templayer obstruct_m3_fine allm3,allpad,obsm3,m3fill,fillblock
1889 grow 200
1890 or met3fill_coarse,met3fill_medium
1891 grow 300
1892 templayer met3fill_fine slots_m3_fine
1893 and-not obstruct_m3_fine
1894 shrink 285
1895 grow 285
1896
1897 templayer slots_m3_veryfine
1898 bbox top
1899 slots 0 400 300 0 400 300 150 200
1900 templayer obstruct_m3_veryfine allm3,allpad,obsm3,m3fill,fillblock
1901 or met3fill_coarse,met3fill_medium,met3fill_fine
1902 grow 300
1903 templayer met3fill_veryfine slots_m3_veryfine
1904 and-not obstruct_m3_veryfine
1905 shrink 195
1906 grow 195
1907
1908 layer MET3MASK met3fill_coarse
1909 or met3fill_medium
1910 or met3fill_fine
1911 or met3fill_veryfine
1912 calma 34 0
1913
1914#ifdef METAL5
1915#---------------------------------------------------
1916# MET4 fill
1917#---------------------------------------------------
1918 templayer slots_m4_coarse
1919 bbox top
1920 slots 0 2000 300 0 2000 300 700 1050
1921 templayer obstruct_m4 allm4,allpad,obsm4,m4fill,fillblock
1922 grow 3000
1923 templayer met4fill_coarse slots_m4_coarse
1924 and-not obstruct_m4
1925 shrink 995
1926 grow 995
1927
1928 templayer slots_m4_medium
1929 bbox top
1930 slots 0 1000 300 0 1000 300 700 1050
1931 templayer obstruct_m4_medium allm4,allpad,obsm4,m4fill,fillblock
1932 grow 2700
1933 or met4fill_coarse
1934 grow 300
1935 templayer met4fill_medium slots_m4_medium
1936 and-not obstruct_m4_medium
1937 shrink 495
1938 grow 495
1939
1940 templayer slots_m4_fine
1941 bbox top
1942 slots 0 580 300 0 580 300 700 1050
1943 templayer obstruct_m4_fine allm4,allpad,obsm4,m4fill,fillblock
1944 grow 200
1945 or met4fill_coarse,met4fill_medium
1946 grow 300
1947 templayer met4fill_fine slots_m4_fine
1948 and-not obstruct_m4_fine
1949 shrink 285
1950 grow 285
1951
1952 templayer slots_m4_veryfine
1953 bbox top
1954 slots 0 400 300 0 400 300 150 300
1955 templayer obstruct_m4_veryfine allm4,allpad,obsm4,m4fill,fillblock
1956 or met4fill_coarse,met4fill_medium,met4fill_fine
1957 grow 300
1958 templayer met4fill_veryfine slots_m4_veryfine
1959 and-not obstruct_m4_veryfine
1960 shrink 195
1961 grow 195
1962
1963 layer MET4MASK met4fill_coarse
1964 or met4fill_medium
1965 or met4fill_fine
1966 or met4fill_veryfine
1967 calma 51 0
1968
1969#---------------------------------------------------
1970# MET5 fill
1971#---------------------------------------------------
1972 templayer slots_m5
1973 bbox top
1974 slots 0 3000 1600 0 3000 1600 1000 100
1975 templayer obstruct_m5 allm5,allpad,obsm5,m5fill,fillblock
1976 grow 3000
1977 templayer met5fill_gen slots_m5
1978 and-not obstruct_m5
1979 shrink 1495
1980 grow 1495
1981
1982 layer MET5MASK met5fill_gen
1983 calma 59 0
1984#endif (METAL5)
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04001985
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001986end
1987
1988#-----------------------------------------------------------------------
1989cifinput
1990#-----------------------------------------------------------------------
1991# NOTE: All values in this section MUST be multiples of 25
1992# or else magic will scale below the allowed layout grid size
1993#-----------------------------------------------------------------------
1994
Tim Edwards88baa8e2020-08-30 17:03:58 -04001995style sky130
Tim Edwards55f4d0e2020-07-05 15:41:02 -04001996 scalefactor 10 nanometers
1997 gridlimit 5
1998
1999 options ignore-unknown-layer-labels no-reconnect-labels
2000
2001#ifndef MIM
2002 ignore CAPM
2003 ignore CAPM2
2004#endif (!MIM)
2005#ifndef METAL5
2006 ignore MET4,VIA3
2007 ignore MET5,VIA4
2008#endif
2009 ignore NPC
2010 ignore SEALID
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002011 ignore CAPID
2012 ignore LDNTM
2013 ignore HVNTM
2014 ignore POLYMOD
2015 ignore LOWTAPDENSITY
2016
Tim Edwardsfaac36a2020-11-06 20:37:24 -05002017 layer pnp NWELL,WELLTXT,WELLPIN
2018 and PNPID
Tim Edwards862eeac2020-09-09 12:20:07 -04002019 labels NWELL
2020 labels WELLTXT text
2021 labels WELLPIN port
2022
Tim Edwardsfaac36a2020-11-06 20:37:24 -05002023 layer nwell NWELL,WELLTXT,WELLPIN
2024 and-not PNPID
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002025 labels NWELL
2026 labels WELLTXT text
2027 labels WELLPIN port
2028
2029 layer pwell SUBTXT,SUBPIN
2030 labels SUBTXT text
2031 labels SUBPIN port
2032
Tim Edwardsbb30e322020-10-07 16:51:21 -04002033 # Always draw pwell under p-tap
2034 layer pwell TAP
2035 and-not NWELL
2036
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002037 layer dnwell DNWELL
2038 labels DNWELL
2039
Tim Edwards862eeac2020-09-09 12:20:07 -04002040 layer npn DNWELL
2041 and-not NWELL
2042 and NPNID
2043
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002044 layer rpw PWRES
2045 and DNWELL
2046 labels PWRES
2047
2048 templayer ndiffarea DIFF,DIFFTXT,DIFFPIN
2049 and-not POLY
2050 and-not NWELL
2051 and-not PPLUS
2052 and-not DIODE
2053 and-not DIFFRES
2054 and-not THKOX
2055 and NPLUS
2056 copyup ndifcheck
2057 labels DIFF
2058 labels DIFFTXT text
2059 labels DIFFPIN port
2060 labels TAPPIN port
2061
2062 layer ndiff ndiffarea
2063
2064 # Copy ndiff areas up for contact checks
2065 templayer xndifcheck ndifcheck
2066 copyup ndifcheck
2067
2068 templayer mvndiffarea DIFF,DIFFTXT,DIFFPIN
2069 and-not POLY
2070 and-not NWELL
2071 and-not PPLUS
2072 and-not DIODE
2073 and-not DIFFRES
2074 and THKOX
2075 and NPLUS
2076 copyup ndifcheck
2077 labels DIFF
2078 labels DIFFTXT text
2079 labels DIFFPIN port
2080
2081 layer mvndiff mvndiffarea
2082
2083 # Copy ndiff areas up for contact checks
2084 templayer mvxndifcheck mvndifcheck
2085 copyup mvndifcheck
2086
2087 layer ndiode DIFF
2088 and NPLUS
2089 and DIODE
2090 and-not NWELL
2091 and-not POLY
2092 and-not PPLUS
2093 and-not THKOX
2094 and-not LVTN
2095 labels DIFF
2096
2097 layer ndiodelvt DIFF
2098 and NPLUS
2099 and DIODE
2100 and-not NWELL
2101 and-not POLY
2102 and-not PPLUS
2103 and-not THKOX
2104 and LVTN
2105 labels DIFF
2106
2107 templayer ndiodearea DIODE
2108 and NPLUS
2109 and-not THKOX
2110 and-not NWELL
2111 copyup DIODE,NPLUS
2112
2113 layer ndiffres DIFFRES
2114 and NPLUS
2115 and-not THKOX
2116 labels DIFF
2117
2118 templayer pdiffarea DIFF,DIFFTXT,DIFFPIN
2119 and-not POLY
2120 and NWELL
2121 and-not NPLUS
2122 and-not DIODE
2123 and-not THKOX
2124 and PPLUS
2125 copyup pdifcheck
2126 labels DIFF
2127 labels DIFFTXT text
2128 labels DIFFPIN port
2129
2130 layer pdiff pdiffarea
2131
2132 layer mvndiode DIFF
2133 and NPLUS
2134 and DIODE
2135 and THKOX
2136 and-not POLY
2137 and-not PPLUS
2138 and-not LVTN
2139 labels DIFF
2140
2141 layer nndiode DIFF
2142 and NPLUS
2143 and DIODE
2144 and THKOX
2145 and-not POLY
2146 and-not PPLUS
2147 and LVTN
2148 labels DIFF
2149
2150 templayer mvndiodearea DIODE
2151 and NPLUS
2152 and THKOX
2153 and-not NWELL
2154 copyup DIODE,NPLUS
2155
2156 layer mvndiffres DIFFRES
2157 and NPLUS
2158 and THKOX
2159 labels DIFF
2160
2161 templayer mvpdiffarea DIFF,DIFFTXT,DIFFPIN
2162 and-not POLY
2163 and NWELL
2164 and-not NPLUS
2165 and THKOX
2166 and-not DIODE
2167 and-not DIFFRES
2168 and PPLUS
2169 copyup mvpdifcheck
2170 labels DIFF
2171 labels DIFFTXT text
2172 labels DIFFPIN port
2173
2174 layer mvpdiff mvpdiffarea
2175
2176 # Copy pdiff areas up for contact checks
2177 templayer xpdifcheck pdifcheck
2178 copyup pdifcheck
2179
2180 layer pdiode DIFF
2181 and PPLUS
2182 and-not POLY
2183 and-not NPLUS
2184 and-not THKOX
2185 and-not LVTN
2186 and-not HVTP
2187 and DIODE
2188 labels DIFF
2189
2190 layer pdiodelvt DIFF
2191 and PPLUS
2192 and-not POLY
2193 and-not NPLUS
2194 and-not THKOX
2195 and LVTN
2196 and-not HVTP
2197 and DIODE
2198 labels DIFF
2199
2200 layer pdiodehvt DIFF
2201 and PPLUS
2202 and-not POLY
2203 and-not NPLUS
2204 and-not THKOX
2205 and-not LVTN
2206 and HVTP
2207 and DIODE
2208 labels DIFF
2209
2210 templayer pdiodearea DIODE
2211 and PPLUS
2212 and-not THKOX
2213 copyup DIODE,PPLUS
2214
2215 # Define pfet areas as known pdiff, regardless of the presence of a well.
2216
2217 templayer pfetarea DIFF
2218 and-not NPLUS
2219 and-not THKOX
2220 and POLY
2221
2222 layer pfet pfetarea
2223 and-not LVTN
2224 and-not HVTP
2225 and-not STDCELL
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002226 and-not COREID
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002227 labels DIFF
2228
2229 layer scpfet pfetarea
2230 and-not LVTN
2231 and-not HVTP
2232 and STDCELL
2233 labels DIFF
2234
Tim Edwards363c7e02020-11-03 14:26:29 -05002235 layer scpfethvt pfetarea
2236 and-not LVTN
2237 and HVTP
2238 and STDCELL
2239 labels DIFF
2240
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002241 layer ppu pfetarea
2242 and-not LVTN
2243 and-not HVTP
2244 and COREID
2245 labels DIFF
2246
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002247 layer pfetlvt pfetarea
2248 and LVTN
2249 labels DIFF
2250
Tim Edwards78cc9eb2020-08-14 16:49:57 -04002251 layer pfetmvt pfetarea
2252 and HVTR
2253 labels DIFF
2254
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002255 layer pfethvt pfetarea
2256 and HVTP
Tim Edwards363c7e02020-11-03 14:26:29 -05002257 and-not STDCELL
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002258 labels DIFF
2259
2260 # Always force nwell under pfet (nwell encloses pdiff by 0.18)
2261 layer nwell pfetarea
2262 grow 180
2263
2264 # Copy mvpdiff areas up for contact checks
2265 templayer mvxpdifcheck mvpdifcheck
2266 copyup mvpdifcheck
2267
2268 layer mvpdiode DIFF
2269 and PPLUS
2270 and-not POLY
2271 and-not NPLUS
2272 and THKOX
2273 and DIODE
2274 labels DIFF
2275
2276 templayer mvpdiodearea DIODE
2277 and PPLUS
2278 and THKOX
2279 copyup DIODE,PPLUS
2280
2281 # Define pfet areas as known pdiff,
2282 # regardless of the presence of a
2283 # well.
2284
2285 templayer mvpfetarea DIFF
2286 and-not NPLUS
2287 and THKOX
2288 and POLY
2289
2290 layer mvpfet mvpfetarea
2291 labels DIFF
2292
2293 layer pdiff DIFF,DIFFTXT,DIFFPIN
2294 and-not NPLUS
2295 and-not POLY
2296 and-not THKOX
2297 and-not DIODE
2298 and-not DIFFRES
2299 labels DIFF
2300 labels DIFFTXT text
2301 labels DIFFPIN port
2302
2303 layer pdiffres DIFFRES
2304 and PPLUS
2305 and NWELL
2306 and-not THKOX
2307 labels DIFF
2308
2309 layer nfet DIFF
2310 and POLY
2311 and-not PPLUS
2312 and NPLUS
2313 and-not THKOX
2314 and-not LVTN
2315 and-not SONOS
2316 and-not STDCELL
2317 labels DIFF
2318
2319 layer scnfet DIFF
2320 and POLY
2321 and-not PPLUS
2322 and NPLUS
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002323 and-not NWELL
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002324 and-not THKOX
2325 and-not LVTN
2326 and-not SONOS
2327 and STDCELL
2328 labels DIFF
2329
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002330 layer npd DIFF
2331 and POLY
2332 and-not PPLUS
2333 and NPLUS
2334 and-not NWELL
2335 and COREID
2336 labels DIFF
2337
2338 # layer npass DIFF
2339 # and POLY
2340 # and-not PPLUS
2341 # and NPLUS
2342 # and-not NWELL
2343 # and COREID
2344 # labels DIFF
2345
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002346 layer nfetlvt DIFF
2347 and POLY
2348 and-not PPLUS
2349 and NPLUS
2350 and-not THKOX
2351 and LVTN
2352 and-not SONOS
2353 labels DIFF
2354
2355 layer nsonos DIFF
2356 and POLY
2357 and-not PPLUS
2358 and NPLUS
2359 and-not THKOX
2360 and LVTN
2361 and SONOS
2362 labels DIFF
2363
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002364 templayer nsdarea TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002365 and NPLUS
2366 and NWELL
2367 and-not POLY
2368 and-not PPLUS
2369 and-not THKOX
2370 copyup nsubcheck
2371
2372 layer nsd nsdarea
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002373 labels TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002374
2375 layer nsd TAP,TAPPIN
2376 and NPLUS
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002377 and-not POLY
2378 and-not THKOX
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002379 labels TAP
2380 labels TAPPIN port
2381
2382 templayer nsdexpand nsdarea
2383 grow 500
2384
2385 # Copy nsub areas up for contact checks
2386 templayer xnsubcheck nsubcheck
2387 copyup nsubcheck
2388
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002389 templayer psdarea TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002390 and PPLUS
2391 and-not NWELL
2392 and-not POLY
2393 and-not NPLUS
2394 and-not THKOX
2395 and-not pfetexpand
2396 copyup psubcheck
2397
2398 layer psd psdarea
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002399 labels TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002400
2401 layer psd TAP,TAPPIN
2402 and PPLUS
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002403 and-not POLY
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002404 and-not THKOX
2405 labels TAP
2406 labels TAPPIN port
2407
2408 templayer psdexpand psdarea
2409 grow 500
2410
2411 layer mvpdiff DIFF,DIFFTXT,DIFFPIN
2412 and-not NPLUS
2413 and-not POLY
2414 and THKOX
2415 and mvpfetexpand
2416 labels DIFF
2417 labels DIFFTXT text
2418 labels DIFFPIN port
2419
2420 layer mvpdiffres DIFFRES
2421 and PPLUS
2422 and NWELL
2423 and THKOX
2424 and-not mvrdpioedge
2425 labels DIFF
2426
Tim Edwards769d3622020-09-09 13:48:45 -04002427 templayer mvnfetarea DIFF
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002428 and POLY
2429 and-not PPLUS
2430 and NPLUS
2431 and-not LVTN
2432 and THKOX
Tim Edwards769d3622020-09-09 13:48:45 -04002433 grow 1000
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002434
Tim Edwards769d3622020-09-09 13:48:45 -04002435 templayer mvnnfetarea DIFF,TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002436 and POLY
2437 and-not PPLUS
2438 and NPLUS
2439 and LVTN
2440 and THKOX
Tim Edwards769d3622020-09-09 13:48:45 -04002441 and-not mvnfetarea
2442
2443 layer mvnfet DIFF
2444 and POLY
2445 and-not PPLUS
2446 and NPLUS
2447 and THKOX
2448 and-not mvnnfetarea
2449 labels DIFF
2450
2451 layer mvnnfet mvnnfetarea
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002452 labels DIFF
2453
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002454 templayer mvnsdarea TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002455 and NPLUS
2456 and NWELL
2457 and-not POLY
2458 and-not PPLUS
2459 and THKOX
2460 copyup mvnsubcheck
2461
2462 layer mvnsd mvnsdarea
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002463 labels TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002464
2465 layer mvnsd TAP,TAPPIN
2466 and NPLUS
2467 and THKOX
2468 labels TAP
2469 labels TAPPIN port
2470
2471 templayer mvnsdexpand mvnsdarea
2472 grow 500
2473
2474 # Copy nsub areas up for contact checks
2475 templayer mvxnsubcheck mvnsubcheck
2476 copyup mvnsubcheck
2477
2478 templayer mvpsdarea DIFF
2479 and PPLUS
2480 and-not NWELL
2481 and-not POLY
2482 and-not NPLUS
2483 and THKOX
2484 and-not mvpfetexpand
2485 copyup mvpsubcheck
2486
2487 layer mvpsd mvpsdarea
2488 labels DIFF
2489
2490 layer mvpsd TAP,TAPPIN
2491 and PPLUS
2492 and THKOX
2493 labels TAP
2494 labels TAPPIN port
2495
2496 templayer mvpsdexpand mvpsdarea
2497 grow 500
2498
2499 # Copy psub areas up for contact checks
2500 templayer xpsubcheck psubcheck
2501 copyup psubcheck
2502
2503 templayer mvxpsubcheck mvpsubcheck
2504 copyup mvpsubcheck
2505
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002506 layer psd TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002507 and-not PPLUS
2508 and-not NPLUS
2509 and-not POLY
2510 and-not THKOX
2511 and-not pfetexpand
2512 and psdexpand
2513
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002514 layer nsd TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002515 and-not PPLUS
2516 and-not NPLUS
2517 and-not POLY
2518 and-not THKOX
2519 and nsdexpand
2520
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002521 layer mvpsd TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002522 and-not PPLUS
2523 and-not NPLUS
2524 and-not POLY
2525 and THKOX
2526 and-not mvpfetexpand
2527 and mvpsdexpand
2528
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04002529 layer mvnsd TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002530 and-not PPLUS
2531 and-not NPLUS
2532 and-not POLY
2533 and THKOX
2534 and mvnsdexpand
2535
2536 templayer hresarea POLY
2537 and RPM
2538 grow 3000
2539
2540 templayer uresarea POLY
2541 and URPM
2542 grow 3000
2543
2544 templayer diffresarea DIFFRES
2545 and-not THKOX
2546 grow 3000
2547
2548 templayer mvdiffresarea DIFFRES
2549 and THKOX
2550 grow 3000
2551
2552 templayer resarea diffresarea,mvdiffresarea,hresarea,uresarea
2553
2554 layer pfet POLY
2555 and DIFF
2556 and diffresarea
2557 and-not NPLUS
2558 and-not STDCELL
2559
2560 layer scpfet POLY
2561 and DIFF
2562 and diffresarea
Tim Edwards363c7e02020-11-03 14:26:29 -05002563 and-not HVTP
2564 and-not NPLUS
2565 and STDCELL
2566
2567 layer scpfethvt POLY
2568 and DIFF
2569 and diffresarea
2570 and HVTP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002571 and-not NPLUS
2572 and STDCELL
2573
2574 templayer xpolyterm RPM,URPM
2575 and POLY
2576 and-not POLYRES
2577 # add back the 0.06um contact surround in the direction of the resistor
2578 grow 60
2579 and POLY
2580
2581 layer xpc xpolyterm
2582
2583 templayer polyarea POLY
2584 and-not POLYRES
2585 and-not POLYSHORT
2586 and-not DIFF
2587 and-not RPM
2588 and-not URPM
2589 copyup polycheck
2590
2591 layer poly polyarea,POLYTXT,POLYPIN
2592 labels POLY
2593 labels POLYTXT text
2594 labels POLYPIN port
2595
2596 # Copy (non-resistor) poly areas up for contact checks
2597 templayer xpolycheck polycheck
2598 copyup polycheck
2599
2600 layer mrp1 POLY
2601 and POLYRES
2602 and-not RPM
2603 and-not URPM
2604 labels POLY
2605
2606 layer rmp POLY
2607 and POLYSHORT
2608 labels POLY
2609
2610 layer xhrpoly POLY
2611 and POLYRES
2612 and RPM
2613 and-not URPM
2614 and PPLUS
2615 and NPC
2616 and-not xpolyterm
2617 labels POLY
2618
2619 layer uhrpoly POLY
2620 and POLYRES
2621 and URPM
2622 and-not RPM
2623 and NPC
2624 and-not xpolyterm
2625 labels POLY
2626
2627 templayer ndcbase CONT
2628 and DIFF
2629 and NPLUS
2630 and-not NWELL
2631 and LI
2632 and-not THKOX
2633
2634 layer ndc ndcbase
2635 grow 85
2636 shrink 85
2637 shrink 85
2638 grow 85
2639 or ndcbase
2640 labels CONT
2641
2642 templayer nscbase CONT
2643 and DIFF,TAP
2644 and NPLUS
2645 and NWELL
2646 and LI
2647 and-not THKOX
2648
2649 layer nsc nscbase
2650 grow 85
2651 shrink 85
2652 shrink 85
2653 grow 85
2654 or nscbase
2655 labels CONT
2656
2657 templayer pdcbase CONT
2658 and DIFF
2659 and PPLUS
2660 and NWELL
2661 and LI
2662 and-not THKOX
2663
2664 layer pdc pdcbase
2665 grow 85
2666 shrink 85
2667 shrink 85
2668 grow 85
2669 or pdcbase
2670 labels CONT
2671
2672 templayer pdcnowell CONT
2673 and DIFF
2674 and PPLUS
2675 and pfetexpand
2676 and LI
2677 and-not THKOX
2678
2679 layer pdc pdcnowell
2680 grow 85
2681 shrink 85
2682 shrink 85
2683 grow 85
2684 or pdcnowell
2685 labels CONT
2686
2687 templayer pscbase CONT
2688 and DIFF,TAP
2689 and PPLUS
2690 and-not NWELL
2691 and-not pfetexpand
2692 and LI
2693 and-not THKOX
2694
2695 layer psc pscbase
2696 grow 85
2697 shrink 85
2698 shrink 85
2699 grow 85
2700 or pscbase
2701 labels CONT
2702
2703 templayer pcbase CONT
2704 and POLY
2705 and-not DIFF
2706 and-not RPM,URPM
2707 and LI
2708
2709 layer pc pcbase
2710 grow 85
2711 shrink 85
2712 shrink 85
2713 grow 85
2714 or pcbase
2715 labels CONT
2716
2717 templayer ndicbase CONT
2718 and DIFF
2719 and NPLUS
2720 and DIODE
2721 and-not POLY
2722 and-not PPLUS
2723 and-not THKOX
2724 and-not LVTN
2725
2726 layer ndic ndicbase
2727 grow 85
2728 shrink 85
2729 shrink 85
2730 grow 85
2731 or ndicbase
2732 labels CONT
2733
2734 templayer ndilvtcbase CONT
2735 and DIFF
2736 and NPLUS
2737 and DIODE
2738 and-not POLY
2739 and-not PPLUS
2740 and-not THKOX
2741 and LVTN
2742
2743 layer ndilvtc ndilvtcbase
2744 grow 85
2745 shrink 85
2746 shrink 85
2747 grow 85
2748 or ndilvtcbase
2749 labels CONT
2750
2751 templayer pdicbase CONT
2752 and DIFF
2753 and PPLUS
2754 and DIODE
2755 and-not POLY
2756 and-not NPLUS
2757 and-not THKOX
2758 and-not LVTN
2759 and-not HVTP
2760
2761 layer pdic pdicbase
2762 grow 85
2763 shrink 85
2764 shrink 85
2765 grow 85
2766 or pdicbase
2767 labels CONT
2768
2769 templayer pdilvtcbase CONT
2770 and DIFF
2771 and PPLUS
2772 and DIODE
2773 and-not POLY
2774 and-not NPLUS
2775 and-not THKOX
2776 and LVTN
2777 and-not HVTP
2778
2779 layer pdilvtc pdilvtcbase
2780 grow 85
2781 shrink 85
2782 shrink 85
2783 grow 85
2784 or pdilvtcbase
2785 labels CONT
2786
2787 templayer pdihvtcbase CONT
2788 and DIFF
2789 and PPLUS
2790 and DIODE
2791 and-not POLY
2792 and-not NPLUS
2793 and-not THKOX
2794 and-not LVTN
2795 and HVTP
2796
2797 layer pdihvtc pdihvtcbase
2798 grow 85
2799 shrink 85
2800 shrink 85
2801 grow 85
2802 or pdihvtcbase
2803 labels CONT
2804
2805 templayer mvndcbase CONT
2806 and DIFF
2807 and NPLUS
2808 and-not NWELL
2809 and LI
2810 and THKOX
2811
2812 layer mvndc mvndcbase
2813 grow 85
2814 shrink 85
2815 shrink 85
2816 grow 85
2817 or mvndcbase
2818 labels CONT
2819
2820 templayer mvnscbase CONT
2821 and DIFF,TAP
2822 and NPLUS
2823 and NWELL
2824 and LI
2825 and THKOX
2826
2827 layer mvnsc mvnscbase
2828 grow 85
2829 shrink 85
2830 shrink 85
2831 grow 85
2832 or mvnscbase
2833 labels CONT
2834
2835 templayer mvpdcbase CONT
2836 and DIFF
2837 and PPLUS
2838 and NWELL
2839 and LI
2840 and THKOX
2841
2842 layer mvpdc mvpdcbase
2843 grow 85
2844 shrink 85
2845 shrink 85
2846 grow 85
2847 or mvpdcbase
2848 labels CONT
2849
2850 templayer mvpdcnowell CONT
2851 and DIFF
2852 and PPLUS
2853 and mvpfetexpand
2854 and MET1
2855 and THKOX
2856
2857 layer mvpdc mvpdcnowell
2858 grow 85
2859 shrink 85
2860 shrink 85
2861 grow 85
2862 or mvpdcnowell
2863 labels CONT
2864
2865 templayer mvpscbase CONT
2866 and DIFF,TAP
2867 and PPLUS
2868 and-not NWELL
2869 and-not mvpfetexpand
2870 and LI
2871 and THKOX
2872
2873 layer mvpsc mvpscbase
2874 grow 85
2875 shrink 85
2876 shrink 85
2877 grow 85
2878 or mvpscbase
2879 labels CONT
2880
2881 templayer mvndicbase CONT
2882 and DIFF
2883 and NPLUS
2884 and DIODE
2885 and-not POLY
2886 and-not PPLUS
2887 and-not LVTN
2888 and THKOX
2889
2890 layer mvndic mvndicbase
2891 grow 85
2892 shrink 85
2893 shrink 85
2894 grow 85
2895 or mvndicbase
2896 labels CONT
2897
2898 templayer nndicbase CONT
2899 and DIFF
2900 and NPLUS
2901 and DIODE
2902 and-not POLY
2903 and-not PPLUS
2904 and LVTN
2905 and THKOX
2906
2907 layer nndic nndicbase
2908 grow 85
2909 shrink 85
2910 shrink 85
2911 grow 85
2912 or nndicbase
2913 labels CONT
2914
2915 templayer mvpdicbase CONT
2916 and DIFF
2917 and PPLUS
2918 and DIODE
2919 and-not POLY
2920 and-not NPLUS
2921 and THKOX
2922
2923 layer mvpdic mvpdicbase
2924 grow 85
2925 shrink 85
2926 shrink 85
2927 grow 85
2928 or mvpdicbase
2929 labels CONT
2930
Tim Edwardsfaac36a2020-11-06 20:37:24 -05002931 layer coreli LI,LITXT,LIPIN
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002932 and-not LIRES,LISHORT
Tim Edwardsfaac36a2020-11-06 20:37:24 -05002933 and COREID
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002934 labels LI
2935 labels LITXT text
2936 labels LIPIN port
2937
Tim Edwardsfaac36a2020-11-06 20:37:24 -05002938 layer locali LI,LITXT,LIPIN
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002939 and-not LIRES,LISHORT
Tim Edwardsfaac36a2020-11-06 20:37:24 -05002940 and-not COREID
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002941 labels LI
2942 labels LITXT text
2943 labels LIPIN port
2944
2945 layer rli LI
2946 and LIRES,LISHORT
2947 labels LIRES,LISHORT
2948
2949 layer lic MCON
2950 grow 95
2951 shrink 95
2952 shrink 85
2953 grow 85
2954 or MCON
2955 labels MCON
2956
2957 layer m1 MET1,MET1TXT,MET1PIN
2958 and-not MET1RES,MET1SHORT
2959 labels MET1
2960 labels MET1TXT text
2961 labels MET1PIN port
2962
2963 layer rm1 MET1
2964 and MET1RES,MET1SHORT
2965 labels MET1RES,MET1SHORT
2966
Tim Edwardseba70cf2020-08-01 21:08:46 -04002967 layer m1fill MET1FILL
2968 labels MET1FILL
2969
Tim Edwards55f4d0e2020-07-05 15:41:02 -04002970#ifdef MIM
2971 layer mimcap MET3
2972 and CAPM
2973 labels CAPM
2974
2975 layer mimcc VIA3
2976 and CAPM
2977 grow 60
2978 grow 40
2979 shrink 40
2980 labels CAPM
2981
2982 layer mimcap2 MET4
2983 and CAPM2
2984 labels CAPM2
2985
2986 layer mim2cc VIA4
2987 and CAPM2
2988 grow 190
2989 grow 210
2990 shrink 210
2991 labels CAPM2
2992
2993#endif (MIM)
2994
2995 templayer m2cbase VIA1
2996 grow 55
2997
2998 layer m2c m2cbase
2999 grow 30
3000 shrink 30
3001 shrink 130
3002 grow 130
3003 or m2cbase
3004
3005 layer m2 MET2,MET2TXT,MET2PIN
3006 and-not MET2RES,MET2SHORT
3007 labels MET2
3008 labels MET2TXT text
3009 labels MET2PIN port
3010
3011 layer rm2 MET2
3012 and MET2RES,MET2SHORT
3013 labels MET2RES,MET2SHORT
3014
Tim Edwardseba70cf2020-08-01 21:08:46 -04003015 layer m2fill MET2FILL
3016 labels MET2FILL
3017
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003018 templayer m3cbase VIA2
3019 grow 40
3020
3021 layer m3c m3cbase
3022 grow 60
3023 shrink 60
3024 shrink 140
3025 grow 140
3026 or m3cbase
3027
3028 layer m3 MET3,MET3TXT,MET3PIN
3029 and-not MET3RES,MET3SHORT
3030#ifdef MIM
3031 and-not CAPM
3032#endif (MIM)
3033 labels MET3
3034 labels MET3TXT text
3035 labels MET3PIN port
3036
3037 layer rm3 MET3
3038 and MET3RES,MET3SHORT
3039 labels MET3RES,MET3SHORT
3040
Tim Edwardseba70cf2020-08-01 21:08:46 -04003041 layer m3fill MET3FILL
3042 labels MET3FILL
3043
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003044#ifdef (METAL5)
3045
3046 templayer via3base VIA3
3047#ifdef MIM
3048 and-not CAPM
3049#endif (MIM)
3050 grow 60
3051
3052 layer via3 via3base
3053 grow 40
3054 shrink 40
3055 shrink 160
3056 grow 160
3057 or via3base
3058
3059 layer m4 MET4,MET4TXT,MET4PIN
3060 and-not MET4RES,MET4SHORT
3061#ifdef MIM
3062 and-not CAPM2
3063#endif (MIM)
3064 labels MET4
3065 labels MET4TXT text
3066 labels MET4PIN port
3067
3068 layer rm4 MET4
3069 and MET4RES,MET4SHORT
3070 labels MET4RES,MET4SHORT
3071
Tim Edwardseba70cf2020-08-01 21:08:46 -04003072 layer m4fill MET4FILL
3073 labels MET4FILL
3074
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003075 layer m5 MET5,MET5TXT,MET5PIN
3076 and-not MET5RES,MET5SHORT
3077 labels MET5
3078 labels MET5TXT text
3079 labels MET5PIN port
3080
3081 layer rm5 MET5
3082 and MET5RES,MET5SHORT
3083 labels MET5RES,MET5SHORT
3084
Tim Edwardseba70cf2020-08-01 21:08:46 -04003085 layer m5fill MET5FILL
3086 labels MET5FILL
3087
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003088 templayer via4base VIA4
3089#ifdef MIM
3090 and-not CAPM2
3091#endif (MIM)
3092 grow 190
3093
3094 layer via4 via4base
3095 grow 210
3096 shrink 210
3097 shrink 590
3098 grow 590
3099 or via4base
3100#endif (METAL5)
3101
3102#ifdef REDISTRIBUTION
3103 layer metrdl RDL,RDLTXT,RDLPIN
3104 labels RDL
3105 labels RDLTXT text
3106 labels RDLPIN port
3107#endif
3108
3109 # Find diffusion not covered in
3110 # NPLUS or PPLUS and pull it into
3111 # the next layer up
3112
3113 templayer gentrans DIFF
3114 and-not PPLUS
3115 and-not NPLUS
3116 and POLY
3117 copyup DIFF,POLY
3118
3119 templayer gendiff DIFF,TAP
3120 and-not PPLUS
3121 and-not NPLUS
3122 and-not POLY
3123 copyup DIFF
3124
3125 # Handle contacts found by copyup
3126
3127 templayer ndiccopy CONT
3128 and LI
3129 and DIODE
3130 and NPLUS
3131 and-not THKOX
3132
3133 layer ndic ndiccopy
3134 grow 85
3135 shrink 85
3136 shrink 85
3137 grow 85
3138 or ndiccopy
3139 labels CONT
3140
3141 templayer mvndiccopy CONT
3142 and LI
3143 and DIODE
3144 and NPLUS
3145 and THKOX
3146
3147 layer mvndic mvndiccopy
3148 grow 85
3149 shrink 85
3150 shrink 85
3151 grow 85
3152 or mvndiccopy
3153 labels CONT
3154
3155 templayer pdiccopy CONT
3156 and LI
3157 and DIODE
3158 and PPLUS
3159 and-not THKOX
3160
3161 layer pdic pdiccopy
3162 grow 85
3163 shrink 85
3164 shrink 85
3165 grow 85
3166 or pdiccopy
3167 labels CONT
3168
3169 templayer mvpdiccopy CONT
3170 and LI
3171 and DIODE
3172 and PPLUS
3173 and THKOX
3174
3175 layer mvpdic mvpdiccopy
3176 grow 85
3177 shrink 85
3178 shrink 85
3179 grow 85
3180 or mvpdiccopy
3181 labels CONT
3182
3183 templayer ndccopy CONT
3184 and ndifcheck
3185
3186 layer ndc ndccopy
3187 grow 85
3188 shrink 85
3189 shrink 85
3190 grow 85
3191 or ndccopy
3192 labels CONT
3193
3194 templayer mvndccopy CONT
3195 and mvndifcheck
3196
3197 layer mvndc mvndccopy
3198 grow 85
3199 shrink 85
3200 shrink 85
3201 grow 85
3202 or mvndccopy
3203 labels CONT
3204
3205 templayer pdccopy CONT
3206 and pdifcheck
3207
3208 layer pdc pdccopy
3209 grow 85
3210 shrink 85
3211 shrink 85
3212 grow 85
3213 or pdccopy
3214 labels CONT
3215
3216 templayer mvpdccopy CONT
3217 and mvpdifcheck
3218
3219 layer mvpdc mvpdccopy
3220 grow 85
3221 shrink 85
3222 shrink 85
3223 grow 85
3224 or mvpdccopy
3225 labels CONT
3226
3227 templayer pccopy CONT
3228 and polycheck
3229
3230 layer pc pccopy
3231 grow 85
3232 shrink 85
3233 shrink 85
3234 grow 85
3235 or pccopy
3236 labels CONT
3237
3238 templayer nsccopy CONT
3239 and nsubcheck
3240
3241 layer nsc nsccopy
3242 grow 85
3243 shrink 85
3244 shrink 85
3245 grow 85
3246 or nsccopy
3247 labels CONT
3248
3249 templayer mvnsccopy CONT
3250 and mvnsubcheck
3251
3252 layer mvnsc mvnsccopy
3253 grow 85
3254 shrink 85
3255 shrink 85
3256 grow 85
3257 or mvnsccopy
3258 labels CONT
3259
3260 templayer psccopy CONT
3261 and psubcheck
3262
3263 layer psc psccopy
3264 grow 85
3265 shrink 85
3266 shrink 85
3267 grow 85
3268 or psccopy
3269 labels CONT
3270
3271 templayer mvpsccopy CONT
3272 and mvpsubcheck
3273
3274 layer mvpsc mvpsccopy
3275 grow 85
3276 shrink 85
3277 shrink 85
3278 grow 85
3279 or mvpsccopy
3280 labels CONT
3281
3282 # Find contacts not covered in
3283 # metal and pull them into the
3284 # next layer up
3285
3286 templayer gencont CONT
3287 and LI
3288 and-not DIFF,TAP
3289 and-not POLY
3290 and-not DIODE
3291 and-not nsubcheck
3292 and-not psubcheck
3293 and-not mvnsubcheck
3294 and-not mvpsubcheck
3295 copyup CONT,LI
3296
3297 templayer barecont CONT
3298 and-not LI
3299 and-not nsubcheck
3300 and-not psubcheck
3301 and-not mvnsubcheck
3302 and-not mvpsubcheck
3303 copyup CONT
3304
3305 layer glass GLASS,PADTXT,PADPIN
3306 labels GLASS
3307 labels PADTXT text
3308 labels PADPIN port
3309
3310 templayer boundary BOUND,STDCELL,PADCELL
3311 boundary
3312
3313 layer comment LVSTEXT
3314 labels LVSTEXT text
3315
3316 layer comment TTEXT
3317 labels TTEXT text
3318
3319 layer fillblock FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4
3320 labels FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4
3321
3322# MOS Varactor
3323
3324 layer var POLY
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04003325 and TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003326 and NPLUS
3327 and NWELL
3328 and-not THKOX
3329 and-not HVTP
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04003330 # NOTE: Else forms a varactor that is not in the vendor netlist.
3331 and-not COREID
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003332 labels POLY
3333
3334 layer varhvt POLY
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04003335 and TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003336 and NPLUS
3337 and NWELL
3338 and-not THKOX
3339 and HVTP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003340 labels POLY
3341
3342 layer mvvar POLY
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04003343 and TAP
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003344 and NPLUS
3345 and NWELL
3346 and THKOX
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003347 labels POLY
3348
3349 calma NWELL 64 20
3350 calma DIFF 65 20
3351 calma DNWELL 64 18
3352 calma PWRES 64 13
3353 calma TAP 65 44
3354 # LVTN
3355 calma LVTN 125 44
Tim Edwards78cc9eb2020-08-14 16:49:57 -04003356 # HVTR
3357 calma HVTR 18 20
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003358 # HVTP
3359 calma HVTP 78 44
3360 # SONOS (TUNM)
3361 calma SONOS 80 20
3362 # NPLUS = NSDM
3363 calma NPLUS 93 44
3364 # PPLUS = PSDM
3365 calma PPLUS 94 20
3366 # HVI
3367 calma THKOX 75 20
3368 # NPC
3369 calma NPC 95 20
3370 # P+ POLY MASK
3371 calma RPM 86 20
3372 calma URPM 79 20
3373 calma LDNTM 11 44
3374 calma HVNTM 125 20
Tim Edwards3af6a1e2020-09-16 11:48:17 -04003375 # Poly resistor ID mark
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003376 calma POLYRES 66 13
3377 # Diffusion resistor ID mark
3378 calma DIFFRES 65 13
3379 calma POLY 66 20
3380 calma POLYMOD 66 83
3381 # Diode ID mark
3382 calma DIODE 81 23
3383 # Bipolar NPN mark
3384 calma NPNID 82 20
3385 # Bipolar PNP mark
Tim Edwards862eeac2020-09-09 12:20:07 -04003386 calma PNPID 82 44
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003387 # Capacitor ID
3388 calma CAPID 82 64
3389 # Core area ID mark
3390 calma COREID 81 2
3391 # Standard cell ID mark
3392 calma STDCELL 81 4
3393 # Padframe cell ID mark
3394 calma PADCELL 81 3
3395 # Seal ring ID mark
3396 calma SEALID 81 1
3397 # Low tap density ID mark
3398 calma LOWTAPDENSITY 81 14
3399
3400 # LICON
3401 calma CONT 66 44
3402 calma LI 67 20
3403 calma MCON 67 44
3404
3405 calma MET1 68 20
3406 calma VIA1 68 44
3407 calma MET2 69 20
3408 calma VIA2 69 44
3409 calma MET3 70 20
3410#ifdef METAL5
3411 calma VIA3 70 44
3412 calma MET4 71 20
3413 calma VIA4 71 44
3414 calma MET5 72 20
3415#endif
3416#ifdef REDISTRIBUTION
3417 calma RDL 74 20
3418#endif
3419 calma GLASS 76 20
3420
3421 calma SUBPIN 64 59
3422 calma PADPIN 76 5
3423 calma DIFFPIN 65 6
3424 calma TAPPIN 65 5
3425 calma WELLPIN 64 5
3426 calma LIPIN 67 5
3427 calma POLYPIN 66 5
3428 calma MET1PIN 68 5
3429 calma MET2PIN 69 5
3430 calma MET3PIN 70 5
3431#ifdef METAL5
3432 calma MET4PIN 71 5
3433 calma MET5PIN 72 5
3434#endif
3435#ifdef REDISTRIBUTION
3436 calma RDLPIN 74 5
3437#endif
3438
3439 calma LIRES 67 13
3440 calma MET1RES 68 13
3441 calma MET2RES 69 13
3442 calma MET3RES 70 13
3443#ifdef METAL5
3444 calma MET4RES 71 13
3445 calma MET5RES 72 13
3446#endif
3447
Tim Edwardseba70cf2020-08-01 21:08:46 -04003448 calma MET1FILL 68 28
3449 calma MET2FILL 69 28
3450 calma MET3FILL 70 28
3451#ifdef METAL5
3452 calma MET4FILL 71 28
3453 calma MET5FILL 72 28
3454#endif
3455
Tim Edwards55f4d0e2020-07-05 15:41:02 -04003456 calma POLYSHORT 66 15
3457 calma LISHORT 67 15
3458 calma MET1SHORT 68 15
3459 calma MET2SHORT 69 15
3460 calma MET3SHORT 70 15
3461#ifdef METAL5
3462 calma MET4SHORT 71 15
3463 calma MET5SHORT 72 15
3464#endif
3465
3466 calma SUBTXT 122 16
3467 calma PADTXT 76 16
3468 calma DIFFTXT 65 16
3469 calma POLYTXT 66 16
3470 calma WELLTXT 64 16
3471 calma LITXT 67 16
3472 calma MET1TXT 68 16
3473 calma MET2TXT 69 16
3474 calma MET3TXT 70 16
3475#ifdef METAL5
3476 calma MET4TXT 71 16
3477 calma MET5TXT 72 16
3478#endif
3479#ifdef REDISTRIBUTION
3480 calma RDLPIN 74 16
3481#endif
3482
3483 calma BOUND 235 4
3484
3485 calma LVSTEXT 83 44
3486
3487#ifdef (MIM)
3488 calma CAPM 89 44
3489 calma CAPM2 97 44
3490#endif (MIM)
3491
3492 calma FILLOBSM1 62 24
3493 calma FILLOBSM2 105 52
3494 calma FILLOBSM3 107 24
3495 calma FILLOBSM4 112 4
3496
Tim Edwards88baa8e2020-08-30 17:03:58 -04003497#-----------------------------------------------------------------------
3498
3499style vendorimport
3500 scalefactor 10 nanometers
3501 gridlimit 5
3502
3503 options ignore-unknown-layer-labels no-reconnect-labels
3504
3505#ifndef MIM
3506 ignore CAPM
3507 ignore CAPM2
3508#endif (!MIM)
3509#ifndef METAL5
3510 ignore MET4,VIA3
3511 ignore MET5,VIA4
3512#endif
3513 ignore NPC
3514 ignore SEALID
Tim Edwards88baa8e2020-08-30 17:03:58 -04003515 ignore CAPID
3516 ignore LDNTM
3517 ignore HVNTM
3518 ignore POLYMOD
3519 ignore LOWTAPDENSITY
3520
Tim Edwardsfaac36a2020-11-06 20:37:24 -05003521 layer pnp NWELL,WELLTXT,WELLPIN
3522 and PNPID
Tim Edwards862eeac2020-09-09 12:20:07 -04003523 labels NWELL
3524 labels WELLTXT port
3525 labels WELLPIN port
3526
Tim Edwardsfaac36a2020-11-06 20:37:24 -05003527 layer nwell NWELL,WELLTXT,WELLPIN
3528 and-not PNPID
Tim Edwards88baa8e2020-08-30 17:03:58 -04003529 labels NWELL
3530 labels WELLTXT port
3531 labels WELLPIN port
3532
3533 layer pwell SUBTXT,SUBPIN
3534 labels SUBTXT port
3535 labels SUBPIN port
3536
Tim Edwardsbb30e322020-10-07 16:51:21 -04003537 # Always draw pwell under p-tap
3538 layer pwell TAP
3539 and-not NWELL
3540
Tim Edwards88baa8e2020-08-30 17:03:58 -04003541 layer dnwell DNWELL
3542 labels DNWELL
3543
Tim Edwards862eeac2020-09-09 12:20:07 -04003544 layer npn DNWELL
3545 and-not NWELL
3546 and NPNID
3547
Tim Edwards88baa8e2020-08-30 17:03:58 -04003548 layer rpw PWRES
3549 and DNWELL
3550 labels PWRES
3551
3552 templayer ndiffarea DIFF,DIFFTXT,DIFFPIN
3553 and-not POLY
3554 and-not NWELL
3555 and-not PPLUS
3556 and-not DIODE
3557 and-not DIFFRES
3558 and-not THKOX
3559 and NPLUS
3560 copyup ndifcheck
3561 labels DIFF
3562 labels DIFFTXT port
3563 labels DIFFPIN port
3564 labels TAPPIN port
3565
3566 layer ndiff ndiffarea
3567
3568 # Copy ndiff areas up for contact checks
3569 templayer xndifcheck ndifcheck
3570 copyup ndifcheck
3571
3572 templayer mvndiffarea DIFF,DIFFTXT,DIFFPIN
3573 and-not POLY
3574 and-not NWELL
3575 and-not PPLUS
3576 and-not DIODE
3577 and-not DIFFRES
3578 and THKOX
3579 and NPLUS
3580 copyup ndifcheck
3581 labels DIFF
3582 labels DIFFTXT port
3583 labels DIFFPIN port
3584
3585 layer mvndiff mvndiffarea
3586
3587 # Copy ndiff areas up for contact checks
3588 templayer mvxndifcheck mvndifcheck
3589 copyup mvndifcheck
3590
3591 layer ndiode DIFF
3592 and NPLUS
3593 and DIODE
3594 and-not NWELL
3595 and-not POLY
3596 and-not PPLUS
3597 and-not THKOX
3598 and-not LVTN
3599 labels DIFF
3600
3601 layer ndiodelvt DIFF
3602 and NPLUS
3603 and DIODE
3604 and-not NWELL
3605 and-not POLY
3606 and-not PPLUS
3607 and-not THKOX
3608 and LVTN
3609 labels DIFF
3610
3611 templayer ndiodearea DIODE
3612 and NPLUS
3613 and-not THKOX
3614 and-not NWELL
3615 copyup DIODE,NPLUS
3616
3617 layer ndiffres DIFFRES
3618 and NPLUS
3619 and-not THKOX
3620 labels DIFF
3621
3622 templayer pdiffarea DIFF,DIFFTXT,DIFFPIN
3623 and-not POLY
3624 and NWELL
3625 and-not NPLUS
3626 and-not DIODE
3627 and-not THKOX
3628 and PPLUS
3629 copyup pdifcheck
3630 labels DIFF
3631 labels DIFFTXT port
3632 labels DIFFPIN port
3633
3634 layer pdiff pdiffarea
3635
3636 layer mvndiode DIFF
3637 and NPLUS
3638 and DIODE
3639 and THKOX
3640 and-not POLY
3641 and-not PPLUS
3642 and-not LVTN
3643 labels DIFF
3644
3645 layer nndiode DIFF
3646 and NPLUS
3647 and DIODE
3648 and THKOX
3649 and-not POLY
3650 and-not PPLUS
3651 and LVTN
3652 labels DIFF
3653
3654 templayer mvndiodearea DIODE
3655 and NPLUS
3656 and THKOX
3657 and-not NWELL
3658 copyup DIODE,NPLUS
3659
3660 layer mvndiffres DIFFRES
3661 and NPLUS
3662 and THKOX
3663 labels DIFF
3664
3665 templayer mvpdiffarea DIFF,DIFFTXT,DIFFPIN
3666 and-not POLY
3667 and NWELL
3668 and-not NPLUS
3669 and THKOX
3670 and-not DIODE
3671 and-not DIFFRES
3672 and PPLUS
3673 copyup mvpdifcheck
3674 labels DIFF
3675 labels DIFFTXT port
3676 labels DIFFPIN port
3677
3678 layer mvpdiff mvpdiffarea
3679
3680 # Copy pdiff areas up for contact checks
3681 templayer xpdifcheck pdifcheck
3682 copyup pdifcheck
3683
3684 layer pdiode DIFF
3685 and PPLUS
3686 and-not POLY
3687 and-not NPLUS
3688 and-not THKOX
3689 and-not LVTN
3690 and-not HVTP
3691 and DIODE
3692 labels DIFF
3693
3694 layer pdiodelvt DIFF
3695 and PPLUS
3696 and-not POLY
3697 and-not NPLUS
3698 and-not THKOX
3699 and LVTN
3700 and-not HVTP
3701 and DIODE
3702 labels DIFF
3703
3704 layer pdiodehvt DIFF
3705 and PPLUS
3706 and-not POLY
3707 and-not NPLUS
3708 and-not THKOX
3709 and-not LVTN
3710 and HVTP
3711 and DIODE
3712 labels DIFF
3713
3714 templayer pdiodearea DIODE
3715 and PPLUS
3716 and-not THKOX
3717 copyup DIODE,PPLUS
3718
3719 # Define pfet areas as known pdiff, regardless of the presence of a well.
3720
3721 templayer pfetarea DIFF
3722 and-not NPLUS
3723 and-not THKOX
3724 and POLY
3725
3726 layer pfet pfetarea
3727 and-not LVTN
3728 and-not HVTP
3729 and-not STDCELL
3730 and-not COREID
3731 labels DIFF
3732
3733 layer scpfet pfetarea
3734 and-not LVTN
3735 and-not HVTP
3736 and STDCELL
3737 labels DIFF
3738
Tim Edwards363c7e02020-11-03 14:26:29 -05003739 layer scpfethvt pfetarea
3740 and-not LVTN
3741 and HVTP
3742 and STDCELL
3743 labels DIFF
3744
Tim Edwards88baa8e2020-08-30 17:03:58 -04003745 layer ppu pfetarea
3746 and-not LVTN
3747 and-not HVTP
3748 and COREID
3749 labels DIFF
3750
3751 layer pfetlvt pfetarea
3752 and LVTN
3753 labels DIFF
3754
3755 layer pfetmvt pfetarea
3756 and HVTR
3757 labels DIFF
3758
3759 layer pfethvt pfetarea
3760 and HVTP
Tim Edwards363c7e02020-11-03 14:26:29 -05003761 and-not STDCELL
Tim Edwards88baa8e2020-08-30 17:03:58 -04003762 labels DIFF
3763
3764 # Always force nwell under pfet (nwell encloses pdiff by 0.18)
3765 layer nwell pfetarea
3766 grow 180
3767
3768 # Copy mvpdiff areas up for contact checks
3769 templayer mvxpdifcheck mvpdifcheck
3770 copyup mvpdifcheck
3771
3772 layer mvpdiode DIFF
3773 and PPLUS
3774 and-not POLY
3775 and-not NPLUS
3776 and THKOX
3777 and DIODE
3778 labels DIFF
3779
3780 templayer mvpdiodearea DIODE
3781 and PPLUS
3782 and THKOX
3783 copyup DIODE,PPLUS
3784
3785 # Define pfet areas as known pdiff,
3786 # regardless of the presence of a
3787 # well.
3788
3789 templayer mvpfetarea DIFF
3790 and-not NPLUS
3791 and THKOX
3792 and POLY
3793
3794 layer mvpfet mvpfetarea
3795 labels DIFF
3796
3797 layer pdiff DIFF,DIFFTXT,DIFFPIN
3798 and-not NPLUS
3799 and-not POLY
3800 and-not THKOX
3801 and-not DIODE
3802 and-not DIFFRES
3803 labels DIFF
3804 labels DIFFTXT port
3805 labels DIFFPIN port
3806
3807 layer pdiffres DIFFRES
3808 and PPLUS
3809 and NWELL
3810 and-not THKOX
3811 labels DIFF
3812
3813 layer nfet DIFF
3814 and POLY
3815 and-not PPLUS
3816 and NPLUS
3817 and-not THKOX
3818 and-not LVTN
3819 and-not SONOS
3820 and-not STDCELL
3821 labels DIFF
3822
3823 layer scnfet DIFF
3824 and POLY
3825 and-not PPLUS
3826 and NPLUS
3827 and-not NWELL
3828 and-not THKOX
3829 and-not LVTN
3830 and-not SONOS
3831 and STDCELL
3832 labels DIFF
3833
3834 layer npd DIFF
3835 and POLY
3836 and-not PPLUS
3837 and NPLUS
3838 and-not NWELL
3839 and COREID
3840 labels DIFF
3841
3842 # layer npass DIFF
3843 # and POLY
3844 # and-not PPLUS
3845 # and NPLUS
3846 # and-not NWELL
3847 # and COREID
3848 # labels DIFF
3849
3850 layer nfetlvt DIFF
3851 and POLY
3852 and-not PPLUS
3853 and NPLUS
3854 and-not THKOX
3855 and LVTN
3856 and-not SONOS
3857 labels DIFF
3858
3859 layer nsonos DIFF
3860 and POLY
3861 and-not PPLUS
3862 and NPLUS
3863 and-not THKOX
3864 and LVTN
3865 and SONOS
3866 labels DIFF
3867
3868 templayer nsdarea TAP
3869 and NPLUS
3870 and NWELL
3871 and-not POLY
3872 and-not PPLUS
3873 and-not THKOX
3874 copyup nsubcheck
3875
3876 layer nsd nsdarea
3877 labels TAP
3878
3879 layer nsd TAP,TAPPIN
3880 and NPLUS
3881 and-not POLY
3882 and-not THKOX
3883 labels TAP
3884 labels TAPPIN port
3885
3886 templayer nsdexpand nsdarea
3887 grow 500
3888
3889 # Copy nsub areas up for contact checks
3890 templayer xnsubcheck nsubcheck
3891 copyup nsubcheck
3892
3893 templayer psdarea TAP
3894 and PPLUS
3895 and-not NWELL
3896 and-not POLY
3897 and-not NPLUS
3898 and-not THKOX
3899 and-not pfetexpand
3900 copyup psubcheck
3901
3902 layer psd psdarea
3903 labels TAP
3904
3905 layer psd TAP,TAPPIN
3906 and PPLUS
3907 and-not POLY
3908 and-not THKOX
3909 labels TAP
3910 labels TAPPIN port
3911
3912 templayer psdexpand psdarea
3913 grow 500
3914
3915 layer mvpdiff DIFF,DIFFTXT,DIFFPIN
3916 and-not NPLUS
3917 and-not POLY
3918 and THKOX
3919 and mvpfetexpand
3920 labels DIFF
3921 labels DIFFTXT port
3922 labels DIFFPIN port
3923
3924 layer mvpdiffres DIFFRES
3925 and PPLUS
3926 and NWELL
3927 and THKOX
3928 and-not mvrdpioedge
3929 labels DIFF
3930
Tim Edwards769d3622020-09-09 13:48:45 -04003931 templayer mvnfetarea DIFF
Tim Edwards88baa8e2020-08-30 17:03:58 -04003932 and POLY
3933 and-not PPLUS
3934 and NPLUS
3935 and-not LVTN
3936 and THKOX
Tim Edwards769d3622020-09-09 13:48:45 -04003937 grow 1000
Tim Edwards88baa8e2020-08-30 17:03:58 -04003938
Tim Edwards769d3622020-09-09 13:48:45 -04003939 templayer mvnnfetarea DIFF,TAP
Tim Edwards88baa8e2020-08-30 17:03:58 -04003940 and POLY
3941 and-not PPLUS
3942 and NPLUS
3943 and LVTN
3944 and THKOX
Tim Edwards769d3622020-09-09 13:48:45 -04003945 and-not mvnfetarea
3946
3947 layer mvnfet DIFF
3948 and POLY
3949 and-not PPLUS
3950 and NPLUS
3951 and THKOX
3952 and-not mvnnfetarea
3953 labels DIFF
3954
3955 layer mvnnfet mvnnfetarea
Tim Edwards88baa8e2020-08-30 17:03:58 -04003956 labels DIFF
3957
3958 templayer mvnsdarea TAP
3959 and NPLUS
3960 and NWELL
3961 and-not POLY
3962 and-not PPLUS
3963 and THKOX
3964 copyup mvnsubcheck
3965
3966 layer mvnsd mvnsdarea
3967 labels TAP
3968
3969 layer mvnsd TAP,TAPPIN
3970 and NPLUS
3971 and THKOX
3972 labels TAP
3973 labels TAPPIN port
3974
3975 templayer mvnsdexpand mvnsdarea
3976 grow 500
3977
3978 # Copy nsub areas up for contact checks
3979 templayer mvxnsubcheck mvnsubcheck
3980 copyup mvnsubcheck
3981
3982 templayer mvpsdarea DIFF
3983 and PPLUS
3984 and-not NWELL
3985 and-not POLY
3986 and-not NPLUS
3987 and THKOX
3988 and-not mvpfetexpand
3989 copyup mvpsubcheck
3990
3991 layer mvpsd mvpsdarea
3992 labels DIFF
3993
3994 layer mvpsd TAP,TAPPIN
3995 and PPLUS
3996 and THKOX
3997 labels TAP
3998 labels TAPPIN port
3999
4000 templayer mvpsdexpand mvpsdarea
4001 grow 500
4002
4003 # Copy psub areas up for contact checks
4004 templayer xpsubcheck psubcheck
4005 copyup psubcheck
4006
4007 templayer mvxpsubcheck mvpsubcheck
4008 copyup mvpsubcheck
4009
4010 layer psd TAP
4011 and-not PPLUS
4012 and-not NPLUS
4013 and-not POLY
4014 and-not THKOX
4015 and-not pfetexpand
4016 and psdexpand
4017
4018 layer nsd TAP
4019 and-not PPLUS
4020 and-not NPLUS
4021 and-not POLY
4022 and-not THKOX
4023 and nsdexpand
4024
4025 layer mvpsd TAP
4026 and-not PPLUS
4027 and-not NPLUS
4028 and-not POLY
4029 and THKOX
4030 and-not mvpfetexpand
4031 and mvpsdexpand
4032
4033 layer mvnsd TAP
4034 and-not PPLUS
4035 and-not NPLUS
4036 and-not POLY
4037 and THKOX
4038 and mvnsdexpand
4039
4040 templayer hresarea POLY
4041 and RPM
4042 grow 3000
4043
4044 templayer uresarea POLY
4045 and URPM
4046 grow 3000
4047
4048 templayer diffresarea DIFFRES
4049 and-not THKOX
4050 grow 3000
4051
4052 templayer mvdiffresarea DIFFRES
4053 and THKOX
4054 grow 3000
4055
4056 templayer resarea diffresarea,mvdiffresarea,hresarea,uresarea
4057
4058 layer pfet POLY
4059 and DIFF
4060 and diffresarea
4061 and-not NPLUS
4062 and-not STDCELL
4063
4064 layer scpfet POLY
4065 and DIFF
Tim Edwards363c7e02020-11-03 14:26:29 -05004066 and-not HVTP
Tim Edwards88baa8e2020-08-30 17:03:58 -04004067 and diffresarea
4068 and-not NPLUS
4069 and STDCELL
4070
Tim Edwards363c7e02020-11-03 14:26:29 -05004071 layer scpfethvt POLY
4072 and DIFF
4073 and HVTP
4074 and diffresarea
4075 and-not NPLUS
4076 and STDCELL
4077
4078 templayer xpolyterm RPM,URPM
4079 and POLY
4080 and-not POLYRES
4081 # add back the 0.06um contact surround in the direction of the resistor
4082 grow 60
4083 and POLY
4084
4085 layer xpc xpolyterm
4086
4087 templayer polyarea POLY
4088 and-not POLYRES
4089 and-not POLYSHORT
4090 and-not DIFF
4091 and-not RPM
4092 and-not URPM
4093 copyup polycheck
4094
4095 layer poly polyarea,POLYTXT,POLYPIN
4096 labels POLY
4097 labels POLYTXT port
4098 labels POLYPIN port
4099
4100 # Copy (non-resistor) poly areas up for contact checks
4101 templayer xpolycheck polycheck
4102 copyup polycheck
4103
4104 layer mrp1 POLY
4105 and POLYRES
4106 and-not RPM
4107 and-not URPM
4108 labels POLY
4109
4110 layer rmp POLY
4111 and POLYSHORT
4112 labels POLY
4113
4114 layer xhrpoly POLY
4115 and POLYRES
4116 and RPM
4117 and-not URPM
4118 and PPLUS
4119 and NPC
4120 and-not xpolyterm
4121 labels POLY
4122
4123 layer uhrpoly POLY
4124 and POLYRES
4125 and URPM
4126 and-not RPM
4127 and NPC
4128 and-not xpolyterm
4129 labels POLY
4130
4131 templayer ndcbase CONT
4132 and DIFF
4133 and NPLUS
4134 and-not NWELL
4135 and LI
4136 and-not THKOX
4137
4138 layer ndc ndcbase
4139 grow 85
4140 shrink 85
4141 shrink 85
4142 grow 85
4143 or ndcbase
4144 labels CONT
4145
4146 templayer nscbase CONT
Tim Edwards88baa8e2020-08-30 17:03:58 -04004147 and DIFF,TAP
4148 and NPLUS
4149 and NWELL
4150 and LI
4151 and-not THKOX
4152
4153 layer nsc nscbase
4154 grow 85
4155 shrink 85
4156 shrink 85
4157 grow 85
4158 or nscbase
4159 labels CONT
4160
4161 templayer pdcbase CONT
4162 and DIFF
4163 and PPLUS
4164 and NWELL
4165 and LI
4166 and-not THKOX
4167
4168 layer pdc pdcbase
4169 grow 85
4170 shrink 85
4171 shrink 85
4172 grow 85
4173 or pdcbase
4174 labels CONT
4175
4176 templayer pdcnowell CONT
4177 and DIFF
4178 and PPLUS
4179 and pfetexpand
4180 and LI
4181 and-not THKOX
4182
4183 layer pdc pdcnowell
4184 grow 85
4185 shrink 85
4186 shrink 85
4187 grow 85
4188 or pdcnowell
4189 labels CONT
4190
4191 templayer pscbase CONT
4192 and DIFF,TAP
4193 and PPLUS
4194 and-not NWELL
4195 and-not pfetexpand
4196 and LI
4197 and-not THKOX
4198
4199 layer psc pscbase
4200 grow 85
4201 shrink 85
4202 shrink 85
4203 grow 85
4204 or pscbase
4205 labels CONT
4206
4207 templayer pcbase CONT
4208 and POLY
4209 and-not DIFF
4210 and-not RPM,URPM
4211 and LI
4212
4213 layer pc pcbase
4214 grow 85
4215 shrink 85
4216 shrink 85
4217 grow 85
4218 or pcbase
4219 labels CONT
4220
4221 templayer ndicbase CONT
4222 and DIFF
4223 and NPLUS
4224 and DIODE
4225 and-not POLY
4226 and-not PPLUS
4227 and-not THKOX
4228 and-not LVTN
4229
4230 layer ndic ndicbase
4231 grow 85
4232 shrink 85
4233 shrink 85
4234 grow 85
4235 or ndicbase
4236 labels CONT
4237
4238 templayer ndilvtcbase CONT
4239 and DIFF
4240 and NPLUS
4241 and DIODE
4242 and-not POLY
4243 and-not PPLUS
4244 and-not THKOX
4245 and LVTN
4246
4247 layer ndilvtc ndilvtcbase
4248 grow 85
4249 shrink 85
4250 shrink 85
4251 grow 85
4252 or ndilvtcbase
4253 labels CONT
4254
4255 templayer pdicbase CONT
4256 and DIFF
4257 and PPLUS
4258 and DIODE
4259 and-not POLY
4260 and-not NPLUS
4261 and-not THKOX
4262 and-not LVTN
4263 and-not HVTP
4264
4265 layer pdic pdicbase
4266 grow 85
4267 shrink 85
4268 shrink 85
4269 grow 85
4270 or pdicbase
4271 labels CONT
4272
4273 templayer pdilvtcbase CONT
4274 and DIFF
4275 and PPLUS
4276 and DIODE
4277 and-not POLY
4278 and-not NPLUS
4279 and-not THKOX
4280 and LVTN
4281 and-not HVTP
4282
4283 layer pdilvtc pdilvtcbase
4284 grow 85
4285 shrink 85
4286 shrink 85
4287 grow 85
4288 or pdilvtcbase
4289 labels CONT
4290
4291 templayer pdihvtcbase CONT
4292 and DIFF
4293 and PPLUS
4294 and DIODE
4295 and-not POLY
4296 and-not NPLUS
4297 and-not THKOX
4298 and-not LVTN
4299 and HVTP
4300
4301 layer pdihvtc pdihvtcbase
4302 grow 85
4303 shrink 85
4304 shrink 85
4305 grow 85
4306 or pdihvtcbase
4307 labels CONT
4308
4309 templayer mvndcbase CONT
4310 and DIFF
4311 and NPLUS
4312 and-not NWELL
4313 and LI
4314 and THKOX
4315
4316 layer mvndc mvndcbase
4317 grow 85
4318 shrink 85
4319 shrink 85
4320 grow 85
4321 or mvndcbase
4322 labels CONT
4323
4324 templayer mvnscbase CONT
4325 and DIFF,TAP
4326 and NPLUS
4327 and NWELL
4328 and LI
4329 and THKOX
4330
4331 layer mvnsc mvnscbase
4332 grow 85
4333 shrink 85
4334 shrink 85
4335 grow 85
4336 or mvnscbase
4337 labels CONT
4338
4339 templayer mvpdcbase CONT
4340 and DIFF
4341 and PPLUS
4342 and NWELL
4343 and LI
4344 and THKOX
4345
4346 layer mvpdc mvpdcbase
4347 grow 85
4348 shrink 85
4349 shrink 85
4350 grow 85
4351 or mvpdcbase
4352 labels CONT
4353
4354 templayer mvpdcnowell CONT
4355 and DIFF
4356 and PPLUS
4357 and mvpfetexpand
4358 and MET1
4359 and THKOX
4360
4361 layer mvpdc mvpdcnowell
4362 grow 85
4363 shrink 85
4364 shrink 85
4365 grow 85
4366 or mvpdcnowell
4367 labels CONT
4368
4369 templayer mvpscbase CONT
4370 and DIFF,TAP
4371 and PPLUS
4372 and-not NWELL
4373 and-not mvpfetexpand
4374 and LI
4375 and THKOX
4376
4377 layer mvpsc mvpscbase
4378 grow 85
4379 shrink 85
4380 shrink 85
4381 grow 85
4382 or mvpscbase
4383 labels CONT
4384
4385 templayer mvndicbase CONT
4386 and DIFF
4387 and NPLUS
4388 and DIODE
4389 and-not POLY
4390 and-not PPLUS
4391 and-not LVTN
4392 and THKOX
4393
4394 layer mvndic mvndicbase
4395 grow 85
4396 shrink 85
4397 shrink 85
4398 grow 85
4399 or mvndicbase
4400 labels CONT
4401
4402 templayer nndicbase CONT
4403 and DIFF
4404 and NPLUS
4405 and DIODE
4406 and-not POLY
4407 and-not PPLUS
4408 and LVTN
4409 and THKOX
4410
4411 layer nndic nndicbase
4412 grow 85
4413 shrink 85
4414 shrink 85
4415 grow 85
4416 or nndicbase
4417 labels CONT
4418
4419 templayer mvpdicbase CONT
4420 and DIFF
4421 and PPLUS
4422 and DIODE
4423 and-not POLY
4424 and-not NPLUS
4425 and THKOX
4426
4427 layer mvpdic mvpdicbase
4428 grow 85
4429 shrink 85
4430 shrink 85
4431 grow 85
4432 or mvpdicbase
4433 labels CONT
4434
Tim Edwardsfaac36a2020-11-06 20:37:24 -05004435 layer coreli LI,LITXT,LIPIN
Tim Edwards88baa8e2020-08-30 17:03:58 -04004436 and-not LIRES,LISHORT
Tim Edwardsfaac36a2020-11-06 20:37:24 -05004437 and COREID
Tim Edwards88baa8e2020-08-30 17:03:58 -04004438 labels LI
4439 labels LITXT port
4440 labels LIPIN port
4441
Tim Edwardsfaac36a2020-11-06 20:37:24 -05004442 layer locali LI,LITXT,LIPIN
Tim Edwards88baa8e2020-08-30 17:03:58 -04004443 and-not LIRES,LISHORT
Tim Edwardsfaac36a2020-11-06 20:37:24 -05004444 and-not COREID
Tim Edwards88baa8e2020-08-30 17:03:58 -04004445 labels LI
4446 labels LITXT port
4447 labels LIPIN port
4448
4449 layer rli LI
4450 and LIRES,LISHORT
4451 labels LIRES,LISHORT
4452
4453 layer lic MCON
4454 grow 95
4455 shrink 95
4456 shrink 85
4457 grow 85
4458 or MCON
4459 labels MCON
4460
4461 layer m1 MET1,MET1TXT,MET1PIN
4462 and-not MET1RES,MET1SHORT
4463 labels MET1
4464 labels MET1TXT port
4465 labels MET1PIN port
4466
4467 layer rm1 MET1
4468 and MET1RES,MET1SHORT
4469 labels MET1RES,MET1SHORT
4470
4471 layer m1fill MET1FILL
4472 labels MET1FILL
4473
4474#ifdef MIM
4475 layer mimcap MET3
4476 and CAPM
4477 labels CAPM
4478
4479 layer mimcc VIA3
4480 and CAPM
4481 grow 60
4482 grow 40
4483 shrink 40
4484 labels CAPM
4485
4486 layer mimcap2 MET4
4487 and CAPM2
4488 labels CAPM2
4489
4490 layer mim2cc VIA4
4491 and CAPM2
4492 grow 190
4493 grow 210
4494 shrink 210
4495 labels CAPM2
4496
4497#endif (MIM)
4498
4499 templayer m2cbase VIA1
4500 grow 55
4501
4502 layer m2c m2cbase
4503 grow 30
4504 shrink 30
4505 shrink 130
4506 grow 130
4507 or m2cbase
4508
4509 layer m2 MET2,MET2TXT,MET2PIN
4510 and-not MET2RES,MET2SHORT
4511 labels MET2
4512 labels MET2TXT port
4513 labels MET2PIN port
4514
4515 layer rm2 MET2
4516 and MET2RES,MET2SHORT
4517 labels MET2RES,MET2SHORT
4518
4519 layer m2fill MET2FILL
4520 labels MET2FILL
4521
4522 templayer m3cbase VIA2
4523 grow 40
4524
4525 layer m3c m3cbase
4526 grow 60
4527 shrink 60
4528 shrink 140
4529 grow 140
4530 or m3cbase
4531
4532 layer m3 MET3,MET3TXT,MET3PIN
4533 and-not MET3RES,MET3SHORT
4534#ifdef MIM
4535 and-not CAPM
4536#endif (MIM)
4537 labels MET3
4538 labels MET3TXT port
4539 labels MET3PIN port
4540
4541 layer rm3 MET3
4542 and MET3RES,MET3SHORT
4543 labels MET3RES,MET3SHORT
4544
4545 layer m3fill MET3FILL
4546 labels MET3FILL
4547
4548#ifdef (METAL5)
4549
4550 templayer via3base VIA3
4551#ifdef MIM
4552 and-not CAPM
4553#endif (MIM)
4554 grow 60
4555
4556 layer via3 via3base
4557 grow 40
4558 shrink 40
4559 shrink 160
4560 grow 160
4561 or via3base
4562
4563 layer m4 MET4,MET4TXT,MET4PIN
4564 and-not MET4RES,MET4SHORT
4565#ifdef MIM
4566 and-not CAPM2
4567#endif (MIM)
4568 labels MET4
4569 labels MET4TXT port
4570 labels MET4PIN port
4571
4572 layer rm4 MET4
4573 and MET4RES,MET4SHORT
4574 labels MET4RES,MET4SHORT
4575
4576 layer m4fill MET4FILL
4577 labels MET4FILL
4578
4579 layer m5 MET5,MET5TXT,MET5PIN
4580 and-not MET5RES,MET5SHORT
4581 labels MET5
4582 labels MET5TXT port
4583 labels MET5PIN port
4584
4585 layer rm5 MET5
4586 and MET5RES,MET5SHORT
4587 labels MET5RES,MET5SHORT
4588
4589 layer m5fill MET5FILL
4590 labels MET5FILL
4591
4592 templayer via4base VIA4
4593#ifdef MIM
4594 and-not CAPM2
4595#endif (MIM)
4596 grow 190
4597
4598 layer via4 via4base
4599 grow 210
4600 shrink 210
4601 shrink 590
4602 grow 590
4603 or via4base
4604#endif (METAL5)
4605
4606#ifdef REDISTRIBUTION
4607 layer metrdl RDL,RDLTXT,RDLPIN
4608 labels RDL
4609 labels RDLTXT port
4610 labels RDLPIN port
4611#endif
4612
4613 # Find diffusion not covered in
4614 # NPLUS or PPLUS and pull it into
4615 # the next layer up
4616
4617 templayer gentrans DIFF
4618 and-not PPLUS
4619 and-not NPLUS
4620 and POLY
4621 copyup DIFF,POLY
4622
4623 templayer gendiff DIFF,TAP
4624 and-not PPLUS
4625 and-not NPLUS
4626 and-not POLY
4627 copyup DIFF
4628
4629 # Handle contacts found by copyup
4630
4631 templayer ndiccopy CONT
4632 and LI
4633 and DIODE
4634 and NPLUS
4635 and-not THKOX
4636
4637 layer ndic ndiccopy
4638 grow 85
4639 shrink 85
4640 shrink 85
4641 grow 85
4642 or ndiccopy
4643 labels CONT
4644
4645 templayer mvndiccopy CONT
4646 and LI
4647 and DIODE
4648 and NPLUS
4649 and THKOX
4650
4651 layer mvndic mvndiccopy
4652 grow 85
4653 shrink 85
4654 shrink 85
4655 grow 85
4656 or mvndiccopy
4657 labels CONT
4658
4659 templayer pdiccopy CONT
4660 and LI
4661 and DIODE
4662 and PPLUS
4663 and-not THKOX
4664
4665 layer pdic pdiccopy
4666 grow 85
4667 shrink 85
4668 shrink 85
4669 grow 85
4670 or pdiccopy
4671 labels CONT
4672
4673 templayer mvpdiccopy CONT
4674 and LI
4675 and DIODE
4676 and PPLUS
4677 and THKOX
4678
4679 layer mvpdic mvpdiccopy
4680 grow 85
4681 shrink 85
4682 shrink 85
4683 grow 85
4684 or mvpdiccopy
4685 labels CONT
4686
4687 templayer ndccopy CONT
4688 and ndifcheck
4689
4690 layer ndc ndccopy
4691 grow 85
4692 shrink 85
4693 shrink 85
4694 grow 85
4695 or ndccopy
4696 labels CONT
4697
4698 templayer mvndccopy CONT
4699 and mvndifcheck
4700
4701 layer mvndc mvndccopy
4702 grow 85
4703 shrink 85
4704 shrink 85
4705 grow 85
4706 or mvndccopy
4707 labels CONT
4708
4709 templayer pdccopy CONT
4710 and pdifcheck
4711
4712 layer pdc pdccopy
4713 grow 85
4714 shrink 85
4715 shrink 85
4716 grow 85
4717 or pdccopy
4718 labels CONT
4719
4720 templayer mvpdccopy CONT
4721 and mvpdifcheck
4722
4723 layer mvpdc mvpdccopy
4724 grow 85
4725 shrink 85
4726 shrink 85
4727 grow 85
4728 or mvpdccopy
4729 labels CONT
4730
4731 templayer pccopy CONT
4732 and polycheck
4733
4734 layer pc pccopy
4735 grow 85
4736 shrink 85
4737 shrink 85
4738 grow 85
4739 or pccopy
4740 labels CONT
4741
4742 templayer nsccopy CONT
4743 and nsubcheck
4744
4745 layer nsc nsccopy
4746 grow 85
4747 shrink 85
4748 shrink 85
4749 grow 85
4750 or nsccopy
4751 labels CONT
4752
4753 templayer mvnsccopy CONT
4754 and mvnsubcheck
4755
4756 layer mvnsc mvnsccopy
4757 grow 85
4758 shrink 85
4759 shrink 85
4760 grow 85
4761 or mvnsccopy
4762 labels CONT
4763
4764 templayer psccopy CONT
4765 and psubcheck
4766
4767 layer psc psccopy
4768 grow 85
4769 shrink 85
4770 shrink 85
4771 grow 85
4772 or psccopy
4773 labels CONT
4774
4775 templayer mvpsccopy CONT
4776 and mvpsubcheck
4777
4778 layer mvpsc mvpsccopy
4779 grow 85
4780 shrink 85
4781 shrink 85
4782 grow 85
4783 or mvpsccopy
4784 labels CONT
4785
4786 # Find contacts not covered in
4787 # metal and pull them into the
4788 # next layer up
4789
4790 templayer gencont CONT
4791 and LI
4792 and-not DIFF,TAP
4793 and-not POLY
4794 and-not DIODE
4795 and-not nsubcheck
4796 and-not psubcheck
4797 and-not mvnsubcheck
4798 and-not mvpsubcheck
4799 copyup CONT,LI
4800
4801 templayer barecont CONT
4802 and-not LI
4803 and-not nsubcheck
4804 and-not psubcheck
4805 and-not mvnsubcheck
4806 and-not mvpsubcheck
4807 copyup CONT
4808
4809 layer glass GLASS,PADTXT,PADPIN
4810 labels GLASS
4811 labels PADTXT port
4812 labels PADPIN port
4813
4814 templayer boundary BOUND,STDCELL,PADCELL
4815 boundary
4816
4817 layer comment LVSTEXT
4818 labels LVSTEXT text
4819
4820 layer comment TTEXT
4821 labels TTEXT text
4822
4823 layer fillblock FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4
4824 labels FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4
4825
4826# MOS Varactor
4827
4828 layer var POLY
4829 and TAP
4830 and NPLUS
4831 and NWELL
4832 and-not THKOX
4833 and-not HVTP
4834 # NOTE: Else forms a varactor that is not in the vendor netlist.
4835 and-not COREID
4836 labels POLY
4837
4838 layer varhvt POLY
4839 and TAP
4840 and NPLUS
4841 and NWELL
4842 and-not THKOX
4843 and HVTP
4844 labels POLY
4845
4846 layer mvvar POLY
4847 and TAP
4848 and NPLUS
4849 and NWELL
4850 and THKOX
4851 labels POLY
4852
4853 calma NWELL 64 20
4854 calma DIFF 65 20
4855 calma DNWELL 64 18
4856 calma PWRES 64 13
4857 calma TAP 65 44
4858 # LVTN
4859 calma LVTN 125 44
4860 # HVTR
4861 calma HVTR 18 20
4862 # HVTP
4863 calma HVTP 78 44
4864 # SONOS (TUNM)
4865 calma SONOS 80 20
4866 # NPLUS = NSDM
4867 calma NPLUS 93 44
4868 # PPLUS = PSDM
4869 calma PPLUS 94 20
4870 # HVI
4871 calma THKOX 75 20
4872 # NPC
4873 calma NPC 95 20
4874 # P+ POLY MASK
4875 calma RPM 86 20
4876 calma URPM 79 20
4877 calma LDNTM 11 44
4878 calma HVNTM 125 20
Tim Edwards3360b9e2020-09-16 11:45:19 -04004879 # Poly resistor ID mark
Tim Edwards88baa8e2020-08-30 17:03:58 -04004880 calma POLYRES 66 13
4881 # Diffusion resistor ID mark
4882 calma DIFFRES 65 13
4883 calma POLY 66 20
4884 calma POLYMOD 66 83
4885 # Diode ID mark
4886 calma DIODE 81 23
4887 # Bipolar NPN mark
4888 calma NPNID 82 20
4889 # Bipolar PNP mark
Tim Edwards862eeac2020-09-09 12:20:07 -04004890 calma PNPID 82 44
Tim Edwards88baa8e2020-08-30 17:03:58 -04004891 # Capacitor ID
4892 calma CAPID 82 64
4893 # Core area ID mark
4894 calma COREID 81 2
4895 # Standard cell ID mark
4896 calma STDCELL 81 4
4897 # Padframe cell ID mark
4898 calma PADCELL 81 3
4899 # Seal ring ID mark
4900 calma SEALID 81 1
4901 # Low tap density ID mark
4902 calma LOWTAPDENSITY 81 14
4903
4904 # LICON
4905 calma CONT 66 44
4906 calma LI 67 20
4907 calma MCON 67 44
4908
4909 calma MET1 68 20
4910 calma VIA1 68 44
4911 calma MET2 69 20
4912 calma VIA2 69 44
4913 calma MET3 70 20
4914#ifdef METAL5
4915 calma VIA3 70 44
4916 calma MET4 71 20
4917 calma VIA4 71 44
4918 calma MET5 72 20
4919#endif
4920#ifdef REDISTRIBUTION
4921 calma RDL 74 20
4922#endif
4923 calma GLASS 76 20
4924
4925 calma SUBPIN 64 59
4926 calma PADPIN 76 5
4927 calma DIFFPIN 65 6
4928 calma TAPPIN 65 5
4929 calma WELLPIN 64 5
4930 calma LIPIN 67 5
4931 calma POLYPIN 66 5
4932 calma MET1PIN 68 5
4933 calma MET2PIN 69 5
4934 calma MET3PIN 70 5
4935#ifdef METAL5
4936 calma MET4PIN 71 5
4937 calma MET5PIN 72 5
4938#endif
4939#ifdef REDISTRIBUTION
4940 calma RDLPIN 74 5
4941#endif
4942
4943 calma LIRES 67 13
4944 calma MET1RES 68 13
4945 calma MET2RES 69 13
4946 calma MET3RES 70 13
4947#ifdef METAL5
4948 calma MET4RES 71 13
4949 calma MET5RES 72 13
4950#endif
4951
4952 calma MET1FILL 68 28
4953 calma MET2FILL 69 28
4954 calma MET3FILL 70 28
4955#ifdef METAL5
4956 calma MET4FILL 71 28
4957 calma MET5FILL 72 28
4958#endif
4959
4960 calma POLYSHORT 66 15
4961 calma LISHORT 67 15
4962 calma MET1SHORT 68 15
4963 calma MET2SHORT 69 15
4964 calma MET3SHORT 70 15
4965#ifdef METAL5
4966 calma MET4SHORT 71 15
4967 calma MET5SHORT 72 15
4968#endif
4969
4970 calma SUBTXT 122 16
4971 calma PADTXT 76 16
4972 calma DIFFTXT 65 16
4973 calma POLYTXT 66 16
4974 calma WELLTXT 64 16
4975 calma LITXT 67 16
4976 calma MET1TXT 68 16
4977 calma MET2TXT 69 16
4978 calma MET3TXT 70 16
4979#ifdef METAL5
4980 calma MET4TXT 71 16
4981 calma MET5TXT 72 16
4982#endif
4983#ifdef REDISTRIBUTION
4984 calma RDLPIN 74 16
4985#endif
4986
4987 calma BOUND 235 4
4988
4989 calma LVSTEXT 83 44
4990
4991#ifdef (MIM)
4992 calma CAPM 89 44
4993 calma CAPM2 97 44
4994#endif (MIM)
4995
4996 calma FILLOBSM1 62 24
4997 calma FILLOBSM2 105 52
4998 calma FILLOBSM3 107 24
4999 calma FILLOBSM4 112 4
5000
5001end
5002
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005003#-----------------------------------------------------
5004# Digital flow maze router cost parameters
5005#-----------------------------------------------------
5006
5007mzrouter
5008end
5009
5010#-----------------------------------------------------
5011# Vendor DRC rules
5012#-----------------------------------------------------
5013
5014drc
5015
5016 style drc variants (fast),(full),(routing)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005017 scalefactor 10
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005018 cifstyle drc
5019
5020 variants (fast),(full)
5021
5022#-----------------------------
5023# DNWELL
5024#-----------------------------
5025
Tim Edwards96c1e832020-09-16 11:42:16 -04005026 width dnwell 3000 "Deep N-well width < %d (dnwell.2)"
5027 spacing dnwell dnwell 6300 touching_ok "Deep N-well spacing < %d (dnwell.3)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005028 spacing dnwell allnwell 4500 surround_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005029 "Deep N-well spacing to N-well < %d (nwell.7)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005030
5031 variants (full)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005032 cifmaxwidth nwell_missing 0 bend_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005033 "N-well overlap of Deep N-well < 0.4um outside, 1.03um inside (nwell.5a, 7)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005034 cifmaxwidth dnwell_missing 0 bend_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005035 "SONOS nFET must be in Deep N-well (tunm.6a)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005036
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005037 cifmaxwidth pdiff_crosses_dnwell 0 bend_illegal \
5038 "P+ diff cannot straddle Deep N-well (dnwell.5)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005039 variants (fast),(full)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005040
5041#-----------------------------
5042# NWELL
5043#-----------------------------
5044
Tim Edwards96c1e832020-09-16 11:42:16 -04005045 width allnwell 840 "N-well width < %d (nwell.1)"
5046 spacing allnwell allnwell 1270 touching_ok "N-well spacing < %d (nwell.2a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005047
Tim Edwardse6a454b2020-10-17 22:52:39 -04005048 variants (full)
5049 cifmaxwidth nwell_missing_tap 0 bend_illegal \
5050 "All nwells must contain metal-connected N+ taps (nwell.4)"
5051 variants (fast),(full)
5052
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005053#-----------------------------
5054# DIFF
5055#-----------------------------
5056
Tim Edwards363c7e02020-11-03 14:26:29 -05005057 width *ndiff,nfet,scnfet,npd,npass,*nsd,*ndiode,ndiffres,*pdiff,pfet,scpfet,scpfethvt,ppu,*psd,*pdiode,pdiffres \
Tim Edwards96c1e832020-09-16 11:42:16 -04005058 150 "Diffusion width < %d (diff/tap.1)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005059 width *mvndiff,mvnfet,mvnnfet,*mvndiode,*nndiode,mvndiffres,*mvpdiff,mvpfet,*mvpdiode 290 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005060 "MV Diffusion width < %d (diff/tap.14)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005061
Tim Edwards96c1e832020-09-16 11:42:16 -04005062 width *mvnsd,*mvpsd 150 "MV Tap width < %d (diff/tap.1)"
5063 extend *mvpsd *mvndiff 700 "MV Butting tap length < %d (diff/tap.16)"
5064 extend *mvnsd *mvpdiff 700 "MV Butting tap length < %d (diff/tap.16)"
5065 extend *psd *ndiff 290 "Butting tap length < %d (diff/tap.4)"
5066 extend *nsd *pdiff 290 "Butting tap length < %d (diff/tap.4)"
5067 width mvpdiffres 150 "MV P-Diffusion resistor width < %d (diff/tap.14a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005068 spacing alldifflv,var,varhvt alldifflv,var,varhvt 270 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005069 "Diffusion spacing < %d (diff/tap.3)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005070 spacing alldiffmvnontap,mvvar alldiffmvnontap,mvvar 300 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005071 "MV Diffusion spacing < %d (diff/tap.15a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005072 spacing alldiffmv *mvnsd,*mvpsd 270 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005073 "MV Diffusion to MV tap spacing < %d (diff/tap.3)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005074 spacing *mvndiff,mvnfet,mvnnfet,*mvndiode,*nndiode,mvndiffres,mvvar *mvpsd 370 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005075 touching_ok "MV P-Diffusion to MV N-tap spacing < %d (diff/tap.15b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005076 spacing *mvnsd,*mvpdiff,mvpfet,mvvar,*mvpdiode *mvpsd,*psd 760 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005077 "MV Diffusion in N-well to P-tap spacing < %d (diff/tap.20 + diff/tap.17,19)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005078 spacing *ndiff,*ndiode,nfet allnwell 340 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005079 "N-Diffusion spacing to N-well < %d (diff/tap.9)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005080 spacing *mvndiff,*mvndiode,mvnfet,mvnnfet allnwell 340 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005081 "N-Diffusion spacing to N-well < %d (diff/tap.9)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005082 spacing *psd allnwell 130 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005083 "P-tap spacing to N-well < %d (diff/tap.11)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005084 spacing *mvpsd allnwell 130 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005085 "P-tap spacing to N-well < %d (diff/tap.11)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005086 surround *nsd allnwell 180 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005087 "N-well overlap of N-tap < %d (diff/tap.10)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005088 surround *mvnsd allnwell 330 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005089 "N-well overlap of MV N-tap < %d (diff/tap.19)"
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04005090 surround *pdiff,*pdiode,pfet,scpfet,ppu allnwell 180 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005091 "N-well overlap of P-Diffusion < %d (diff/tap.8)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005092 surround *mvpdiff,*mvpdiode,mvpfet allnwell 330 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005093 "N-well overlap of P-Diffusion < %d (diff/tap.17)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005094 surround mvvar allnwell 560 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005095 "N-well overlap of MV varactor < %d (lvtn.10 + lvtn.4b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005096 spacing *mvndiode *mvndiode 1070 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005097 "MV N-diode spacing < %d (hvntm.2 + 2 * hvntm.3)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005098
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005099 spacing allnfets allpactivenonfet 270 touching_illegal \
5100 "nFET cannot abut P-diffusion (diff/tap.3)"
5101 spacing allpfets allnactivenonfet 270 touching_illegal \
5102 "pFET cannot abut N-diffusion (diff/tap.3)"
5103
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005104 # Butting junction rules
5105 edge4way (*psd)/a ~(*ndiff,*psd)/a 125 ~(*ndiff)/a (*ndiff)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005106 "N-Diffusion to P-tap spacing < %d across butted junction (psd.5b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005107 edge4way (*ndiff)/a ~(*ndiff,*psd)/a 125 ~(*psd)/a (*psd)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005108 "N-Diffusion to P-tap spacing < %d across butted junction (psd.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005109 edge4way (*nsd)/a ~(*pdiff,*nsd)/a 125 ~(*pdiff)/a (*pdiff)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005110 "P-Diffusion to N-tap spacing < %d across butted junction (nsd.5b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005111 edge4way (*pdiff)/a ~(*pdiff,*nsd)/a 125 ~(*nsd)/a (*nsd)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005112 "P-Diffusion to N-tap spacing < %d across butted junction (nsd.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005113
5114 edge4way (*mvpsd)/a ~(*mvndiff,*mvpsd)/a 125 ~(*mvndiff)/a (*mvndiff)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005115 "MV N-Diffusion to MV P-tap spacing < %d across butted junction (psd.5b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005116 edge4way (*mvndiff)/a ~(*mvndiff,*mvpsd)/a 125 ~(*mvpsd)/a (*mvpsd)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005117 "MV N-Diffusion to MV P-tap spacing < %d across butted junction (psd.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005118 edge4way (*mvnsd)/a ~(*mvpdiff,*mvnsd)/a 125 ~(*mvpdiff)/a (*mvpdiff)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005119 "MV P-Diffusion to MV N-tap spacing < %d across butted junction (nsd.5b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005120 edge4way (*mvpdiff)/a ~(*mvpdiff,*mvnsd)/a 125 ~(*mvnsd)/a (*mvnsd)/a 125 \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005121 "MV P-Diffusion to MV N-tap spacing < %d across butted junction (nsd.5a)"
5122
5123 # Sandwiched butting junction restrictions
Tim Edwards281a8822020-11-04 13:34:27 -05005124 edge4way (*pdiff)/a (*nsd)/a 400 ~(*pdiff)/a 0 0 "NSDM width < %d (diff/tap.5)"
5125 edge4way (*ndiff)/a (*psd)/a 400 ~(*ndiff)/a 0 0 "PSDM width < %d (diff/tap.5)"
5126
5127 angles allactive 90 "Only 90 degree angles permitted on diff and tap (x.2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005128
5129 variants (full)
5130
5131 # Latchup rules
5132 cifmaxwidth ptap_missing 0 bend_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005133 "N-diff distance to P-tap must be < 15.0um (LU.2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005134 cifmaxwidth dptap_missing 0 bend_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005135 "N-diff distance to P-tap in deep nwell.must be < 15.0um (LU.2.1)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005136 cifmaxwidth ntap_missing 0 bend_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005137 "P-diff distance to N-tap must be < 15.0um (LU.3)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005138
Tim Edwardse6a454b2020-10-17 22:52:39 -04005139 variants (fast),(full)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005140
5141#-----------------------------
5142# POLY
5143#-----------------------------
5144
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005145 width allpoly 150 "poly width < %d (poly.1a)"
5146 spacing allpoly allpoly 210 touching_ok "poly spacing < %d (poly.2)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005147
5148 spacing allpolynonfet \
5149 *ndif,*ndiode,*nndiode,ndiffres,*ndiodelvt,*pdif,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt \
5150 75 corner_ok allfets \
5151 "poly spacing to Diffusion < %d (poly.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005152 spacing npres *nsd 480 touching_illegal \
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005153 "poly resistor spacing to N-tap < %d (poly.9)"
Tim Edwards363c7e02020-11-03 14:26:29 -05005154 overhang *ndiff,rndiff nfet,scnfet,npd,npass 250 "N-Diffusion overhang of nFET < %d (poly.7)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005155 overhang *mvndiff,mvrndiff mvnfet,mvnnfet 250 \
Tim Edwards363c7e02020-11-03 14:26:29 -05005156 "N-Diffusion overhang of nFET < %d (poly.7)"
Tim Edwards96c1e832020-09-16 11:42:16 -04005157 overhang *pdiff,rpdiff pfet,scpfet,ppu 250 "P-Diffusion overhang of pmos < %d (poly.7)"
5158 overhang *mvpdiff,mvrpdiff mvpfet 250 "P-Diffusion overhang of pmos < %d (poly.7)"
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005159 overhang *poly allfets 130 "poly overhang of transistor < %d (poly.8)"
Tim Edwards96c1e832020-09-16 11:42:16 -04005160 rect_only allfets "No bends in transistors (poly.11)"
5161 rect_only xhrpoly,uhrpoly "No bends in poly resistors (poly.11)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005162 extend xpc/a xhrpoly,uhrpoly 2160 \
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005163 "poly contact extends poly resistor by < %d (licon.1c + li.5)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005164 spacing xhrpoly,uhrpoly,xpc xhrpoly,uhrpoly,xpc 1240 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005165 "Distance between precision resistors < %d (rpm.2 + 2 * rpm.3)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005166
Tim Edwardse6a454b2020-10-17 22:52:39 -04005167 spacing xhrpoly,uhrpoly,xpc allndifflv,allndiffmv 780 touching_illegal \
5168 "Distance from precision resistor to N+ diffusion < %d (rpm.3 + rpm.6 + nsd.5a)"
5169 spacing xhrpoly,uhrpoly,xpc *poly 400 touching_illegal \
5170 "Distance from precision resistor to unrelated poly < %d (rpm.3 + rpm.7)"
5171 spacing xhrpoly,uhrpoly,xpc allndiffmvnontap 830 touching_illegal \
5172 "Distance from precision resistor to MV N+ diffusion < %d (rpm.3 + rpm.9)"
5173
Tim Edwards281a8822020-11-04 13:34:27 -05005174 angles allpoly 90 "Only 90 degree angles permitted on poly (x.2)"
5175
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005176#--------------------------------------------------------------------
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005177# HVTP
5178#--------------------------------------------------------------------
5179
Tim Edwards363c7e02020-11-03 14:26:29 -05005180 spacing pfethvt,pdiodehvt,varactorhvt pfet,ppu,scpfet,mvpfet,pfetlvt,pfetmvt \
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005181 360 touching_illegal \
5182 "Min. spacing between pFET and HVTP < %d (hvtp.4)"
5183
Tim Edwards363c7e02020-11-03 14:26:29 -05005184 spacing pfethvt,pdiodehvt,varactorhvt varactor 360 touching_illegal \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005185 "Min. spacing between varactor and HVTP < %d (hvtp.4 + varac.3)"
5186
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005187#--------------------------------------------------------------------
5188# LVTN
5189#--------------------------------------------------------------------
5190
Tim Edwards363c7e02020-11-03 14:26:29 -05005191 spacing pfetlvt,nfetlvt,pdiodelvt,ndiodelvt \
5192 allfetsnolvt 360 touching_illegal \
5193 "Min. spacing between FET and LVTN < %d (lvtn.3a)"
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005194
Tim Edwards363c7e02020-11-03 14:26:29 -05005195 spacing pfetlvt,nfetlvt,pdiodelvt,ndiodelvt scpfethvt,pfethvt,pdiodehvt,varactorhvt \
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005196 740 touching_illegal \
Tim Edwards363c7e02020-11-03 14:26:29 -05005197 "Min. spacing between LVTN and HVTP < %d (lvtn.9)"
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005198
5199 # Spacing across S/D direction requires edge rule
Tim Edwards363c7e02020-11-03 14:26:29 -05005200 edge4way allfetsnolvt allactivenonfet 415 \
5201 ~(pfetlvt,nfetlvt,pdiodelvt,ndiodelvt)/a allfetsnolvt 415 \
5202 "Min. spacing between FET and LVTN in S/D direction < %d (lvtn.3b)"
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005203
5204#--------------------------------------------------------------------
5205# NPC (Nitride poly Cut)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005206#--------------------------------------------------------------------
5207
5208# Layer NPC is defined automatically around poly contacts (grow 0.1um)
5209
5210#--------------------------------------------------------------------
5211# CONT (LICON, contact between poly/diff and LI)
5212#--------------------------------------------------------------------
5213
Tim Edwards96c1e832020-09-16 11:42:16 -04005214 width ndc/li 170 "N-diffusion contact width < %d (licon.1)"
5215 width nsc/li 170 "N-tap contact width < %d (licon.1)"
5216 width pdc/li 170 "P-diffusion contact width < %d (licon.1)"
5217 width psc/li 170 "P-tap contact width < %d (licon.1)"
5218 width ndic/li 170 "N-diode contact width < %d (licon.1)"
5219 width pdic/li 170 "P-diode contact width < %d (licon.1)"
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005220 width pc/li 170 "poly contact width < %d (licon.1)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005221
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005222 width xpc/li 350 "poly resistor contact width < %d (licon.1b + 2 * li.5)"
5223 area xpc/li 700000 350 "poly resistor contact length < 2.0um (licon.1c)"
5224 area allli,*obsli 56100 170 "Local interconnect minimum area < %a (li.6)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005225
Tim Edwards96c1e832020-09-16 11:42:16 -04005226 width mvndc/li 170 "N-diffusion contact width < %d (licon.1)"
5227 width mvnsc/li 170 "N-tap contact width < %d (licon.1)"
5228 width mvpdc/li 170 "P-diffusion contact width < %d (licon.1)"
5229 width mvpsc/li 170 "P-tap contact width < %d (licon.1)"
5230 width mvndic/li 170 "N-diode contact width < %d (licon.1)"
5231 width mvpdic/li 170 "P-diode contact width < %d (licon.1)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005232
5233 spacing allpdiffcont allndiffcont 170 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005234 "Diffusion contact spacing < %d (licon.2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005235 spacing allndiffcont allndiffcont 170 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005236 "Diffusion contact spacing < %d (licon.2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005237 spacing allpdiffcont allpdiffcont 170 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005238 "Diffusion contact spacing < %d (licon.2)"
5239 spacing pc pc 170 touching_ok "Poly1 contact spacing < %d (licon.2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005240
5241 spacing pc alldiff 190 touching_illegal \
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005242 "poly contact spacing to diffusion < %d (licon.14)"
5243 spacing pc allpdifflv,allpdiffmv 235 touching_illegal \
5244 "poly contact spacing to P-diffusion < %d (licon.9 + psdm.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005245
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005246 spacing ndc,pdc nfet,nfetlvt,pfet,pfethvt,pfetlvt,pfetmvt 55 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005247 "Diffusion contact to gate < %d (licon.11)"
Tim Edwards363c7e02020-11-03 14:26:29 -05005248 spacing ndc,pdc scnfet,npd,npass,scpfet,scpfethvt,ppu 50 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005249 "Diffusion contact to standard cell gate < %d (licon.11)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005250 spacing mvndc,mvpdc mvnfet,mvnnfet,mvpfet 55 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005251 "Diffusion contact to gate < %d (licon.11)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005252 spacing ndc,mvndc rnd,mvrnd 60 touching_illegal "Diffusion contact to rndiff < %d ()"
5253 spacing pdc,mvpdc rdp,mvrdp 60 touching_illegal "Diffusion contact to rndiff < %d ()"
5254 spacing nsc varactor,varhvt 250 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005255 "Diffusion contact to varactor gate < %d (licon.10)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005256 spacing mvnsc mvvar 250 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005257 "Diffusion contact to varactor gate < %d (licon.10)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005258
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04005259 surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005260 "N-diffusion overlap of N-diffusion contact < %d (licon.5a)"
Tim Edwards363c7e02020-11-03 14:26:29 -05005261 surround pdc/a *pdiff,pfet,scpfet,scpfethvt,ppu,pfethvt,pfetmvt,pfetlvt 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005262 "P-diffusion overlap of P-diffusion contact < %d (licon.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005263 surround ndic/a *ndi 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005264 "N-diode overlap of N-diode contact < %d (licon.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005265 surround pdic/a *pdi 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005266 "P-diode overlap of N-diode contact < %d (licon.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005267
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005268 spacing psc/a allnactivenontap 60 touching_illegal \
5269 "Min. space between P-tap contact and butting N diffusion < %d (licon.5b)"
5270 spacing nsc/a allpactivenontap 60 touching_illegal \
5271 "Min. space between N-tap contact and butting P diffusion < %d (licon.5b)"
5272
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04005273 surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005274 "N-diffusion overlap of N-diffusion contact < %d in one direction (licon.5c)"
Tim Edwards363c7e02020-11-03 14:26:29 -05005275 surround pdc/a *pdiff,pfet,scpfet,scpfethvt,ppu,pfethvt,pfetmvt,pfetlvt 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005276 "P-diffusion overlap of P-diffusion contact < %d in one direction (licon.5c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005277 surround ndic/a *ndi 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005278 "N-diode overlap of N-diode contact < %d in one direction (licon.5c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005279 surround pdic/a *pdi 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005280 "P-diode overlap of N-diode contact < %d in one direction (licon.5c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005281
5282 surround nsc/a *nsd 120 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005283 "N-tap overlap of N-tap contact < %d in one direction (licon.7)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005284 surround psc/a *psd 120 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005285 "P-tap overlap of P-tap contact < %d in one direction (licon.7)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005286
5287 surround mvndc/a *mvndiff,mvnfet 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005288 "N-diffusion overlap of N-diffusion contact < %d (licon.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005289 surround mvpdc/a *mvpdiff,mvpfet 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005290 "P-diffusion overlap of P-diffusion contact < %d (licon.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005291 surround mvndic/a *mvndi 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005292 "N-diode overlap of N-diode contact < %d (licon.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005293 surround mvpdic/a *mvpdi 40 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005294 "P-diode overlap of N-diode contact < %d (licon.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005295
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005296 spacing mvpsc/a allndiffmvnontap 60 touching_illegal \
5297 "Min. space between P-tap contact and butting N diffusion < %d (licon.5b)"
5298 spacing mvnsc/a allpdiffmvnontap 60 touching_illegal \
5299 "Min. space between N-tap contact and butting P diffusion < %d (licon.5b)"
5300
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005301 surround mvndc/a *mvndiff,mvnfet 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005302 "N-diffusion overlap of N-diffusion contact < %d in one direction (licon.5c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005303 surround mvpdc/a *mvpdiff,mvpfet 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005304 "P-diffusion overlap of P-diffusion contact < %d in one direction (licon.5c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005305 surround mvndic/a *mvndi 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005306 "N-diode overlap of N-diode contact < %d in one direction (licon.5c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005307 surround mvpdic/a *mvpdi 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005308 "P-diode overlap of N-diode contact < %d in one direction (licon.5c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005309
5310 surround mvnsc/a *mvnsd 120 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005311 "N-tap overlap of N-tap contact < %d in one direction (licon.7)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005312 surround mvpsc/a *mvpsd 120 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005313 "P-tap overlap of P-tap contact < %d in one direction (licon.7)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005314
5315 surround pc/a *poly,mrp1,xhrpoly,uhrpoly 50 absence_illegal \
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005316 "poly overlap of poly contact < %d (licon.8)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005317 surround pc/a *poly,mrp1,xhrpoly,uhrpoly 80 directional \
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005318 "poly overlap of poly contact < %d in one direction (licon.8a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005319
Tim Edwards281a8822020-11-04 13:34:27 -05005320 exact_overlap (allcont)/a
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005321
5322#-------------------------------------------------------------
5323# LI - Local interconnect layer
5324#-------------------------------------------------------------
5325
Tim Edwardse6a454b2020-10-17 22:52:39 -04005326variants *
5327
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005328 width *li 170 "Local interconnect width < %d (li.1)"
5329 width rli 290 "Local interconnect width < %d (li.7)"
Tim Edwards96c1e832020-09-16 11:42:16 -04005330 width coreli 140 "Core local interconnect width < %d (li.c1)"
5331 spacing allli allli,*obsli 170 touching_ok "Local interconnect spacing < %d (li.3)"
5332 spacing coreli allli,*obsli 140 touching_ok "Core local interconnect spacing < %d (li.c2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005333
5334 surround pc/li *li 80 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005335 "Local interconnect overlap of poly contact < %d in one direction (li.5)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005336
5337 surround ndc/li,nsc/li,pdc/li,psc/li,ndic/li,pdic/li,mvndc/li,mvnsc/li,mvpdc/li,mvpsc/li,mvndic/li,mvpdic/li \
5338 *li,rli 80 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005339 "Local interconnect overlap of diffusion contact < %d in one direction (li.5)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005340
Tim Edwards96c1e832020-09-16 11:42:16 -04005341 area allli,*obsli 56100 170 "Local interconnect minimum area < %a (li.6)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005342
Tim Edwards281a8822020-11-04 13:34:27 -05005343 angles allli 90 "Only 90 degree angles permitted on local interconnect (x.2)"
5344
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005345#-------------------------------------------------------------
5346# MCON - Contact between local interconnect and metal1
5347#-------------------------------------------------------------
5348
Tim Edwards96c1e832020-09-16 11:42:16 -04005349 width lic/m1 170 "mcon.width < %d (mcon.1)"
Tim Edwards5b50e7a2020-10-17 17:31:49 -04005350 spacing lic/m1 lic/m1,obslic/m1 190 touching_ok "mcon.spacing < %d (mcon.2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005351
Tim Edwards281a8822020-11-04 13:34:27 -05005352 exact_overlap lic/li
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005353
5354#-------------------------------------------------------------
5355# METAL1 -
5356#-------------------------------------------------------------
5357
Tim Edwards96c1e832020-09-16 11:42:16 -04005358 width *m1,rm1 140 "Metal1 width < %d (met1.1)"
5359 spacing allm1 allm1,*obsm1 140 touching_ok "Metal1 spacing < %d (met1.2)"
5360 area allm1,*obsm1 83000 140 "Metal1 minimum area < %a (met1.6)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005361
5362 surround lic/m1 *met1 30 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005363 "Metal1 overlap of local interconnect contact < %d (met1.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005364 surround lic/m1 *met1 60 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005365 "Metal1 overlap of local interconnect contact < %d in one direction (met1.5)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005366
Tim Edwards281a8822020-11-04 13:34:27 -05005367 angles allm1 45 "Only 45 and 90 degree angles permitted on metal1 (x.3a)"
5368
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005369variants (fast),(full)
5370 widespacing allm1 3000 allm1,*obsm1 280 touching_ok \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005371 "Metal1 > 3um spacing to unrelated m1 < %d (met1.3b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005372 widespacing *obsm1 3000 allm1 280 touching_ok \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005373 "Metal1 > 3um spacing to unrelated m1 < %d (met1.3b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005374
5375variants (full)
5376 cifmaxwidth m1_hole_empty 0 bend_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005377 "Min area of metal1 holes > 0.14um^2 (met1.7)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005378
5379 cifspacing m1_large_halo m1_large_halo 280 touching_ok \
5380 "Spacing of metal1 features attached to and within 0.28um of large metal1 < %d (met1.3a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005381variants *
5382
5383#--------------------------------------------------
5384# VIA1
5385#--------------------------------------------------
5386
Tim Edwards96c1e832020-09-16 11:42:16 -04005387 width v1/m1 260 "Via1 width < %d (via.1a + 2 * via.4a)"
5388 spacing v1 v1 60 touching_ok "Via1 spacing < %d (via.2 - 2 * via.4a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005389 surround v1/m1 *m1 30 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005390 "Metal1 overlap of Via1 < %d in one direction (via.5a - via.4a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005391 surround v1/m2 *m2 30 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005392 "Metal2 overlap of Via1 < %d in one direction (met2.5 - met2.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005393
Tim Edwards281a8822020-11-04 13:34:27 -05005394 exact_overlap v1/m1
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005395
5396#--------------------------------------------------
5397# METAL2 -
5398#--------------------------------------------------
5399
Tim Edwards96c1e832020-09-16 11:42:16 -04005400 width allm2 140 "Metal2 width < %d (met2.1)"
5401 spacing allm2 allm2,obsm2 140 touching_ok "Metal2 spacing < %d (met2.2)"
5402 area allm2,obsm2 67600 140 "Metal2 minimum area < %a (met2.6)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005403
Tim Edwards281a8822020-11-04 13:34:27 -05005404 angles allm2 45 "Only 45 and 90 degree angles permitted on metal2 (x.3a)"
5405
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005406variants (fast),(full)
5407 widespacing allm2 3000 allm2,obsm2 280 touching_ok \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005408 "Metal2 > 3um spacing to unrelated m2 < %d (met2.3b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005409 widespacing obsm2 3000 allm2 280 touching_ok \
Tim Edwardse6a454b2020-10-17 22:52:39 -04005410 "Metal2 > 3um spacing to unrelated m2 < %d (met2.3b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005411
5412variants (full)
5413 cifmaxwidth m2_hole_empty 0 bend_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005414 "Min area of metal2 holes > 0.14um^2 (met2.7)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005415
5416 cifspacing m2_large_halo m2_large_halo 280 touching_ok \
5417 "Spacing of metal2 features attached to and within 0.28um of large metal2 < %d (met2.3a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005418variants *
5419
5420#--------------------------------------------------
5421# VIA2
5422#--------------------------------------------------
5423
Tim Edwards96c1e832020-09-16 11:42:16 -04005424 width v2/m2 280 "via2.width < %d (via2.1a + 2 * via2.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005425
Tim Edwards96c1e832020-09-16 11:42:16 -04005426 spacing v2 v2 120 touching_ok "via2.spacing < 0.24um (via2.2 - 2 * via2.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005427
5428 surround v2/m2 *m2 45 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005429 "Metal2 overlap of via2.< %d in one direction (via2.4a - via2.4)"
5430 surround v2/m3 *m3 25 absence_illegal "Metal3 overlap of via2.< %d (met3.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005431
5432 exact_overlap v2/m2
5433
5434#--------------------------------------------------
5435# METAL3 -
5436#--------------------------------------------------
5437
Tim Edwards96c1e832020-09-16 11:42:16 -04005438 width allm3 300 "Metal3 width < %d (met3.1)"
5439 spacing allm3 allm3,obsm3 300 touching_ok "Metal3 spacing < %d (met3.2)"
5440 area allm3,obsm3 240000 300 "Metal3 minimum area < %a (met3.6)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005441
Tim Edwards281a8822020-11-04 13:34:27 -05005442 angles allm3 45 "Only 45 and 90 degree angles permitted on metal3 (x.3a)"
5443
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005444variants (fast),(full)
5445 widespacing allm3 3000 allm3,obsm3 400 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005446 "Metal3 > 3um spacing to unrelated m3 < %d (met3.3d)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005447 widespacing obsm3 3000 allm3 400 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005448 "Metal3 > 3um spacing to unrelated m3 < %d (met3.3d)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005449 cifspacing m3_large_halo m3_large_halo 400 touching_ok \
5450 "Spacing of metal3 features attached to and within 0.40um of large metal3 < %d (met3.3c)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005451variants *
5452
5453
5454#ifdef METAL5
Tim Edwardseba70cf2020-08-01 21:08:46 -04005455#undef METAL5
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005456#--------------------------------------------------
5457# VIA3 - Requires METAL5 Module
5458#--------------------------------------------------
5459
Tim Edwards96c1e832020-09-16 11:42:16 -04005460 width v3/m3 320 "via3.width < %d (via3.1 + 2 * via3.4)"
5461 spacing v3 v3 80 touching_ok "via3.spacing < %d (via3.2 - 2 * via3.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005462 surround v3/m3 *m3 30 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005463 "Metal3 overlap of via3.in one direction < %d (via3.5 - via3.4)"
Tim Edwardsba66a982020-07-13 13:33:41 -04005464 surround v3/m4 *m4 5 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005465 "Metal4 overlap of via3.< %d (met4.3 - via3.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005466
5467 exact_overlap v3/m3
5468
5469#-----------------------------
5470# METAL4 - METAL4 Module
5471#-----------------------------
5472
5473variants *
5474
Tim Edwards96c1e832020-09-16 11:42:16 -04005475 width allm4 300 "Metal4 width < %d (met4.1)"
5476 spacing allm4 allm4,obsm4 300 touching_ok "Metal4 spacing < %d (met4.2)"
5477 area allm4,obsm4 240000 300 "Metal4 minimum area < %a (met4.4a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005478
Tim Edwards281a8822020-11-04 13:34:27 -05005479 angles allm4 45 "Only 45 and 90 degree angles permitted on metal4 (x.3a)"
5480
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005481variants (fast),(full)
5482 widespacing allm4 3000 allm4,obsm4 400 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005483 "Metal4 > 3um spacing to unrelated m4 < %d (met4.5b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005484 widespacing obsm4 3000 allm4 400 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005485 "Metal4 > 3um spacing to unrelated m4 < %d (met4.5b)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005486 cifspacing m4_large_halo m4_large_halo 400 touching_ok \
5487 "Spacing of metal4 features attached to and within 0.40um of large metal4 < %d (met4.5a)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005488variants *
5489
5490#--------------------------------------------------
5491# VIA4 - Requires METAL5 Module
5492#--------------------------------------------------
5493
Tim Edwards96c1e832020-09-16 11:42:16 -04005494 width v4/m4 1180 "via4.width < %d (via4.1 + 2 * via4.4)"
5495 spacing v4 v4 420 touching_ok "via4.spacing < %d (via4.2 - 2 * via4.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005496 surround v4/m5 *m5 120 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005497 "Metal5 overlap of via4.< %d (met5.3 - via4.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005498
5499 exact_overlap v4/m4
5500
5501#-----------------------------
5502# METAL5 - METAL5 Module
5503#-----------------------------
5504
Tim Edwards96c1e832020-09-16 11:42:16 -04005505 width allm5 1600 "Metal5 width < %d (met5.1)"
5506 spacing allm5 allm5,obsm5 1600 touching_ok "Metal5 spacing < %d (met5.2)"
5507 area allm5,obsm5 4000000 1600 "Metal5 minimum area < %a (met5.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005508
Tim Edwards281a8822020-11-04 13:34:27 -05005509 angles allm5 45 "Only 45 and 90 degree angles permitted on metal5 (x.3a)"
5510
Tim Edwardseba70cf2020-08-01 21:08:46 -04005511#define METAL5
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005512#endif (METAL5)
5513
5514#ifdef REDISTRIBUTION
5515
5516variants (full)
5517
Tim Edwards96c1e832020-09-16 11:42:16 -04005518 width metrdl 10000 "RDL width < %d (rdl.1)"
5519 spacing metrdl metrdl 10000 touching_ok "RDL spacing < %d (rdl.2)"
5520 surround glass metrdl 10750 absence_ok "RDL must surround glass cut by %d (rdl.3)"
5521 spacing metrdl padl 19660 surround_ok "RDL spacing to unrelated pad < %d (rdl.6)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005522
Tim Edwardse6a454b2020-10-17 22:52:39 -04005523variants (fast),(full)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005524
5525#endif (REDISTRIBUTION)
5526
5527#--------------------------------------------------
5528# NMOS, PMOS
5529#--------------------------------------------------
5530
Tim Edwardse6a454b2020-10-17 22:52:39 -04005531 edge4way *poly allfetsstd 420 allfets 0 0 \
5532 "Transistor width < %d (diff/tap.2)"
5533 edge4way *poly allfetsspecial 360 allfets 0 0 \
5534 "Transistor in standard cell width < %d (diff/tap.2)"
5535
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005536 # Except: Note that standard cells allow transistor width minimum 0.36um
Tim Edwards96c1e832020-09-16 11:42:16 -04005537 width pfetlvt 350 "LVT PMOS gate length < %d (poly.1b)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005538
Tim Edwardse6a454b2020-10-17 22:52:39 -04005539 spacing allpolynonfet *nsd 55 corner_ok varactor \
5540 "poly spacing to diffusion tap < %d (poly.5)"
5541 spacing allpolynonfet *mvnsd 55 corner_ok mvvaractor \
5542 "poly spacing to diffusion tap < %d (poly.5)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005543
Tim Edwards859ff4b2020-10-18 14:59:38 -04005544 edge4way *psd *ndiff 300 ~(nfet,npass,npd,scnfet,nfetlvt,nsonos)/a *psd 300 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005545 "Butting P-tap spacing to NMOS gate < %d (poly.6)"
Tim Edwards363c7e02020-11-03 14:26:29 -05005546 edge4way *nsd *pdiff 300 ~(pfet,ppu,scpfet,scpfethvt,pfetlvt,pfetmvt)/a *nsd 300 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005547 "Butting N-tap spacing to PMOS gate < %d (poly.6)"
Tim Edwards859ff4b2020-10-18 14:59:38 -04005548 edge4way *mvpsd *mvndiff 300 ~(mvnfet,mvnnfet)/a *mvpsd 300 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005549 "Butting MV P-tap spacing to MV NMOS gate < %d (poly.6)"
Tim Edwards859ff4b2020-10-18 14:59:38 -04005550 edge4way *mvnsd *mvpdiff 300 ~mvpfet/a *mvnsd 300 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005551 "Butting MV N-tap spacing to MV PMOS gate < %d (poly.6)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005552
5553 # No LV FETs in HV diff
Tim Edwards363c7e02020-11-03 14:26:29 -05005554 spacing pfet,scpfet,scpfethvt,ppu,pfetlvt,pfetmvt,pfethvt,*pdiff *mvpdiff 360 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005555 "LV P-diffusion to MV P-diffusion < %d (diff/tap.23 + diff/tap.22)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005556
Tim Edwards5ebe4cf2020-07-31 15:56:02 -04005557 spacing nfet,scnfet,npd,npass,nfetlvt,varactor,varhvt,*ndiff *mvndiff 360 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005558 "LV N-diffusion to MV N-diffusion < %d (diff/tap.23 + diff/tap.22)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005559
5560 # No HV FETs in LV diff
5561 spacing mvpfet,*mvpdiff *pdiff 360 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005562 "MV P-diffusion to LV P-diffusion < %d (diff/tap.23 + diff/tap.22)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005563
5564 spacing mvnfet,mvvaractor,*mvndiff *ndiff 360 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005565 "MV N-diffusion to LV N-diffusion < %d (diff/tap.23 + diff/tap.22)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005566
5567 # Minimum length of MV FETs. Note that this is larger than the minimum
5568 # width (0.29um), so an edge rule is required
5569
5570 edge4way mvndiff mvnfet 500 mvnfet 0 0 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005571 "MV NMOS minimum length < %d (poly.13)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005572
5573 edge4way mvnsd mvvaractor 500 mvvaractor 0 0 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005574 "MV Varactor minimum length < %d (poly.13)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005575
5576 edge4way mvpdiff mvpfet 500 mvpfet 0 0 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005577 "MV PMOS minimum length < %d (poly.13)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005578
5579#--------------------------------------------------
5580# mrp1 (N+ poly resistor)
5581#--------------------------------------------------
5582
Tim Edwards96c1e832020-09-16 11:42:16 -04005583 width mrp1 330 "mrp1 resistor width < %d (poly.3)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005584
5585#--------------------------------------------------
5586# xhrpoly (P+ poly resistor)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005587# uhrpoly (P+ poly resistor, 2kOhm/sq)
5588#--------------------------------------------------
5589
Tim Edwardse6a454b2020-10-17 22:52:39 -04005590 # NOTE: u/xhrpoly resistor requires discrete widths 0.35, 0.69, ... up to 1.27.
5591 width xhrpoly 350 "xhrpoly resistor width < %d (P+ poly.1a)"
5592 width uhrpoly 350 "uhrpoly resistor width < %d (P+ poly.1a)"
5593
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005594 spacing xhrpoly,uhrpoly,xpc alldiff 480 touching_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005595 "xhrpoly/uhrpoly resistor spacing to diffusion < %d (poly.9)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005596
Tim Edwardse6a454b2020-10-17 22:52:39 -04005597 spacing allpolyres,xpc *poly,allfets 480 touching_illegal \
5598 "Poly resistor spacing to poly < %d (poly.9)"
5599
5600 spacing allpolyres,xpc alldiff 480 touching_illegal \
5601 "Poly resistor spacing to diffusion < %d (poly.9)"
5602
5603#------------------------------------
5604# nsonos
5605#------------------------------------
5606
5607variants (full)
5608 cifmaxwidth bbox_missing 0 bend_illegal \
5609 "SONOS transistor must be in cell with abutment box (tunm.8)"
5610variants (fast),(full)
5611
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005612#------------------------------------
5613# MOS Varactor device rules
5614#------------------------------------
5615
5616 overhang *nsd var,varhvt 250 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005617 "N-Tap overhang of Varactor < %d (var.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005618
5619 overhang *mvnsd mvvar 250 \
Tim Edwards96c1e832020-09-16 11:42:16 -04005620 "N-Tap overhang of Varactor < %d (var.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005621
Tim Edwards96c1e832020-09-16 11:42:16 -04005622 width var,varhvt,mvvar 180 "Varactor length < %d (var.1)"
5623 extend var,varhvt,mvvar *poly 1000 "Varactor width < %d (var.2)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005624
Tim Edwardse6a454b2020-10-17 22:52:39 -04005625variants (full)
5626 cifmaxwidth var_poly_no_nwell 0 bend_illegal \
5627 "N-well overlap of varactor poly < 0.15um (varac.5)"
5628
5629 cifmaxwidth pdiff_in_varactor_well 0 bend_illegal \
5630 "Varactor N-well must not contain P+ diffusion (varac.7)"
5631variants (fast),(full)
5632
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005633#ifdef MIM
5634#-----------------------------------------------------------
5635# MiM CAP (CAPM) -
5636#-----------------------------------------------------------
5637
Tim Edwards2788f172020-10-14 22:32:33 -04005638 width *mimcap 1000 "MiM cap width < %d (capm.1)"
Tim Edwards96c1e832020-09-16 11:42:16 -04005639 spacing *mimcap *mimcap 840 touching_ok "MiM cap spacing < %d (capm.2a)"
Tim Edwards2788f172020-10-14 22:32:33 -04005640 spacing *mimcap via3/m3 140 touching_illegal \
5641 "MiM cap spacing to via3 < %d (capm.5)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005642 surround *mimcc *mimcap 200 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005643 "MiM cap must surround MiM cap contact by %d (capm.4)"
5644 rect_only *mimcap "MiM cap must be rectangular (capm.7)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005645
5646 surround *mimcap *metal3/m3 140 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005647 "Metal3 must surround MiM cap by %d (capm.3)"
Tim Edwards2788f172020-10-14 22:32:33 -04005648 spacing via2 *mimcap 140 touching_illegal "MiM cap spacing to via2 < %d (capm.8)"
5649 spacing via3 *mimcap 140 touching_illegal "MiM cap spacing to via3 < %d (capm.8)"
5650 spacing *mimcap *metal3/m3 500 surround_ok \
5651 "MiM cap spacing to unrelated metal3 < %d (capm.11)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005652
5653variants (full)
Tim Edwards95effb32020-10-17 14:56:41 -04005654 cifspacing mim_bottom mim_bottom 1200 touching_ok \
Tim Edwards2788f172020-10-14 22:32:33 -04005655 "MiM cap bottom plate spacing < %d (capm.2b)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005656variants (fast),(full)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005657
5658 # MiM cap contact rules (VIA3)
5659
Tim Edwardsc879cf02020-09-20 22:09:50 -04005660 width mimcc/c1 320 "MiM cap contact width < %d (via3.1 + 2 * via3.4)"
Tim Edwards96c1e832020-09-16 11:42:16 -04005661 spacing mimcc mimcc 80 touching_ok "MiM cap contact spacing < %d (via3.2 - 2 * via3.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005662 surround mimcc/m4 *m4 5 directional \
Tim Edwards96c1e832020-09-16 11:42:16 -04005663 "Metal4 overlap of MiM cap contact in one direction < %d (met4.3 - via3.4)"
Tim Edwardsc879cf02020-09-20 22:09:50 -04005664 exact_overlap mimcc/c1
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005665
Tim Edwards32712912020-11-07 16:18:39 -05005666 width *mimcap2 1000 "MiM2 cap width < %d (cap2m.1)"
5667 spacing *mimcap2 *mimcap2 840 touching_ok "MiM2 cap spacing < %d (cap2m.2a)"
5668 spacing *mimcap2 via4/m4 140 touching_illegal \
5669 "MiM2 cap spacing to via4 < %d (cap2m.5)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005670 surround *mim2cc *mimcap2 200 absence_illegal \
Tim Edwards32712912020-11-07 16:18:39 -05005671 "MiM2 cap must surround MiM cap 2 contact by %d (cap2m.4)"
5672 rect_only *mimcap2 "MiM2 cap must be rectangular (cap2m.7)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005673
5674 surround *mimcap2 *metal4/m4 140 absence_illegal \
Tim Edwards32712912020-11-07 16:18:39 -05005675 "Metal4 must surround MiM2 cap by %d (cap2m.3)"
5676 spacing via3 *mimcap2 140 touching_illegal "MiM2 cap spacing to via3 < %d (cap2m.8)"
5677 spacing via4 *mimcap2 140 touching_illegal "MiM2 cap spacing to via4 < %d (cap2m.8)"
5678 spacing *mimcap2 *metal4/m4 500 surround_ok \
5679 "MiM2 cap spacing to unrelated metal4 < %d (cap2m.11)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005680
5681variants (full)
Tim Edwards95effb32020-10-17 14:56:41 -04005682 cifspacing mim2_bottom mim2_bottom 1200 touching_ok \
Tim Edwards2788f172020-10-14 22:32:33 -04005683 "MiM2 cap bottom plate spacing < %d (cap2m.2b)"
Tim Edwardse6a454b2020-10-17 22:52:39 -04005684variants (fast),(full)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005685
5686 # MiM cap contact rules (VIA4)
5687
Tim Edwardsc879cf02020-09-20 22:09:50 -04005688 width mim2cc/c2 1180 "MiM2 cap contact width < %d (via4.1 + 2 * via4.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005689 spacing mim2cc mim2cc 420 touching_ok \
Tim Edwards96c1e832020-09-16 11:42:16 -04005690 "MiM2 cap contact spacing < %d (via4.2 - 2 * via4.4)"
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005691 surround mim2cc/m5 *m5 120 absence_illegal \
Tim Edwards96c1e832020-09-16 11:42:16 -04005692 "Metal5 overlap of MiM2 cap contact < %d (met5.3 - via4.4)"
Tim Edwardsc879cf02020-09-20 22:09:50 -04005693 exact_overlap mim2cc/c2
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005694
5695#endif (MIM)
5696
5697#----------------------------
5698# End DRC style
5699#----------------------------
5700
5701end
5702
5703#----------------------------
5704# LEF format definitions
5705#----------------------------
5706
5707lef
5708
Tim Edwards282d9542020-07-15 17:52:08 -04005709 masterslice pwell pwell PWELL substrate
5710 masterslice nwell nwell NWELL
Tim Edwardsd9fe0002020-07-14 21:53:24 -04005711
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005712 routing li li1 LI1 LI li
5713
5714 routing m1 met1 MET1 m1
5715 routing m2 met2 MET2 m2
5716 routing m3 met3 MET3 m3
5717#ifdef METAL5
5718 routing m4 met4 MET4 m4
5719 routing m5 met5 MET5 m5
5720#endif (METAL5)
5721#ifdef REDISTRIBUTION
5722 routing mrdl met6 MET6 m6 MRDL METRDL
5723#endif
5724
5725 cut lic mcon MCON Mcon
5726 cut m2c via via1 VIA VIA1 cont2 via12
5727 cut m3c via2 VIA2 cont3 via23
5728#ifdef METAL5
5729 cut via3 via3 VIA3 cont4 via34
5730 cut via4 via4 VIA4 cont5 via45
5731#endif (METAL5)
5732
5733 obs obsli li1
5734 obs obsm1 met1
5735 obs obsm2 met2
5736 obs obsm3 met3
5737
5738#ifdef METAL5
5739 obs obsm4 met4
5740 obs obsm5 met5
5741#endif (METAL5)
5742#ifdef REDISTRIBUTION
5743 obs obsmrdl met6
5744#endif
5745
Tim Edwards42f79a32020-09-21 14:18:09 -04005746 # NOTE: obslic only used with li1, not obsli.
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005747 obs obslic mcon
5748
5749end
5750
5751#-----------------------------------------------------
5752# Device and Parasitic extraction
5753#-----------------------------------------------------
5754
5755
5756extract
Tim Edwards78cc9eb2020-08-14 16:49:57 -04005757 style ngspice variants (),(orig),(si)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005758 cscale 1
5759 # NOTE: SkyWater SPICE libraries use .option scale 1E6 so all
5760 # dimensions must be in units of microns in the extract file.
5761 # Use extract style "ngspice(si)" to override this and produce
5762 # a file with SI units for length/area.
5763
Tim Edwards78cc9eb2020-08-14 16:49:57 -04005764 variants (),(orig)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005765 lambda 1E6
5766 variants (si)
5767 lambda 1.0
5768 variants *
5769
5770 units microns
5771 step 7
5772 sidehalo 2
5773
5774 # NOTE: MiM cap layers have been purposely put out of order,
5775 # may want to reconsider.
5776
5777 planeorder dwell 0
5778 planeorder well 1
5779 planeorder active 2
5780 planeorder locali 3
5781 planeorder metal1 4
5782 planeorder metal2 5
5783 planeorder metal3 6
5784#ifdef METAL5
5785 planeorder metal4 7
5786 planeorder metal5 8
5787#ifdef REDISTRIBUTION
5788 planeorder metali 9
5789 planeorder block 10
5790 planeorder comment 11
5791 planeorder cap1 12
5792 planeorder cap2 13
5793#else (!REDISTRIBUTION)
5794 planeorder block 9
5795 planeorder comment 10
5796 planeorder cap1 11
5797 planeorder cap2 12
5798#endif (!REDISTRIBUTION)
5799#else (!METAL5)
5800#ifdef REDISTRIBUTION
5801 planeorder metali 7
5802 planeorder block 8
5803 planeorder comment 9
5804 planeorder cap1 10
5805 planeorder cap2 11
5806#else (!REDISTRIBUTION)
5807 planeorder block 7
5808 planeorder comment 8
5809 planeorder cap1 9
5810 planeorder cap2 10
5811#endif (!REDISTRIBUTION)
5812#endif (!METAL5)
5813
5814 height dnwell -0.1 0.1
5815 height nwell,pwell 0.0 0.2062
5816 height alldiff 0.2062 0.12
5817 height allpoly 0.3262 0.18
5818 height alldiffcont 0.3262 0.61
5819 height pc 0.5062 0.43
5820 height allli 0.9361 0.10
5821 height lic 1.0361 0.34
5822 height allm1 1.3761 0.36
5823 height v1 1.7361 0.27
5824 height allm2 2.0061 0.36
5825 height v2 2.3661 0.42
5826 height allm3 2.7861 0.845
5827#ifdef METAL5
5828 height v3 3.6311 0.39
5829 height allm4 4.0211 0.845
5830 height v4 4.8661 0.505
5831 height allm5 5.3711 1.26
5832 height mimcap 2.4661 0.2
5833 height mimcap2 3.7311 0.2
5834 height mimcc 2.6661 0.12
5835 height mim2cc 3.9311 0.09
5836#ifdef REDISTRIBUTION
5837 height mrdlc 6.6311 5.2523
5838 height mrdl 11.8834 4.0
5839#endif (!REDISTRIBUTION)
5840#endif (!METAL5)
5841
5842 # Antenna check parameters
5843 # Note that checks w/diode diffusion are not modeled
5844 model partial
5845 antenna poly sidewall 50 none
5846 antenna allcont surface 3 none
5847 antenna li sidewall 75 0 450
5848 antenna lic surface 3 0 18
5849 antenna m1,m2,m3 sidewall 400 2600 400
5850 antenna v1 surface 3 0 18
5851 antenna v2 surface 6 0 36
5852#ifdef METAL5
5853 antenna m4,m5 sidewall 400 2600 400
5854 antenna v3,v4 surface 6 0 36
5855#endif (METAL5)
5856
5857 tiedown alldiffnonfet
5858
5859 substrate *ppdiff,*mvppdiff,space/w,pwell well $SUB -dnwell
5860
5861# Layer resistance: Use document xp018-PDS-v4_2_1.pdf
5862
5863# Resistances are in milliohms per square
5864# Optional 3rd argument is the corner adjustment fraction
5865# Device values come from trtc.cor (typical corner)
5866 resist (dnwell)/dwell 2200000
5867 resist (pwell)/well 3050000
5868 resist (nwell)/well 1700000
5869 resist (rpw)/well 3050000 0.5
5870 resist (*ndiff,nsd)/active 120000
5871 resist (*pdiff,*psd)/active 197000
5872 resist (*mvndiff,mvnsd)/active 114000
5873 resist (*mvpdiff,*mvpsd)/active 191000
5874
5875 resist ndiffres/active 120000 0.5
5876 resist pdiffres/active 197000 0.5
5877 resist mvndiffres/active 114000 0.5
5878 resist mvpdiffres/active 191000 0.5
5879 resist mrp1/active 48200 0.5
5880 resist xhrpoly/active 319800 0.5
5881 resist uhrpoly/active 2000000 0.5
5882
5883 resist (allpolynonres)/active 48200
5884 resist rmp/active 48200
5885
5886 resist (allli)/locali 12200
5887 resist (allm1)/metal1 125
5888 resist (allm2)/metal2 125
5889 resist (allm3)/metal3 47
5890#ifdef METAL5
5891 resist (allm4)/metal4 47
5892 resist (allm5)/metal5 29
5893#endif (METAL5)
5894#ifdef REDISTRIBUTION
5895 resist mrdl/metali 5
5896#endif (REDISTRIBUTION)
5897
5898 contact ndc,nsc 15000
5899 contact pdc,psc 15000
5900 contact mvndc,mvnsc 15000
5901 contact mvpdc,mvpsc 15000
5902 contact pc 15000
5903 contact lic 152000
5904 contact m2c 4500
5905 contact m3c 3410
5906#ifdef METAL5
5907#ifdef MIM
5908 contact mimcc 4500
5909 contact mim2cc 3410
5910#endif (MIM)
5911 contact via3 3410
5912 contact via4 380
5913#endif (METAL5)
5914#ifdef REDISTRIBUTION
5915 contact mrdlc 6
5916#endif (REDISTRIBUTION)
5917
5918#-------------------------------------------------------------------------
5919# Parasitic capacitance values: Use document (...)
5920#-------------------------------------------------------------------------
5921# This uses the new "default" definitions that determine the intervening
5922# planes from the planeorder stack, take care of the reflexive sideoverlap
5923# definitions, and generally clean up the section and make it more readable.
5924#
Tim Edwardsa043e432020-07-10 16:50:44 -04005925# Also uses "units microns" statement. All values are taken from the
5926# document PEX/xRC/cap_models. Fringe capacitance values are approximated.
5927# Units are aF/um^2 for area caps and aF/um for perimeter and sidewall caps.
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005928#-------------------------------------------------------------------------
5929# Remember that device capacitances to substrate are taken care of by the
5930# models. Thus, active and poly definitions ignore all "fet" types.
5931# fet types are excluded when computing parasitic capacitance to
5932# active from layers above them because poly is a shield; fet types are
5933# included for parasitics from layers above to poly. Resistor types
5934# should be removed from all parasitic capacitance calculations, or else
5935# they just create floating caps. Technically, the capacitance probably
5936# should be split between the two terminals. Unsure of the correct model.
5937#-------------------------------------------------------------------------
5938
5939#n-well
5940# NOTE: This value not found in PEX files
5941defaultareacap nwell well 120
5942
5943#n-active
5944# Rely on device models to capture *ndiff area cap
5945# Do not extract parasitics from resistors
5946# defaultareacap allnactivenonfet active 790
5947# defaultperimeter allnactivenonfet active 280
5948
5949#p-active
5950# Rely on device models to capture *pdiff area cap
5951# Do not extract parasitics from resistors
5952# defaultareacap allpactivenonfet active 810
5953# defaultperimeter allpactivenonfet active 300
5954
5955#poly
5956# Do not extract parasitics from resistors
5957# defaultsidewall allpolynonfet active 22
Tim Edwardsa043e432020-07-10 16:50:44 -04005958# defaultareacap allpolynonfet active 106
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005959# defaultperimeter allpolynonfet active 57
5960
Tim Edwards411f5d12020-07-11 14:58:57 -04005961 defaultsidewall *poly active 23
Tim Edwardsa043e432020-07-10 16:50:44 -04005962 defaultareacap *poly active nwell,obswell,pwell well 106
5963 defaultperimeter *poly active nwell,obswell,pwell well 55
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005964
5965#locali
Tim Edwards411f5d12020-07-11 14:58:57 -04005966 defaultsidewall allli locali 33
Tim Edwardsa043e432020-07-10 16:50:44 -04005967 defaultareacap allli locali nwell,obswell,pwell well 37
5968 defaultperimeter allli locali nwell,obswell,pwell well 55
5969 defaultoverlap allli locali nwell well 37
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005970
5971#locali->diff
Tim Edwardsa043e432020-07-10 16:50:44 -04005972 defaultoverlap allli locali allactivenonfet active 37
5973 defaultsideoverlap allli locali allactivenonfet active 55
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005974
5975#locali->poly
Tim Edwardsa043e432020-07-10 16:50:44 -04005976 defaultoverlap allli locali allpolynonres active 94
5977 defaultsideoverlap allli locali allpolynonres active 52
5978 defaultsideoverlap *poly active allli locali 25
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005979
5980#metal1
Tim Edwards411f5d12020-07-11 14:58:57 -04005981 defaultsidewall allm1 metal1 45
Tim Edwardsa043e432020-07-10 16:50:44 -04005982 defaultareacap allm1 metal1 nwell,obswell,pwell well 26
5983 defaultperimeter allm1 metal1 nwell,obswell,pwell well 41
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005984 defaultoverlap allm1 metal1 nwell well 26
5985
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005986#metal1->diff
Tim Edwardsa043e432020-07-10 16:50:44 -04005987 defaultoverlap allm1 metal1 allactivenonfet active 26
5988 defaultsideoverlap allm1 metal1 allactivenonfet active 41
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005989
5990#metal1->poly
Tim Edwardsa043e432020-07-10 16:50:44 -04005991 defaultoverlap allm1 metal1 allpolynonres active 45
5992 defaultsideoverlap allm1 metal1 allpolynonres active 47
5993 defaultsideoverlap *poly active allm1 metal1 17
5994
5995#metal1->locali
5996 defaultoverlap allm1 metal1 allli locali 114
5997 defaultsideoverlap allm1 metal1 allli locali 59
5998 defaultsideoverlap allli locali allm1 metal1 35
Tim Edwards55f4d0e2020-07-05 15:41:02 -04005999
6000#metal2
Tim Edwards411f5d12020-07-11 14:58:57 -04006001 defaultsidewall allm2 metal2 50
Tim Edwardsa043e432020-07-10 16:50:44 -04006002 defaultareacap allm2 metal2 nwell,obswell,pwell well 17
6003 defaultperimeter allm2 metal2 nwell,obswell,pwell well 41
6004 defaultoverlap allm2 metal2 nwell well 38
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006005
6006#metal2->diff
Tim Edwardsa043e432020-07-10 16:50:44 -04006007 defaultoverlap allm2 metal2 allactivenonfet active 17
6008 defaultsideoverlap allm2 metal2 allactivenonfet active 41
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006009
6010#metal2->poly
Tim Edwardsa043e432020-07-10 16:50:44 -04006011 defaultoverlap allm2 metal2 allpolynonres active 24
6012 defaultsideoverlap allm2 metal2 allpolynonres active 41
6013 defaultsideoverlap *poly active allm2 metal2 11
6014
6015#metal2->locali
6016 defaultoverlap allm2 metal2 allli locali 38
6017 defaultsideoverlap allm2 metal2 allli locali 46
6018 defaultsideoverlap allli locali allm2 metal2 22
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006019
6020#metal2->metal1
Tim Edwardsa043e432020-07-10 16:50:44 -04006021 defaultoverlap allm2 metal2 allm1 metal1 134
6022 defaultsideoverlap allm2 metal2 allm1 metal1 67
6023 defaultsideoverlap allm1 metal1 allm2 metal2 48
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006024
6025#metal3
Tim Edwardsa043e432020-07-10 16:50:44 -04006026 defaultsidewall allm3 metal3 63
6027 defaultoverlap allm3 metal3 nwell well 12
6028 defaultareacap allm3 metal3 nwell,obswell,pwell well 12
6029 defaultperimeter allm3 metal3 nwell,obswell,pwell well 41
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006030
6031#metal3->diff
Tim Edwardsa043e432020-07-10 16:50:44 -04006032 defaultoverlap allm3 metal3 allactive active 12
6033 defaultsideoverlap allm3 metal3 allactive active 41
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006034
6035#metal3->poly
Tim Edwardsa043e432020-07-10 16:50:44 -04006036 defaultoverlap allm3 metal3 allpolynonres active 16
6037 defaultsideoverlap allm3 metal3 allpolynonres active 44
6038 defaultsideoverlap *poly active allm3 metal3 9
6039
6040#metal3->locali
6041 defaultoverlap allm3 metal3 allli locali 21
6042 defaultsideoverlap allm3 metal3 allli locali 47
6043 defaultsideoverlap allli locali allm3 metal3 15
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006044
6045#metal3->metal1
Tim Edwardsa043e432020-07-10 16:50:44 -04006046 defaultoverlap allm3 metal3 allm1 metal1 35
6047 defaultsideoverlap allm3 metal3 allm1 metal1 55
6048 defaultsideoverlap allm1 metal1 allm3 metal3 27
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006049
6050#metal3->metal2
Tim Edwardsa043e432020-07-10 16:50:44 -04006051 defaultoverlap allm3 metal3 allm2 metal2 86
6052 defaultsideoverlap allm3 metal3 allm2 metal2 70
6053 defaultsideoverlap allm2 metal2 allm3 metal3 44
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006054
6055#ifdef METAL5
6056#metal4
Tim Edwardsa043e432020-07-10 16:50:44 -04006057 defaultsidewall allm4 metal4 67
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006058# defaultareacap alltopm metal4 well 6
6059 areacap allm4/m4 8
6060 defaultoverlap allm4 metal4 nwell well 8
Tim Edwardsa043e432020-07-10 16:50:44 -04006061 defaultperimeter allm4 metal4 well 37
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006062
6063#metal4->diff
Tim Edwardsa043e432020-07-10 16:50:44 -04006064 defaultoverlap allm4 metal4 allactivenonfet active 8
6065 defaultsideoverlap allm4 metal4 allactivenonfet active 37
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006066
6067#metal4->poly
Tim Edwardsa043e432020-07-10 16:50:44 -04006068 defaultoverlap allm4 metal4 allpolynonres active 10
6069 defaultsideoverlap allm4 metal4 allpolynonres active 38
6070 defaultsideoverlap *poly active allm4 metal4 6
6071
6072#metal4->locali
6073 defaultoverlap allm4 metal4 allli locali 12
6074 defaultsideoverlap allm4 metal4 allli locali 40
6075 defaultsideoverlap allli locali allm4 metal4 10
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006076
6077#metal4->metal1
Tim Edwardsa043e432020-07-10 16:50:44 -04006078 defaultoverlap allm4 metal4 allm1 metal1 15
6079 defaultsideoverlap allm4 metal4 allm1 metal1 43
6080 defaultsideoverlap allm1 metal1 allm4 metal4 16
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006081
6082#metal4->metal2
Tim Edwardsa043e432020-07-10 16:50:44 -04006083 defaultoverlap allm4 metal4 allm2 metal2 20
6084 defaultsideoverlap allm4 metal4 allm2 metal2 46
6085 defaultsideoverlap allm2 metal2 allm4 metal4 22
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006086
6087#metal4->metal3
Tim Edwardsa043e432020-07-10 16:50:44 -04006088 defaultoverlap allm4 metal4 allm3 metal3 84
6089 defaultsideoverlap allm4 metal4 allm3 metal3 71
6090 defaultsideoverlap allm3 metal3 allm4 metal4 43
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006091
6092#metal5
Tim Edwardsa043e432020-07-10 16:50:44 -04006093 defaultsidewall allm5 metal5 127
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006094# defaultareacap allm5 metal5 well 6
6095 areacap allm5/m5 6
6096 defaultoverlap allm5 metal5 nwell well 6
Tim Edwardsa043e432020-07-10 16:50:44 -04006097 defaultperimeter allm5 metal5 well 39
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006098
6099#metal5->diff
Tim Edwardsa043e432020-07-10 16:50:44 -04006100 defaultoverlap allm5 metal5 allactivenonfet active 6
6101 defaultsideoverlap allm5 metal5 allactivenonfet active 39
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006102
6103#metal5->poly
Tim Edwardsa043e432020-07-10 16:50:44 -04006104 defaultoverlap allm5 metal5 allpolynonres active 7
6105 defaultsideoverlap allm5 metal5 allpolynonres active 40
6106 defaultsideoverlap *poly active allm5 metal5 6
6107
6108#metal5->locali
6109 defaultoverlap allm5 metal5 allli locali 8
6110 defaultsideoverlap allm5 metal5 allli locali 41
6111 defaultsideoverlap allli locali allm5 metal5 8
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006112
6113#metal5->metal1
Tim Edwardsa043e432020-07-10 16:50:44 -04006114 defaultoverlap allm5 metal5 allm1 metal1 9
6115 defaultsideoverlap allm5 metal5 allm1 metal1 43
6116 defaultsideoverlap allm1 metal1 allm5 metal5 12
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006117
6118#metal5->metal2
Tim Edwardsa043e432020-07-10 16:50:44 -04006119 defaultoverlap allm5 metal5 allm2 metal2 11
6120 defaultsideoverlap allm5 metal5 allm2 metal2 46
6121 defaultsideoverlap allm2 metal2 allm5 metal5 16
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006122
6123#metal5->metal3
Tim Edwardsa043e432020-07-10 16:50:44 -04006124 defaultoverlap allm5 metal5 allm3 metal3 20
6125 defaultsideoverlap allm5 metal5 allm3 metal3 54
6126 defaultsideoverlap allm3 metal3 allm5 metal5 28
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006127
6128#metal5->metal4
Tim Edwardsa043e432020-07-10 16:50:44 -04006129 defaultoverlap allm5 metal5 allm4 metal4 68
6130 defaultsideoverlap allm5 metal5 allm4 metal4 83
6131 defaultsideoverlap allm4 metal4 allm5 metal5 47
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006132#endif (METAL5)
6133
Tim Edwards0a0272b2020-07-28 14:40:10 -04006134#ifdef REDISTRIBUTION
6135#endif (REDISTRIBUTION)
6136
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006137# Devices: Base models (not subcircuit wrappers)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006138
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006139variants (),(si)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006140
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006141 device msubcircuit sky130_fd_pr__pfet_01v8 pfet,scpfet \
6142 *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006143 device msubcircuit sky130_fd_pr__special_pfet_pass ppu \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006144 *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
6145 device msubcircuit sky130_fd_pr__pfet_01v8_lvt pfetlvt \
6146 *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
6147 device msubcircuit sky130_fd_pr__pfet_01v8_mvt pfetmvt \
6148 *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
Tim Edwards363c7e02020-11-03 14:26:29 -05006149 device msubcircuit sky130_fd_pr__pfet_01v8_hvt pfethvt,scpfethvt \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006150 *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006151
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006152 device msubcircuit sky130_fd_pr__nfet_01v8 nfet,scnfet \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006153 *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006154 device msubcircuit sky130_fd_pr__special_nfet_latch npd \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006155 *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006156 device msubcircuit sky130_fd_pr__special_nfet_pass npass \
6157 *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
6158
6159 device msubcircuit sky130_fd_pr__special_nfet_latch npd \
6160 *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
6161 device msubcircuit sky130_fd_pr__special_nfet_pass npass \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006162 *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
6163 device msubcircuit sky130_fd_pr__nfet_01v8_lvt nfetlvt \
6164 *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006165 device msubcircuit sky130_fd_bs_flash__special_sonosfet_star nsonos \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006166 *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006167 device subcircuit sky130_fd_pr__cap_var_lvt varactor \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006168 *nndiff nwell error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006169 device subcircuit sky130_fd_pr__cap_var_hvt varhvt \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006170 *nndiff nwell error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006171 device subcircuit sky130_fd_pr__cap_var mvvaractor \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006172 *mvnndiff nwell error l=l w=w
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006173
Tim Edwardsfcec6442020-10-26 11:09:27 -04006174 # Bipolars
6175 device msubcircuit sky130_fd_pr__npn_05v0 npn dnwell *ndiff space/w error a2=area
6176 device msubcircuit sky130_fd_pr__pnp_05v0 pnp pwell,space/w *pdiff a2=area
6177 device msubcircuit sky130_fd_pr__npn_11v0 npn dnwell *mvndiff space/w error a2=area
6178
Tim Edwardsaea401b2020-10-26 13:07:32 -04006179 # Ignore the extended-drain FET geometry that forms part of the high-voltage
6180 # bipolar devices.
Tim Edwardsc40fe0f2020-10-26 13:11:45 -04006181 device msubcircuit Ignore mvnfet *mvndiff,mvndiffres dnwell pwell,space/w error +npn,pnp
6182 device msubcircuit Ignore mvpfet *mvpdiff,mvpdiffres pwell,space/w nwell error +npn,pnp
Tim Edwardsaea401b2020-10-26 13:07:32 -04006183
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006184 # Extended drain devices (must appear before the regular devices)
6185 device msubcircuit sky130_fd_pr__nfet_20v0_nvt mvnnfet *mvndiff,mvndiffres \
6186 dnwell pwell,space/w error l=l w=w
6187 device msubcircuit sky130_fd_pr__nfet_20v0 mvnfet *mvndiff,mvndiffres \
6188 dnwell pwell,space/w error l=l w=w
6189 device msubcircuit sky130_fd_pr__pfet_20v0 mvpfet *mvpdiff,mvpdiffres \
6190 pwell,space/w nwell error l=l w=w
6191
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006192 device msubcircuit sky130_fd_pr__pfet_g5v0d10v5 mvpfet \
6193 *mvpdiff,mvpdiffres *mvpdiff,mvpdiffres nwell error l=l w=w
6194 device msubcircuit sky130_fd_pr__nfet_g5v0d10v5 mvnfet \
6195 *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w
6196 device msubcircuit sky130_fd_pr__nfet_05v0_nvt mvnnfet \
6197 *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006198
Tim Edwards363c7e02020-11-03 14:26:29 -05006199 device resistor sky130_fd_pr__res_generic_l1 rli1 *li,coreli
6200 device resistor sky130_fd_pr__res_generic_m1 rmetal1 *metal1
6201 device resistor sky130_fd_pr__res_generic_m2 rmetal2 *metal2
6202 device resistor sky130_fd_pr__res_generic_m3 rmetal3 *metal3
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006203#ifdef METAL5
Tim Edwards363c7e02020-11-03 14:26:29 -05006204 device resistor sky130_fd_pr__res_generic_m4 rm4 *m4
6205 device resistor sky130_fd_pr__res_generic_m5 rm5 *m5
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006206#endif (METAL5)
6207
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006208 device rsubcircuit sky130_fd_pr__res_high_po_0p35 xhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006209 xpc pwell,space/w error +res0p35 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006210 device rsubcircuit sky130_fd_pr__res_high_po_0p69 xhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006211 xpc pwell,space/w error +res0p69 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006212 device rsubcircuit sky130_fd_pr__res_high_po_1p41 xhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006213 xpc pwell,space/w error +res1p41 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006214 device rsubcircuit sky130_fd_pr__res_high_po_2p85 xhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006215 xpc pwell,space/w error +res2p85 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006216 device rsubcircuit sky130_fd_pr__res_high_po_5p73 xhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006217 xpc pwell,space/w error +res5p73 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006218 device rsubcircuit sky130_fd_pr__res_high_po xhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006219 xpc pwell,space/w error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006220 device rsubcircuit sky130_fd_pr__res_xhigh_po_0p35 uhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006221 xpc pwell,space/w error +res0p35 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006222 device rsubcircuit sky130_fd_pr__res_xhigh_po_0p69 uhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006223 xpc pwell,space/w error +res0p69 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006224 device rsubcircuit sky130_fd_pr__res_xhigh_po_1p41 uhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006225 xpc pwell,space/w error +res1p41 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006226 device rsubcircuit sky130_fd_pr__res_xhigh_po_2p85 uhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006227 xpc pwell,space/w error +res2p85 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006228 device rsubcircuit sky130_fd_pr__res_xhigh_po_5p73 uhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006229 xpc pwell,space/w error +res5p73 l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006230 device rsubcircuit sky130_fd_pr__res_xhigh_po uhrpoly \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006231 xpc pwell,space/w error l=l w=w
Tim Edwardsbf5ec172020-08-09 14:04:00 -04006232
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006233 device rsubcircuit sky130_fd_pr_res_generic_nd ndiffres \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006234 *ndiff pwell,space/w error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006235 device rsubcircuit sky130_fd_pr_res_generic_pd pdiffres \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006236 *pdiff nwell error l=l w=w
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006237 device rsubcircuit sky130_fd_pr__res_iso_pw rpw \
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006238 pwell dnwell error l=l w=w
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006239
Tim Edwards363c7e02020-11-03 14:26:29 -05006240 device resistor sky130_fd_pr__res_generic_po rmp *poly
6241 device resistor sky130_fd_pr__res_generic_po mrp1 *poly
6242 device resistor sky130_fd_pr__res_generic_nd__hv mvndiffres *mvndiff
6243 device resistor sky130_fd_pr__res_generic_pd__hv mvpdiffres *mvpdiff
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006244
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006245 device subcircuit sky130_fd_pr__diode_pd2nw_05v5 *pdiode \
Tim Edwards862eeac2020-09-09 12:20:07 -04006246 nwell a=area
Tim Edwardsbe6f1202020-10-29 10:37:46 -04006247 device subcircuit sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt \
6248 nwell a=area
6249 device subcircuit sky130_fd_pr_diode_pd2nw_05v5_hvt *pdiodehvt \
6250 nwell a=area
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006251 device subcircuit sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode \
Tim Edwards862eeac2020-09-09 12:20:07 -04006252 nwell a=area
Tim Edwardsbe6f1202020-10-29 10:37:46 -04006253
6254 device msubcircuit sky130_fd_pr__diode_pw2nd_05v5 *ndiode \
6255 pwell,space/w a=area
6256 device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt \
6257 pwell,space/w a=area
6258 device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode \
6259 pwell,space/w a=area
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006260 device msubcircuit sky130_fd_pr__diode_pw2nd_11v0 *mvndiode \
Tim Edwards862eeac2020-09-09 12:20:07 -04006261 pwell,space/w a=area
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006262
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006263
6264#ifdef MIM
Tim Edwardsb1a18422020-10-02 08:51:29 -04006265 device csubcircuit sky130_fd_pr__cap_mim_m3_1 *mimcap *m3 w=w l=l
6266 device csubcircuit sky130_fd_pr__cap_mim_m3_2 *mimcap2 *m4 w=w l=l
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006267#endif (MIM)
6268
Tim Edwards78cc9eb2020-08-14 16:49:57 -04006269 variants (orig)
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006270
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006271 device mosfet sky130_fd_pr__pfet_01v8 scpfet,pfet pdiff,pdiffres,pdc nwell
6272 device mosfet sky130_fd_pr__special_pfet_pass ppu pdiff,pdiffres,pdc nwell
6273 device mosfet sky130_fd_pr__pfet_01v8_lvt pfetlvt pdiff,pdiffres,pdc nwell
6274 device mosfet sky130_fd_pr__pfet_01v8_mvt pfetmvt pdiff,pdiffres,pdc nwell
Tim Edwards363c7e02020-11-03 14:26:29 -05006275 device mosfet sky130_fd_pr__pfet_01v8_hvt scpfethvt,pfethvt pdiff,pdiffres,pdc nwell
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006276 device mosfet sky130_fd_pr__nfet_01v8 scnfet,nfet ndiff,ndiffres,ndc pwell,space/w
6277 device mosfet sky130_fd_pr__special_nfet_pass npass ndiff,ndiffres,ndc pwell,space/w
6278 device mosfet sky130_fd_pr__special_nfet_latch npd ndiff,ndiffres,ndc pwell,space/w
6279 device mosfet sky130_fd_pr__special_nfet_latch npd ndiff,ndiffres,ndc pwell,space/w
6280 device mosfet sky130_fd_pr__nfet_01v8_lvt nfetlvt ndiff,ndiffres,ndc pwell,space/w
6281 device mosfet sky130_fd_bs_flash__special_sonosfet_star nsonos ndiff,ndiffres,ndc \
6282 pwell,space/w
6283
6284 # Extended drain devices (must appear before the regular devices)
6285 device mosfet sky130_fd_pr__nfet_20v0_nvt mvnnfet *mvndiff,mvndiffres \
6286 dnwell pwell,space/w error
6287 device mosfet sky130_fd_pr__nfet_20v0 mvnfet *mvndiff,mvndiffres \
6288 dnwell pwell,space/w error
6289 device mosfet sky130_fd_pr__pfet_20v0 mvpfet *mvpdiff,mvpdiffres \
6290 pwell,space/w nwell error
6291
6292 device mosfet sky130_fd_pr__pfet_g5v0d10v5 mvpfet mvpdiff,mvpdiffres,mvpdc nwell
6293 device mosfet sky130_fd_pr__nfet_g5v0d10v5 mvnfet mvndiff,mvndiffres,mvndc pwell,space/w
6294 device mosfet sky130_fd_pr__nfet_05v0_nvt mvnnfet *mvndiff,mvndiffres pwell,space/w
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006295
6296 # These devices always extract as subcircuits
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006297 device subcircuit sky130_fd_pr__cap_var_lvt varactor *nndiff nwell error l=l w=w
6298 device subcircuit sky130_fd_pr__cap_var_hvt varhvt *nndiff nwell error l=l w=w
6299 device subcircuit sky130_fd_pr__cap_var mvvaractor *mvnndiff nwell error l=l w=w
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006300
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006301 device resistor sky130_fd_pr__res_generic_po rmp *poly
6302 device resistor sky130_fd_pr__res_generic_l1 rli1 *li,coreli
6303 device resistor sky130_fd_pr__res_generic_m1 rmetal1 *metal1
6304 device resistor sky130_fd_pr__res_generic_m2 rmetal2 *metal2
6305 device resistor sky130_fd_pr__res_generic_m3 rmetal3 *metal3
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006306#ifdef METAL5
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006307 device resistor sky130_fd_pr__res_generic_m4 rm4 *m4
6308 device resistor sky130_fd_pr__res_generic_m5 rm5 *m5
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006309#endif (METAL5)
6310
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006311 device resistor sky130_fd_pr__res_high_po_0p35 xhrpoly xpc +res0p35
6312 device resistor sky130_fd_pr__res_high_po_0p69 xhrpoly xpc +res0p69
6313 device resistor sky130_fd_pr__res_high_po_1p41 xhrpoly xpc +res1p41
6314 device resistor sky130_fd_pr__res_high_po_2p85 xhrpoly xpc +res2p85
6315 device resistor sky130_fd_pr__res_high_po_5p73 xhrpoly xpc +res5p73
6316 device resistor sky130_fd_pr__res_high_po xhrpoly xpc
6317 device resistor sky130_fd_pr__res_xhigh_po_0p35 uhrpoly xpc +res0p35
6318 device resistor sky130_fd_pr__res_xhigh_po_0p69 uhrpoly xpc +res0p69
6319 device resistor sky130_fd_pr__res_xhigh_po_1p41 uhrpoly xpc +res1p41
6320 device resistor sky130_fd_pr__res_xhigh_po_2p85 uhrpoly xpc +res2p85
6321 device resistor sky130_fd_pr__res_xhigh_po_5p73 uhrpoly xpc +res5p73
6322 device resistor sky130_fd_pr__res_xhigh_po uhrpoly xpc
6323 device resistor sky130_fd_pr__res_generic_po mrp1 *poly
6324 device resistor sky130_fd_pr__res_generic_nd ndiffres *ndiff
6325 device resistor sky130_fd_pr__res_generic_pd pdiffres *pdiff
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006326 device resistor mrdn_hv mvndiffres *mvndiff
6327 device resistor mrdp_hv mvpdiffres *mvpdiff
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006328 device resistor sky130_fd_pr__res_iso_pw rpw pwell
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006329
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006330 device ndiode sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area
Tim Edwardsbe6f1202020-10-29 10:37:46 -04006331 device ndiode sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area
6332 device ndiode sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006333 device ndiode sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006334
Tim Edwardsbe6f1202020-10-29 10:37:46 -04006335 device pdiode sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006336 device pdiode sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area
6337 device pdiode sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area
Tim Edwardsbe6f1202020-10-29 10:37:46 -04006338 device pdiode sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006339
Tim Edwards1021f552020-09-11 17:37:51 -04006340 device bjt sky130_fd_pr__npn_05v5 npn dnwell *ndiff space/w error a2=area
6341 device bjt sky130_fd_pr__pnp_05v5 pnp pwell,space/w *pdiff a2=area
Tim Edwardsfcec6442020-10-26 11:09:27 -04006342 device bjt sky130_fd_pr__npn_11v0 npn dnwell *mvndiff space/w error a2=area
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006343
6344#ifdef MIM
Tim Edwardsd7289eb2020-09-10 21:48:31 -04006345 device capacitor sky130_fd_pr__cap_mim_m3_1 *mimcap *m3 1
6346 device capacitor sky130_fd_pr__cap_mim_m3_2 *mimcap2 *m4 1
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006347#endif (MIM)
6348
6349end
6350
6351#-----------------------------------------------------
6352# Wiring tool definitions
6353#-----------------------------------------------------
6354
6355wiring
6356 # All wiring values are in nanometers
6357 scalefactor 10
6358
6359 contact lic 170 li 0 0 m1 30 60
Tim Edwardsbf5ec172020-08-09 14:04:00 -04006360 contact v1 260 m1 0 30 m2 0 30
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006361 contact v2 280 m2 0 45 m3 25 0
6362#ifdef METAL5
Tim Edwardsba66a982020-07-13 13:33:41 -04006363 contact v3 320 m3 0 30 m4 5 5
Tim Edwardsbf5ec172020-08-09 14:04:00 -04006364 contact v4 1180 m4 0 m5 120
Tim Edwards55f4d0e2020-07-05 15:41:02 -04006365#endif (METAL5)
6366
6367 contact pc 170 poly 50 80 li 0 80
6368 contact pdc 170 pdiff 40 60 li 0 80
6369 contact ndc 170 ndiff 40 60 li 0 80
6370 contact psc 170 psd 40 60 li 0 80
6371 contact nsc 170 nsd 40 60 li 0 80
6372
6373end
6374
6375#-----------------------------------------------------
6376# Plain old router. . .
6377#-----------------------------------------------------
6378
6379router
6380end
6381
6382#------------------------------------------------------------
6383# Plowing (restored in magic 8.2, need to fill this section)
6384#------------------------------------------------------------
6385
6386plowing
6387end
6388
6389#-----------------------------------------------------------------
6390# No special plot layers defined (use default PNM color choices)
6391#-----------------------------------------------------------------
6392
6393plot
6394 style pnm
6395 default
6396 draw fillblock no_color_at_all
6397 draw nwell cwell
6398end
6399