blob: 5bfe5583d105636695e242ae0d6cb7d7d760fbc5 [file] [log] [blame]
VERSION 5.6 ;
BUSBITCHARS "[]" ;
DIVIDERCHAR "/" ;
MACRO ADDFX1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN ADDFX1 0 0 ;
SIZE 7.04 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 7.04 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 7.04 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 5.01 1.735 5.3 1.965 ;
RECT 0.34 1.765 5.3 1.935 ;
RECT 2.35 1.735 2.64 1.965 ;
RECT 0.34 1.735 0.63 1.965 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 4.12 2.475 4.41 2.705 ;
RECT 0.34 2.51 4.41 2.675 ;
RECT 4.06 2.505 4.41 2.675 ;
RECT 0.34 2.505 3.67 2.675 ;
RECT 2.83 2.475 3.12 2.705 ;
RECT 2.16 2.475 2.45 2.705 ;
RECT 0.34 2.475 0.63 2.705 ;
END
END B
PIN CI
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 4.6 2.105 4.89 2.335 ;
RECT 0.4 2.135 4.89 2.305 ;
RECT 3.27 2.105 3.56 2.335 ;
RECT 1.18 2.105 1.47 2.335 ;
END
END CI
PIN CO
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 6.605 2.845 6.895 3.075 ;
RECT 6.495 2.875 6.895 3.045 ;
END
END CO
PIN CON
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 5.995 1.365 6.285 1.595 ;
RECT 1.52 1.395 6.285 1.565 ;
RECT 3.825 1.365 4.115 1.595 ;
RECT 1.52 1.365 1.81 1.595 ;
END
END CON
PIN S
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 5.655 3.22 5.945 3.45 ;
RECT 5.545 3.25 5.945 3.42 ;
END
END S
END ADDFX1
MACRO AND2X1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN AND2X1 0 0 ;
SIZE 1.87 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.87 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.87 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.125 2.875 0.525 3.045 ;
RECT 0.125 2.845 0.415 3.075 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.805 2.475 1.095 2.705 ;
RECT 0.7 2.505 1.095 2.675 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.405 2.105 1.695 2.335 ;
RECT 1.405 0.995 1.695 1.225 ;
RECT 1.465 0.995 1.635 2.335 ;
END
END Y
END AND2X1
MACRO AND2X2
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN AND2X2 0 0 ;
SIZE 2.31 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 2.31 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 2.31 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.125 2.875 0.525 3.045 ;
RECT 0.125 2.845 0.415 3.075 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.805 2.475 1.095 2.705 ;
RECT 0.7 2.505 1.095 2.675 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.405 2.105 1.695 2.335 ;
RECT 1.405 0.995 1.695 1.225 ;
RECT 1.465 0.995 1.635 2.335 ;
END
END Y
END AND2X2
MACRO ANT
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN ANT 0 0 ;
SIZE 0.99 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.99 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.99 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.105 0.54 2.335 ;
END
END A
END ANT
MACRO ANTFILL
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN ANTFILL 0 0 ;
SIZE 0.99 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.99 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.99 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.115 0.54 2.345 ;
END
END A
END ANTFILL
MACRO AOI21XL
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN AOI21XL 0 0 ;
SIZE 1.87 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.87 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.87 4.44 ;
END
END vdd
PIN A0
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.24 2.875 0.64 3.045 ;
RECT 0.24 2.845 0.53 3.075 ;
END
END A0
PIN A1
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.58 2.505 0.98 2.675 ;
RECT 0.58 2.475 0.87 2.705 ;
END
END A1
PIN B0
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.02 2.105 1.31 2.335 ;
RECT 0.91 2.135 1.31 2.305 ;
END
END B0
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.405 1.735 1.695 1.965 ;
RECT 1.465 1.025 1.635 1.965 ;
RECT 0.905 1.025 1.635 1.195 ;
RECT 0.905 0.995 1.195 1.225 ;
END
END Y
END AOI21XL
MACRO BUFX1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN BUFX1 0 0 ;
SIZE 1.43 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.43 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.43 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.49 2.845 0.78 3.075 ;
RECT 0.32 2.875 0.78 3.045 ;
END
END A
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.975 2.475 1.265 2.705 ;
RECT 0.975 0.995 1.265 1.225 ;
RECT 1.035 0.995 1.205 2.705 ;
END
END Y
END BUFX1
MACRO BUFX2
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN BUFX2 0 0 ;
SIZE 1.87 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.87 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.87 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.49 2.845 0.78 3.075 ;
RECT 0.32 2.875 0.78 3.045 ;
END
END A
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.975 2.475 1.265 2.705 ;
RECT 0.975 0.995 1.265 1.225 ;
RECT 1.035 0.995 1.205 2.705 ;
END
END Y
END BUFX2
MACRO BUFX4
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN BUFX4 0 0 ;
SIZE 2.75 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 2.75 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 2.75 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.49 2.845 0.78 3.075 ;
RECT 0.32 2.875 0.78 3.045 ;
END
END A
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.835 2.475 2.125 2.705 ;
RECT 1.835 0.995 2.125 1.225 ;
RECT 1.895 0.995 2.065 2.705 ;
RECT 0.975 2.505 2.125 2.675 ;
RECT 0.975 1.025 2.125 1.195 ;
RECT 0.975 2.475 1.265 2.705 ;
RECT 0.975 0.995 1.265 1.225 ;
RECT 1.035 0.995 1.205 2.705 ;
END
END Y
END BUFX4
MACRO DFFSRX1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN DFFSRX1 0 0 ;
SIZE 10.45 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 10.45 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 10.45 4.44 ;
END
END vdd
PIN CK
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 6.735 2.105 7.025 2.335 ;
RECT 3.51 2.135 7.025 2.305 ;
RECT 5.74 2.105 6.03 2.335 ;
RECT 3.51 2.105 3.8 2.335 ;
END
END CK
PIN D
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 3.15 1.765 3.55 1.935 ;
RECT 3.15 1.735 3.44 1.965 ;
END
END D
PIN Q
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 9.995 2.845 10.285 3.075 ;
RECT 9.885 2.875 10.285 3.045 ;
END
END Q
PIN QN
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 9.135 2.475 9.425 2.705 ;
RECT 9.02 2.505 9.425 2.675 ;
END
END QN
PIN RN
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.875 0.635 3.045 ;
RECT 0.175 2.845 0.465 3.075 ;
END
END RN
PIN SN
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 7.79 2.475 8.08 2.705 ;
RECT 1.565 2.505 8.08 2.675 ;
RECT 1.565 2.475 1.855 2.705 ;
END
END SN
OBS
LAYER met1 ;
RECT 9.235 1.705 9.525 1.935 ;
RECT 6.22 1.705 6.51 1.935 ;
RECT 6.22 1.735 9.525 1.905 ;
RECT 8.715 0.995 9.005 1.225 ;
RECT 1.085 0.995 1.375 1.225 ;
RECT 1.085 1.025 9.005 1.195 ;
RECT 7.45 1.365 7.74 1.595 ;
RECT 4.92 1.365 5.21 1.595 ;
RECT 4.92 1.395 7.74 1.565 ;
RECT 4.49 1.365 4.78 1.595 ;
RECT 1.565 1.365 1.855 1.595 ;
RECT 1.565 1.395 4.78 1.565 ;
END
END DFFSRX1
MACRO DFFX1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN DFFX1 0 0 ;
SIZE 7.26 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 7.26 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 7.26 4.44 ;
END
END vdd
PIN CK
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 4.43 2.105 4.72 2.335 ;
RECT 1.205 2.135 4.72 2.305 ;
RECT 3.435 2.105 3.725 2.335 ;
RECT 1.205 2.105 1.495 2.335 ;
END
END CK
PIN D
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.845 1.765 1.245 1.935 ;
RECT 0.845 1.735 1.135 1.965 ;
END
END D
PIN Q
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 6.83 2.845 7.12 3.075 ;
RECT 6.715 2.875 7.12 3.045 ;
END
END Q
PIN QN
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 5.97 2.475 6.26 2.705 ;
RECT 5.86 2.505 6.26 2.675 ;
END
END QN
OBS
LAYER met1 ;
RECT 6.07 1.705 6.36 1.935 ;
RECT 3.915 1.705 4.205 1.935 ;
RECT 3.915 1.735 6.36 1.905 ;
RECT 5.03 1.365 5.32 1.595 ;
RECT 2.615 1.365 2.905 1.595 ;
RECT 2.615 1.395 5.32 1.565 ;
RECT 2.185 1.365 2.475 1.595 ;
RECT 0.14 1.365 0.43 1.595 ;
RECT 0.14 1.395 2.475 1.565 ;
END
END DFFX1
MACRO FILLX1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN FILLX1 0 0 ;
SIZE 0.11 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.11 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.11 4.44 ;
END
END vdd
END FILLX1
MACRO FILLX16
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN FILLX16 0 0 ;
SIZE 1.76 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.76 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.76 4.44 ;
END
END vdd
END FILLX16
MACRO FILLX2
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN FILLX2 0 0 ;
SIZE 0.22 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.22 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.22 4.44 ;
END
END vdd
END FILLX2
MACRO FILLX32
CLASS CORE ;
ORIGIN 0 -0.58 ;
FOREIGN FILLX32 0 0.58 ;
SIZE 3.52 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0.58 3.52 0.885 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.715 3.52 5.02 ;
END
END vdd
END FILLX32
MACRO FILLX4
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN FILLX4 0 0 ;
SIZE 0.44 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.44 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.44 4.44 ;
END
END vdd
END FILLX4
MACRO FILLX8
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN FILLX8 0 0 ;
SIZE 0.88 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.88 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.88 4.44 ;
END
END vdd
END FILLX8
MACRO INVX1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN INVX1 0 0 ;
SIZE 0.99 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.99 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.99 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.875 0.635 3.045 ;
RECT 0.175 2.845 0.465 3.075 ;
END
END A
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.545 2.475 0.835 2.705 ;
RECT 0.545 0.995 0.835 1.225 ;
RECT 0.605 0.995 0.775 2.705 ;
END
END Y
END INVX1
MACRO INVX2
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN INVX2 0 0 ;
SIZE 1.43 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.43 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.43 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.875 0.635 3.045 ;
RECT 0.175 2.845 0.465 3.075 ;
END
END A
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.545 2.475 0.835 2.705 ;
RECT 0.545 0.995 0.835 1.225 ;
RECT 0.605 0.995 0.775 2.705 ;
END
END Y
END INVX2
MACRO INVX4
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN INVX4 0 0 ;
SIZE 2.31 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 2.31 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 2.31 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.875 0.635 3.045 ;
RECT 0.175 2.845 0.465 3.075 ;
END
END A
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.405 2.475 1.695 2.705 ;
RECT 1.405 0.995 1.695 1.225 ;
RECT 1.465 0.995 1.635 2.705 ;
RECT 0.545 2.505 1.695 2.675 ;
RECT 0.545 1.025 1.695 1.195 ;
RECT 0.545 2.475 0.835 2.705 ;
RECT 0.545 0.995 0.835 1.225 ;
RECT 0.605 0.995 0.775 2.705 ;
END
END Y
END INVX4
MACRO INVX8
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN INVX8 0 0 ;
SIZE 4.07 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 4.07 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 4.07 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.875 0.635 3.045 ;
RECT 0.175 2.845 0.465 3.075 ;
END
END A
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 3.125 2.475 3.415 2.705 ;
RECT 3.125 0.995 3.415 1.225 ;
RECT 3.185 0.995 3.355 2.705 ;
RECT 0.545 2.505 3.415 2.675 ;
RECT 0.545 1.025 3.415 1.195 ;
RECT 2.265 2.475 2.555 2.705 ;
RECT 2.265 0.995 2.555 1.225 ;
RECT 2.325 0.995 2.495 2.705 ;
RECT 1.405 2.475 1.695 2.705 ;
RECT 1.405 0.995 1.695 1.225 ;
RECT 1.465 0.995 1.635 2.705 ;
RECT 0.545 2.475 0.835 2.705 ;
RECT 0.545 0.995 0.835 1.225 ;
RECT 0.605 0.995 0.775 2.705 ;
END
END Y
END INVX8
MACRO NAND2X1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN NAND2X1 0 0 ;
SIZE 1.43 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.43 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.43 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.175 2.875 0.575 3.045 ;
RECT 0.175 2.845 0.465 3.075 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.915 2.475 1.205 2.705 ;
RECT 0.805 2.505 1.205 2.675 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.545 2.105 0.835 2.335 ;
RECT 0.605 1.025 0.775 2.335 ;
RECT 0.115 1.025 0.775 1.195 ;
RECT 0.115 0.995 0.405 1.225 ;
END
END Y
END NAND2X1
MACRO NOR2X1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN NOR2X1 0 0 ;
SIZE 1.43 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.43 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.43 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.845 2.845 1.135 3.075 ;
RECT 0.74 2.875 1.135 3.045 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.505 2.475 0.795 2.705 ;
RECT 0.395 2.505 0.795 2.675 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.545 0.995 0.835 1.225 ;
RECT 0.115 2.135 0.775 2.305 ;
RECT 0.605 0.995 0.775 2.305 ;
RECT 0.115 2.105 0.405 2.335 ;
END
END Y
END NOR2X1
MACRO OAI21XL
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN OAI21XL 0 0 ;
SIZE 1.87 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.87 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.87 4.44 ;
END
END vdd
PIN A0
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.27 2.875 0.67 3.045 ;
RECT 0.27 2.845 0.56 3.075 ;
END
END A0
PIN A1
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.75 2.505 1.15 2.675 ;
RECT 0.75 2.475 1.04 2.705 ;
END
END A1
PIN B0
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.055 2.105 1.345 2.335 ;
RECT 0.945 2.135 1.345 2.305 ;
END
END B0
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.405 0.995 1.695 1.225 ;
RECT 1.395 1.735 1.685 1.965 ;
RECT 1.465 0.995 1.635 1.965 ;
END
END Y
END OAI21XL
MACRO OR2X1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN OR2X1 0 0 ;
SIZE 1.87 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.87 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.87 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.805 2.845 1.095 3.075 ;
RECT 0.7 2.875 1.095 3.045 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.125 2.505 0.525 2.675 ;
RECT 0.125 2.475 0.415 2.705 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.405 2.105 1.695 2.335 ;
RECT 1.405 0.995 1.695 1.225 ;
RECT 1.465 0.995 1.635 2.335 ;
END
END Y
END OR2X1
MACRO OR2X2
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN OR2X2 0 0 ;
SIZE 2.31 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 2.31 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 2.31 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.805 2.845 1.095 3.075 ;
RECT 0.7 2.875 1.095 3.045 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.125 2.505 0.525 2.675 ;
RECT 0.125 2.475 0.415 2.705 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.405 2.105 1.695 2.335 ;
RECT 1.405 0.995 1.695 1.225 ;
RECT 1.465 0.995 1.635 2.335 ;
END
END Y
END OR2X2
MACRO TBUFIX1
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN TBUFIX1 0 0 ;
SIZE 1.87 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 1.87 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 1.87 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.995 2.845 1.285 3.075 ;
RECT 0.885 2.875 1.285 3.045 ;
END
END A
PIN OE
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.545 2.505 0.945 2.675 ;
RECT 0.545 2.475 0.835 2.705 ;
RECT 0.545 1.365 0.835 1.595 ;
RECT 0.605 1.365 0.775 2.705 ;
END
END OE
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.335 2.105 1.625 2.335 ;
RECT 1.335 0.995 1.625 1.225 ;
RECT 1.395 0.995 1.565 2.335 ;
END
END Y
END TBUFIX1
MACRO TIEHI
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN TIEHI 0 0 ;
SIZE 0.99 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.99 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.99 4.44 ;
END
END vdd
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.47 2.475 0.835 2.705 ;
END
END Y
END TIEHI
MACRO TIELO
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN TIELO 0 0 ;
SIZE 0.99 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 0.99 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 0.99 4.44 ;
END
END vdd
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.47 1.365 0.835 1.595 ;
END
END Y
END TIELO
MACRO XNOR2XL
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN XNOR2XL 0 0 ;
SIZE 3.19 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 3.19 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 3.19 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 2 0.995 2.29 1.225 ;
RECT 0.7 1.025 2.29 1.195 ;
RECT 0.7 0.995 0.99 1.225 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 2.385 1.365 2.675 1.595 ;
RECT 2.275 1.395 2.675 1.565 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.28 2.845 1.57 3.075 ;
RECT 1.28 1.365 1.57 1.595 ;
RECT 1.34 1.365 1.51 3.075 ;
END
END Y
END XNOR2XL
MACRO XOR2XL
CLASS CORE ;
ORIGIN 0 0 ;
FOREIGN XOR2XL 0 0 ;
SIZE 3.19 BY 4.44 ;
SYMMETRY X Y ;
SITE 12T ;
PIN gnd
DIRECTION INOUT ;
USE GROUND ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 0 3.19 0.305 ;
END
END gnd
PIN vdd
DIRECTION INOUT ;
USE POWER ;
SHAPE ABUTMENT ;
PORT
LAYER met1 ;
RECT 0 4.135 3.19 4.44 ;
END
END vdd
PIN A
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 2 2.845 2.29 3.075 ;
RECT 0.94 2.875 2.29 3.045 ;
RECT 0.94 2.845 1.23 3.075 ;
END
END A
PIN B
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 2.385 2.475 2.675 2.705 ;
RECT 2.275 2.505 2.675 2.675 ;
END
END B
PIN Y
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 1.42 0.895 1.71 1.125 ;
RECT 1.28 2.105 1.57 2.335 ;
RECT 1.34 0.925 1.51 2.335 ;
END
END Y
END XOR2XL
END LIBRARY