{ | |
"area": 27.1728, | |
"cell_footprint": "a41o", | |
"cell_leakage_power": 0.0, | |
"pg_pin VGND": { | |
"pg_type": "primary_ground", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin VNB": { | |
"pg_type": "primary_ground", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin VPB": { | |
"pg_type": "primary_power", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin VPWR": { | |
"pg_type": "primary_power", | |
"voltage_name": "VPWR" | |
}, | |
"pin A1": { | |
"capacitance": 0.00554, | |
"clock": "false", | |
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"related_power_pin": "VPWR" | |
}, | |
"pin A2": { | |
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0.02405, | |
0.03274, | |
0.04304 | |
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0.01504, | |
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0.02255, | |
0.03104, | |
0.0397 | |
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"rise_power hidden_pwr_template13": { | |
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"max_transition": 1.0, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR" | |
}, | |
"pin B1": { | |
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"clock": "false", | |
"direction": "input", | |
"max_transition": 1.0, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR" | |
}, | |
"pin X": { | |
"direction": "output", | |
"function": "(A1&A2&A3&A4) | (B1)", | |
"internal_power": [ | |
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[ | |
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[ | |
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[ | |
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[ | |
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0.22132, | |
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[ | |
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[ | |
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[ | |
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0.20223, | |
0.27684, | |
0.43386, | |
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1.39617 | |
] | |
] | |
}, | |
"when": "(A2&A3&A4&!B1)" | |
}, | |
{ | |
"fall_power pwr_template13x9": { | |
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[ | |
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[ | |
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[ | |
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[ | |
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}, | |
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