| { |
| "area": 31.968, |
| "cell_footprint": "sky130_fd_sc_ms__dfxtp", |
| "cell_leakage_power": 80.47414, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "D" |
| }, |
| "leakage_power": [ |
| { |
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| "when": "D&CLK" |
| }, |
| { |
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| "when": "!D&!CLK" |
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| { |
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| "when": "!D&CLK" |
| }, |
| { |
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| "when": "D&!CLK" |
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| ], |
| "pg_pin,VGND": { |
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| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
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| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
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| "clock": "true", |
| "direction": "input", |
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| "related_power_pin": "VPWR", |
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| }, |
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| "related_power_pin": "VPWR", |
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| "related_pin": "CLK", |
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| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
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| "related_pin": "CLK", |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "pin,Q": { |
| "direction": "output", |
| "function": "IQ", |
| "internal_power": { |
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