| { | |
| "area": 49.5504, | |
| "cell_footprint": "sky130_fd_sc_ls__sdfrtp", | |
| "cell_leakage_power": 19.71386, | |
| "driver_waveform_fall": "ramp", | |
| "driver_waveform_rise": "ramp", | |
| "ff,IQ,IQ_N": { | |
| "clear": "!RESET_B", | |
| "clocked_on": "CLK", | |
| "next_state": "(D&!SCE) | (SCD&SCE)" | |
| }, | |
| "leakage_power": [ | |
| { | |
| "value": 24.6932395, | |
| "when": "D&!SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 19.1620426, | |
| "when": "!D&!SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 18.0749531, | |
| "when": "!D&SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 17.6662684, | |
| "when": "!D&!SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 15.299598, | |
| "when": "!D&!SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 23.9222562, | |
| "when": "!D&!SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 26.2048818, | |
| "when": "D&!SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 23.3163959, | |
| "when": "D&SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 23.9146907, | |
| "when": "D&!SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 15.7032662, | |
| "when": "D&!SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 26.0906798, | |
| "when": "!D&SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 19.5145713, | |
| "when": "!D&!SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 17.3584009, | |
| "when": "!D&!SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 25.4069832, | |
| "when": "D&SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 19.9492796, | |
| "when": "D&!SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 17.3664851, | |
| "when": "D&!SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 18.4278264, | |
| "when": "!D&SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 15.3042112, | |
| "when": "!D&SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 22.8483632, | |
| "when": "D&SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 15.7063837, | |
| "when": "D&SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 25.3119197, | |
| "when": "!D&SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 17.7628383, | |
| "when": "!D&SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 24.628136, | |
| "when": "D&SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 17.7668316, | |
| "when": "D&SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 16.1964628, | |
| "when": "!D&!SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 16.201076, | |
| "when": "!D&SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 18.2552711, | |
| "when": "!D&!SCD&SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 18.6597422, | |
| "when": "!D&SCD&SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 16.6001684, | |
| "when": "D&!SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 16.6032859, | |
| "when": "D&SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 18.2633553, | |
| "when": "D&!SCD&SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 18.6637372, | |
| "when": "D&SCD&SCE&!RESET_B&!CLK" | |
| } | |
| ], | |
| "pg_pin,VGND": { | |
| "pg_type": "primary_ground", | |
| "related_bias_pin": "VPB", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin,VNB": { | |
| "pg_type": "nwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin,VPB": { | |
| "pg_type": "pwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VPB" | |
| }, | |
| "pg_pin,VPWR": { | |
| "pg_type": "primary_power", | |
| "related_bias_pin": "VNB", | |
| "voltage_name": "VPWR" | |
| }, | |
| "pin,CLK": { | |
| "capacitance": 0.002635, | |
| "clock": "true", | |
| "direction": "input", | |
| "fall_capacitance": 0.002498, | |
| "internal_power": { | |
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| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 0.0166689, | |
| 0.0166163, | |
| 0.0165429 | |
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| } | |
| }, | |
| "max_transition": 1.5, | |
| "min_pulse_width_high": 0.307121, | |
| "min_pulse_width_low": 0.615802, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002772 | |
| }, | |
| "pin,D": { | |
| "capacitance": 0.001681, | |
| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.001609, | |
| "internal_power": { | |
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| 0.0076234, | |
| 0.007612, | |
| 0.0076006, | |
| 0.0075896, | |
| 0.007579 | |
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| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 0.0028921, | |
| 0.0028042 | |
| ] | |
| } | |
| }, | |
| "max_transition": 1.5, | |
| "nextstate_type": "data", | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.001754, | |
| "timing": [ | |
| { | |
| "fall_constraint,vio_10_10_1": { | |
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| [ | |
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| [ | |
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| [ | |
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| 0.951707 | |
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| ] | |
| }, | |
| "related_pin": "CLK", | |
| "rise_constraint,vio_10_10_1": { | |
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| [ | |
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| }, | |
| "sim_opt": "runlvl=5 accurate=1", | |
| "timing_type": "setup_rising", | |
| "violation_delay_degrade_pct": 10 | |
| }, | |
| { | |
| "fall_constraint,vio_10_10_1": { | |
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