| { |
| "area": 47.952, |
| "cell_footprint": "sky130_fd_sc_ls__edfxbp", |
| "cell_leakage_power": 22.92112, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&DE) | (IQ&!DE)" |
| }, |
| "leakage_power": [ |
| { |
| "value": 24.0264253, |
| "when": "!D&CLK" |
| }, |
| { |
| "value": 20.0981205, |
| "when": "D&CLK" |
| }, |
| { |
| "value": 21.9659668, |
| "when": "D&!CLK" |
| }, |
| { |
| "value": 25.5939572, |
| "when": "!D&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.002687, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.002577, |
| "internal_power": { |
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| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
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| 0.13172, |
| 0.19757, |
| 0.29634, |
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| 1.0, |
| 1.5 |
| ], |
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| 0.0218124, |
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| 0.0219487 |
| ] |
| }, |
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| ], |
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| 0.0180269 |
| ] |
| } |
| }, |
| "max_transition": 1.5, |
| "min_pulse_width_high": 0.45542, |
| "min_pulse_width_low": 0.708077, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002797 |
| }, |
| "pin,D": { |
| "capacitance": 0.001573, |
| "clock": "false", |
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| "fall_capacitance": 0.001504, |
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| 0.44449, |
| 0.6667, |
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| ], |
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| 0.0080429, |
| 0.0080262 |
| ] |
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| 0.0041177, |
| 0.0040481, |
| 0.0039511 |
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| } |
| }, |
| "max_transition": 1.5, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001642, |
| "timing": [ |
| { |
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| 0.03125, |
| 0.0625, |
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| [ |
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| 1.429002, |
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| [ |
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| [ |
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| [ |
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| 1.0766256, |
| 1.1881165, |
| 1.3008282 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_10_10_1": { |
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| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
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| 0.5016745, |
| 0.5814271, |
| 0.6550761 |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
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| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
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| 0.25, |
| 0.5, |
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| -0.9200378, |
| -1.0339701, |
| -1.1454609 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_10_10_1": { |
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| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
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| 0.25, |
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| 0.75, |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "pin,DE": { |
| "capacitance": 0.00323, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.003123, |
| "internal_power": { |
| "fall_power,hidden_pwr_template13": { |
| "index_1": [ |
| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
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| 0.13172, |
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| 0.29634, |
| 0.44449, |
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| 1.0, |
| 1.5 |
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| 0.0093055 |
| ] |
| }, |
| "rise_power,hidden_pwr_template13": { |
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