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| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
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| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
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| "pg_pin,VPB": { |
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| "voltage_name": "VPWR" |
| }, |
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| }, |
| "pin,GCLK": { |
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| 0.77006, |
| 0.95913, |
| 1.19565, |
| 1.49172 |
| ], |
| [ |
| 0.02007, |
| 0.03545, |
| 0.03909, |
| 0.04346, |
| 0.04873, |
| 0.05521, |
| 0.0631, |
| 0.07282, |
| 0.08489, |
| 0.10017, |
| 0.11932, |
| 0.14341, |
| 0.17396, |
| 0.21257, |
| 0.26144, |
| 0.32257, |
| 0.40037, |
| 0.4976, |
| 0.61798, |
| 0.76952, |
| 0.95962, |
| 1.19755, |
| 1.49119 |
| ], |
| [ |
| 0.02012, |
| 0.03551, |
| 0.03913, |
| 0.04349, |
| 0.04879, |
| 0.05527, |
| 0.06318, |
| 0.07291, |
| 0.08503, |
| 0.10017, |
| 0.11937, |
| 0.14355, |
| 0.17404, |
| 0.21281, |
| 0.26153, |
| 0.32303, |
| 0.39996, |
| 0.49695, |
| 0.61811, |
| 0.76937, |
| 0.95801, |
| 1.19593, |
| 1.49258 |
| ], |
| [ |
| 0.02147, |
| 0.03658, |
| 0.04023, |
| 0.04455, |
| 0.04988, |
| 0.05628, |
| 0.06411, |
| 0.0738, |
| 0.08575, |
| 0.10088, |
| 0.11992, |
| 0.14399, |
| 0.17437, |
| 0.21295, |
| 0.26176, |
| 0.3228, |
| 0.39998, |
| 0.49757, |
| 0.61932, |
| 0.76852, |
| 0.95819, |
| 1.19507, |
| 1.49113 |
| ], |
| [ |
| 0.02398, |
| 0.03878, |
| 0.04242, |
| 0.04685, |
| 0.05219, |
| 0.05863, |
| 0.06639, |
| 0.07607, |
| 0.08804, |
| 0.10301, |
| 0.12177, |
| 0.14551, |
| 0.1756, |
| 0.21374, |
| 0.26228, |
| 0.32387, |
| 0.40133, |
| 0.49723, |
| 0.61841, |
| 0.77111, |
| 0.95983, |
| 1.19608, |
| 1.49128 |
| ], |
| [ |
| 0.02962, |
| 0.04363, |
| 0.04721, |
| 0.05155, |
| 0.05697, |
| 0.06347, |
| 0.07126, |
| 0.08094, |
| 0.09267, |
| 0.10741, |
| 0.12588, |
| 0.14931, |
| 0.17905, |
| 0.21646, |
| 0.26455, |
| 0.32475, |
| 0.40133, |
| 0.49734, |
| 0.61907, |
| 0.77045, |
| 0.96118, |
| 1.19469, |
| 1.49212 |
| ], |
| [ |
| 0.03763, |
| 0.0509, |
| 0.05438, |
| 0.0587, |
| 0.06406, |
| 0.07063, |
| 0.0786, |
| 0.0884, |
| 0.10033, |
| 0.11495, |
| 0.13321, |
| 0.15609, |
| 0.18512, |
| 0.22205, |
| 0.26927, |
| 0.32886, |
| 0.40457, |
| 0.49997, |
| 0.6198, |
| 0.7697, |
| 0.9583, |
| 1.195, |
| 1.4925 |
| ], |
| [ |
| 0.0448, |
| 0.0576, |
| 0.0611, |
| 0.0654, |
| 0.0708, |
| 0.0773, |
| 0.0854, |
| 0.0953, |
| 0.1072, |
| 0.1219, |
| 0.1401, |
| 0.163, |
| 0.192, |
| 0.2287, |
| 0.2754, |
| 0.3346, |
| 0.4092, |
| 0.5045, |
| 0.6235, |
| 0.7738, |
| 0.9619, |
| 1.1977, |
| 1.4911 |
| ], |
| [ |
| 0.0514, |
| 0.0639, |
| 0.0673, |
| 0.0715, |
| 0.0769, |
| 0.0835, |
| 0.0917, |
| 0.1017, |
| 0.1139, |
| 0.1288, |
| 0.1472, |
| 0.17, |
| 0.1988, |
| 0.2352, |
| 0.2815, |
| 0.3406, |
| 0.4156, |
| 0.5094, |
| 0.6282, |
| 0.7783, |
| 0.965, |
| 1.2002, |
| 1.496 |
| ] |
| ] |
| }, |
| "timing_sense": "positive_unate" |
| } |
| }, |
| "pin,M0": { |
| "direction": "internal", |
| "internal_node": "M0", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "statetable,CLK GATE,M0": { |
| "table": [ |
| "L L : - : L", |
| "L H : - : H", |
| "H - : - : N" |
| ] |
| } |
| } |
