verilog: Fixing power pins usage in non-powerpin mode.

Previously even when `USE_POWER_PIN` was not defined, the drive strength
wrappers where still defining the power pins as ports.

Fixes https://github.com/google/skywater-pdk/issues/181

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
diff --git a/cells/a2111o/sky130_fd_sc_lp__a2111o_0.v b/cells/a2111o/sky130_fd_sc_lp__a2111o_0.v
index a0f2a92..f96c6d0 100644
--- a/cells/a2111o/sky130_fd_sc_lp__a2111o_0.v
+++ b/cells/a2111o/sky130_fd_sc_lp__a2111o_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111o/sky130_fd_sc_lp__a2111o_1.v b/cells/a2111o/sky130_fd_sc_lp__a2111o_1.v
index 9cc9f86..4b8e7b2 100644
--- a/cells/a2111o/sky130_fd_sc_lp__a2111o_1.v
+++ b/cells/a2111o/sky130_fd_sc_lp__a2111o_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111o/sky130_fd_sc_lp__a2111o_2.v b/cells/a2111o/sky130_fd_sc_lp__a2111o_2.v
index 04a36d8..780a656 100644
--- a/cells/a2111o/sky130_fd_sc_lp__a2111o_2.v
+++ b/cells/a2111o/sky130_fd_sc_lp__a2111o_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111o/sky130_fd_sc_lp__a2111o_4.v b/cells/a2111o/sky130_fd_sc_lp__a2111o_4.v
index bd55bd4..6abb493 100644
--- a/cells/a2111o/sky130_fd_sc_lp__a2111o_4.v
+++ b/cells/a2111o/sky130_fd_sc_lp__a2111o_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111o/sky130_fd_sc_lp__a2111o_lp.v b/cells/a2111o/sky130_fd_sc_lp__a2111o_lp.v
index 64c1a2d..5c5648a 100644
--- a/cells/a2111o/sky130_fd_sc_lp__a2111o_lp.v
+++ b/cells/a2111o/sky130_fd_sc_lp__a2111o_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111o/sky130_fd_sc_lp__a2111o_m.v b/cells/a2111o/sky130_fd_sc_lp__a2111o_m.v
index abcc006..114d9c1 100644
--- a/cells/a2111o/sky130_fd_sc_lp__a2111o_m.v
+++ b/cells/a2111o/sky130_fd_sc_lp__a2111o_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_0.v b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_0.v
index 0d253e7..e6f76a9 100644
--- a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_0.v
+++ b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_1.v b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_1.v
index f6ce2f9..5a9cdfa 100644
--- a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_1.v
+++ b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_2.v b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_2.v
index 0f1051a..ce51a92 100644
--- a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_2.v
+++ b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_4.v b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_4.v
index 0e2126a..43e5a53 100644
--- a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_4.v
+++ b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_lp.v b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_lp.v
index 2ab3885..f091d61 100644
--- a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_lp.v
+++ b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_m.v b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_m.v
index 4fd6204..d56c514 100644
--- a/cells/a2111oi/sky130_fd_sc_lp__a2111oi_m.v
+++ b/cells/a2111oi/sky130_fd_sc_lp__a2111oi_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a2111oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_lp__a211o_0.v b/cells/a211o/sky130_fd_sc_lp__a211o_0.v
index ff4d941..7ff8df2 100644
--- a/cells/a211o/sky130_fd_sc_lp__a211o_0.v
+++ b/cells/a211o/sky130_fd_sc_lp__a211o_0.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_lp__a211o_1.v b/cells/a211o/sky130_fd_sc_lp__a211o_1.v
index 167cc65..edf1f66 100644
--- a/cells/a211o/sky130_fd_sc_lp__a211o_1.v
+++ b/cells/a211o/sky130_fd_sc_lp__a211o_1.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_lp__a211o_2.v b/cells/a211o/sky130_fd_sc_lp__a211o_2.v
index 8d958ab..f855981 100644
--- a/cells/a211o/sky130_fd_sc_lp__a211o_2.v
+++ b/cells/a211o/sky130_fd_sc_lp__a211o_2.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_lp__a211o_4.v b/cells/a211o/sky130_fd_sc_lp__a211o_4.v
index d443d0d..72ca5eb 100644
--- a/cells/a211o/sky130_fd_sc_lp__a211o_4.v
+++ b/cells/a211o/sky130_fd_sc_lp__a211o_4.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_lp__a211o_lp.v b/cells/a211o/sky130_fd_sc_lp__a211o_lp.v
index e4ef36a..f2fbb0c 100644
--- a/cells/a211o/sky130_fd_sc_lp__a211o_lp.v
+++ b/cells/a211o/sky130_fd_sc_lp__a211o_lp.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_lp__a211o_m.v b/cells/a211o/sky130_fd_sc_lp__a211o_m.v
index e2fdca7..e70a73c 100644
--- a/cells/a211o/sky130_fd_sc_lp__a211o_m.v
+++ b/cells/a211o/sky130_fd_sc_lp__a211o_m.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_lp__a211oi_0.v b/cells/a211oi/sky130_fd_sc_lp__a211oi_0.v
index 99dd38a..94fdbc8 100644
--- a/cells/a211oi/sky130_fd_sc_lp__a211oi_0.v
+++ b/cells/a211oi/sky130_fd_sc_lp__a211oi_0.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_lp__a211oi_1.v b/cells/a211oi/sky130_fd_sc_lp__a211oi_1.v
index 7c007df..f3810dd 100644
--- a/cells/a211oi/sky130_fd_sc_lp__a211oi_1.v
+++ b/cells/a211oi/sky130_fd_sc_lp__a211oi_1.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_lp__a211oi_2.v b/cells/a211oi/sky130_fd_sc_lp__a211oi_2.v
index a418351..216b93c 100644
--- a/cells/a211oi/sky130_fd_sc_lp__a211oi_2.v
+++ b/cells/a211oi/sky130_fd_sc_lp__a211oi_2.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_lp__a211oi_4.v b/cells/a211oi/sky130_fd_sc_lp__a211oi_4.v
index 5898de4..0e3d5ef 100644
--- a/cells/a211oi/sky130_fd_sc_lp__a211oi_4.v
+++ b/cells/a211oi/sky130_fd_sc_lp__a211oi_4.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_lp__a211oi_lp.v b/cells/a211oi/sky130_fd_sc_lp__a211oi_lp.v
index 5640b36..5dd7e13 100644
--- a/cells/a211oi/sky130_fd_sc_lp__a211oi_lp.v
+++ b/cells/a211oi/sky130_fd_sc_lp__a211oi_lp.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_lp__a211oi_m.v b/cells/a211oi/sky130_fd_sc_lp__a211oi_m.v
index bc50db3..a7088c6 100644
--- a/cells/a211oi/sky130_fd_sc_lp__a211oi_m.v
+++ b/cells/a211oi/sky130_fd_sc_lp__a211oi_m.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a211oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_lp__a21bo_0.v b/cells/a21bo/sky130_fd_sc_lp__a21bo_0.v
index 76e6a87..1cbf84e 100644
--- a/cells/a21bo/sky130_fd_sc_lp__a21bo_0.v
+++ b/cells/a21bo/sky130_fd_sc_lp__a21bo_0.v
@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_lp__a21bo_1.v b/cells/a21bo/sky130_fd_sc_lp__a21bo_1.v
index 9003da2..0a40cce 100644
--- a/cells/a21bo/sky130_fd_sc_lp__a21bo_1.v
+++ b/cells/a21bo/sky130_fd_sc_lp__a21bo_1.v
@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_lp__a21bo_2.v b/cells/a21bo/sky130_fd_sc_lp__a21bo_2.v
index 08dffa2..11e6da4 100644
--- a/cells/a21bo/sky130_fd_sc_lp__a21bo_2.v
+++ b/cells/a21bo/sky130_fd_sc_lp__a21bo_2.v
@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_lp__a21bo_4.v b/cells/a21bo/sky130_fd_sc_lp__a21bo_4.v
index 469cf5d..612cfcb 100644
--- a/cells/a21bo/sky130_fd_sc_lp__a21bo_4.v
+++ b/cells/a21bo/sky130_fd_sc_lp__a21bo_4.v
@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_lp__a21bo_lp.v b/cells/a21bo/sky130_fd_sc_lp__a21bo_lp.v
index 47a5949..f0e5c13 100644
--- a/cells/a21bo/sky130_fd_sc_lp__a21bo_lp.v
+++ b/cells/a21bo/sky130_fd_sc_lp__a21bo_lp.v
@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_lp__a21bo_m.v b/cells/a21bo/sky130_fd_sc_lp__a21bo_m.v
index 8d5e322..4b5ac7b 100644
--- a/cells/a21bo/sky130_fd_sc_lp__a21bo_m.v
+++ b/cells/a21bo/sky130_fd_sc_lp__a21bo_m.v
@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_lp__a21boi_0.v b/cells/a21boi/sky130_fd_sc_lp__a21boi_0.v
index 782cf21..6f58bdc 100644
--- a/cells/a21boi/sky130_fd_sc_lp__a21boi_0.v
+++ b/cells/a21boi/sky130_fd_sc_lp__a21boi_0.v
@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_lp__a21boi_1.v b/cells/a21boi/sky130_fd_sc_lp__a21boi_1.v
index fe11853..2793b0a 100644
--- a/cells/a21boi/sky130_fd_sc_lp__a21boi_1.v
+++ b/cells/a21boi/sky130_fd_sc_lp__a21boi_1.v
@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_lp__a21boi_2.v b/cells/a21boi/sky130_fd_sc_lp__a21boi_2.v
index 3eb1c6b..e5f27a2 100644
--- a/cells/a21boi/sky130_fd_sc_lp__a21boi_2.v
+++ b/cells/a21boi/sky130_fd_sc_lp__a21boi_2.v
@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_lp__a21boi_4.v b/cells/a21boi/sky130_fd_sc_lp__a21boi_4.v
index 9293ff0..ef47aab 100644
--- a/cells/a21boi/sky130_fd_sc_lp__a21boi_4.v
+++ b/cells/a21boi/sky130_fd_sc_lp__a21boi_4.v
@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_lp__a21boi_lp.v b/cells/a21boi/sky130_fd_sc_lp__a21boi_lp.v
index 1f64155..48979b5 100644
--- a/cells/a21boi/sky130_fd_sc_lp__a21boi_lp.v
+++ b/cells/a21boi/sky130_fd_sc_lp__a21boi_lp.v
@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_lp__a21boi_m.v b/cells/a21boi/sky130_fd_sc_lp__a21boi_m.v
index 9054916..3947912 100644
--- a/cells/a21boi/sky130_fd_sc_lp__a21boi_m.v
+++ b/cells/a21boi/sky130_fd_sc_lp__a21boi_m.v
@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_lp__a21o_0.v b/cells/a21o/sky130_fd_sc_lp__a21o_0.v
index 57f61b3..680f714 100644
--- a/cells/a21o/sky130_fd_sc_lp__a21o_0.v
+++ b/cells/a21o/sky130_fd_sc_lp__a21o_0.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_lp__a21o_1.v b/cells/a21o/sky130_fd_sc_lp__a21o_1.v
index 4cbac2c..26d08e8 100644
--- a/cells/a21o/sky130_fd_sc_lp__a21o_1.v
+++ b/cells/a21o/sky130_fd_sc_lp__a21o_1.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_lp__a21o_2.v b/cells/a21o/sky130_fd_sc_lp__a21o_2.v
index e0c585a..9982acb 100644
--- a/cells/a21o/sky130_fd_sc_lp__a21o_2.v
+++ b/cells/a21o/sky130_fd_sc_lp__a21o_2.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_lp__a21o_4.v b/cells/a21o/sky130_fd_sc_lp__a21o_4.v
index 28eebc4..3ea9d88 100644
--- a/cells/a21o/sky130_fd_sc_lp__a21o_4.v
+++ b/cells/a21o/sky130_fd_sc_lp__a21o_4.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_lp__a21o_lp.v b/cells/a21o/sky130_fd_sc_lp__a21o_lp.v
index ad93e09..ce36140 100644
--- a/cells/a21o/sky130_fd_sc_lp__a21o_lp.v
+++ b/cells/a21o/sky130_fd_sc_lp__a21o_lp.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_lp__a21o_m.v b/cells/a21o/sky130_fd_sc_lp__a21o_m.v
index db9bf41..b2d86bd 100644
--- a/cells/a21o/sky130_fd_sc_lp__a21o_m.v
+++ b/cells/a21o/sky130_fd_sc_lp__a21o_m.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_lp__a21oi_0.v b/cells/a21oi/sky130_fd_sc_lp__a21oi_0.v
index 06627c3..a1cf4be 100644
--- a/cells/a21oi/sky130_fd_sc_lp__a21oi_0.v
+++ b/cells/a21oi/sky130_fd_sc_lp__a21oi_0.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_lp__a21oi_1.v b/cells/a21oi/sky130_fd_sc_lp__a21oi_1.v
index 4575cea..671dd27 100644
--- a/cells/a21oi/sky130_fd_sc_lp__a21oi_1.v
+++ b/cells/a21oi/sky130_fd_sc_lp__a21oi_1.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_lp__a21oi_2.v b/cells/a21oi/sky130_fd_sc_lp__a21oi_2.v
index 231a723..14851e2 100644
--- a/cells/a21oi/sky130_fd_sc_lp__a21oi_2.v
+++ b/cells/a21oi/sky130_fd_sc_lp__a21oi_2.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_lp__a21oi_4.v b/cells/a21oi/sky130_fd_sc_lp__a21oi_4.v
index f89269d..9e91172 100644
--- a/cells/a21oi/sky130_fd_sc_lp__a21oi_4.v
+++ b/cells/a21oi/sky130_fd_sc_lp__a21oi_4.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_lp__a21oi_lp.v b/cells/a21oi/sky130_fd_sc_lp__a21oi_lp.v
index 5a33fe5..ce4c46c 100644
--- a/cells/a21oi/sky130_fd_sc_lp__a21oi_lp.v
+++ b/cells/a21oi/sky130_fd_sc_lp__a21oi_lp.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_lp__a21oi_m.v b/cells/a21oi/sky130_fd_sc_lp__a21oi_m.v
index 1f6eed2..28d22dc 100644
--- a/cells/a21oi/sky130_fd_sc_lp__a21oi_m.v
+++ b/cells/a21oi/sky130_fd_sc_lp__a21oi_m.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__a21oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_lp__a221o_0.v b/cells/a221o/sky130_fd_sc_lp__a221o_0.v
index 52b9a0d..cfceb52 100644
--- a/cells/a221o/sky130_fd_sc_lp__a221o_0.v
+++ b/cells/a221o/sky130_fd_sc_lp__a221o_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_lp__a221o_1.v b/cells/a221o/sky130_fd_sc_lp__a221o_1.v
index e3f3809..afa517e 100644
--- a/cells/a221o/sky130_fd_sc_lp__a221o_1.v
+++ b/cells/a221o/sky130_fd_sc_lp__a221o_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_lp__a221o_2.v b/cells/a221o/sky130_fd_sc_lp__a221o_2.v
index 14f713b..d2c8835 100644
--- a/cells/a221o/sky130_fd_sc_lp__a221o_2.v
+++ b/cells/a221o/sky130_fd_sc_lp__a221o_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_lp__a221o_4.v b/cells/a221o/sky130_fd_sc_lp__a221o_4.v
index c2162fc..2b54bf4 100644
--- a/cells/a221o/sky130_fd_sc_lp__a221o_4.v
+++ b/cells/a221o/sky130_fd_sc_lp__a221o_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_lp__a221o_lp.v b/cells/a221o/sky130_fd_sc_lp__a221o_lp.v
index 3533067..91e3dca 100644
--- a/cells/a221o/sky130_fd_sc_lp__a221o_lp.v
+++ b/cells/a221o/sky130_fd_sc_lp__a221o_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_lp__a221o_m.v b/cells/a221o/sky130_fd_sc_lp__a221o_m.v
index 1c148b5..b816c8a 100644
--- a/cells/a221o/sky130_fd_sc_lp__a221o_m.v
+++ b/cells/a221o/sky130_fd_sc_lp__a221o_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_lp__a221oi_0.v b/cells/a221oi/sky130_fd_sc_lp__a221oi_0.v
index 5d11dcc..7b001b0 100644
--- a/cells/a221oi/sky130_fd_sc_lp__a221oi_0.v
+++ b/cells/a221oi/sky130_fd_sc_lp__a221oi_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_lp__a221oi_1.v b/cells/a221oi/sky130_fd_sc_lp__a221oi_1.v
index 60c2839..888d664 100644
--- a/cells/a221oi/sky130_fd_sc_lp__a221oi_1.v
+++ b/cells/a221oi/sky130_fd_sc_lp__a221oi_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_lp__a221oi_2.v b/cells/a221oi/sky130_fd_sc_lp__a221oi_2.v
index 4c03a24..da6838f 100644
--- a/cells/a221oi/sky130_fd_sc_lp__a221oi_2.v
+++ b/cells/a221oi/sky130_fd_sc_lp__a221oi_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_lp__a221oi_4.v b/cells/a221oi/sky130_fd_sc_lp__a221oi_4.v
index 46cb470..5af7bc9 100644
--- a/cells/a221oi/sky130_fd_sc_lp__a221oi_4.v
+++ b/cells/a221oi/sky130_fd_sc_lp__a221oi_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_lp__a221oi_lp.v b/cells/a221oi/sky130_fd_sc_lp__a221oi_lp.v
index 675d211..88f1d3c 100644
--- a/cells/a221oi/sky130_fd_sc_lp__a221oi_lp.v
+++ b/cells/a221oi/sky130_fd_sc_lp__a221oi_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_lp__a221oi_m.v b/cells/a221oi/sky130_fd_sc_lp__a221oi_m.v
index b6dd2b5..f05025f 100644
--- a/cells/a221oi/sky130_fd_sc_lp__a221oi_m.v
+++ b/cells/a221oi/sky130_fd_sc_lp__a221oi_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a221oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_lp__a22o_0.v b/cells/a22o/sky130_fd_sc_lp__a22o_0.v
index 150f95a..e1e0531 100644
--- a/cells/a22o/sky130_fd_sc_lp__a22o_0.v
+++ b/cells/a22o/sky130_fd_sc_lp__a22o_0.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_lp__a22o_1.v b/cells/a22o/sky130_fd_sc_lp__a22o_1.v
index c204858..5dfab44 100644
--- a/cells/a22o/sky130_fd_sc_lp__a22o_1.v
+++ b/cells/a22o/sky130_fd_sc_lp__a22o_1.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_lp__a22o_2.v b/cells/a22o/sky130_fd_sc_lp__a22o_2.v
index 3693204..ecbc709 100644
--- a/cells/a22o/sky130_fd_sc_lp__a22o_2.v
+++ b/cells/a22o/sky130_fd_sc_lp__a22o_2.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_lp__a22o_4.v b/cells/a22o/sky130_fd_sc_lp__a22o_4.v
index 8227879..426b944 100644
--- a/cells/a22o/sky130_fd_sc_lp__a22o_4.v
+++ b/cells/a22o/sky130_fd_sc_lp__a22o_4.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_lp__a22o_lp.v b/cells/a22o/sky130_fd_sc_lp__a22o_lp.v
index 0eae199..ce9b9e6 100644
--- a/cells/a22o/sky130_fd_sc_lp__a22o_lp.v
+++ b/cells/a22o/sky130_fd_sc_lp__a22o_lp.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_lp__a22o_m.v b/cells/a22o/sky130_fd_sc_lp__a22o_m.v
index 6ae8223..396c12f 100644
--- a/cells/a22o/sky130_fd_sc_lp__a22o_m.v
+++ b/cells/a22o/sky130_fd_sc_lp__a22o_m.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_lp__a22oi_0.v b/cells/a22oi/sky130_fd_sc_lp__a22oi_0.v
index 7d698d4..b1c5b81 100644
--- a/cells/a22oi/sky130_fd_sc_lp__a22oi_0.v
+++ b/cells/a22oi/sky130_fd_sc_lp__a22oi_0.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_lp__a22oi_1.v b/cells/a22oi/sky130_fd_sc_lp__a22oi_1.v
index 85024bb..727db8c 100644
--- a/cells/a22oi/sky130_fd_sc_lp__a22oi_1.v
+++ b/cells/a22oi/sky130_fd_sc_lp__a22oi_1.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_lp__a22oi_2.v b/cells/a22oi/sky130_fd_sc_lp__a22oi_2.v
index a2b8271..ba1e92d 100644
--- a/cells/a22oi/sky130_fd_sc_lp__a22oi_2.v
+++ b/cells/a22oi/sky130_fd_sc_lp__a22oi_2.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_lp__a22oi_4.v b/cells/a22oi/sky130_fd_sc_lp__a22oi_4.v
index 01227d8..c961754 100644
--- a/cells/a22oi/sky130_fd_sc_lp__a22oi_4.v
+++ b/cells/a22oi/sky130_fd_sc_lp__a22oi_4.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_lp__a22oi_lp.v b/cells/a22oi/sky130_fd_sc_lp__a22oi_lp.v
index 4501965..9a27b85 100644
--- a/cells/a22oi/sky130_fd_sc_lp__a22oi_lp.v
+++ b/cells/a22oi/sky130_fd_sc_lp__a22oi_lp.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_lp__a22oi_m.v b/cells/a22oi/sky130_fd_sc_lp__a22oi_m.v
index 14faa24..3d29c7e 100644
--- a/cells/a22oi/sky130_fd_sc_lp__a22oi_m.v
+++ b/cells/a22oi/sky130_fd_sc_lp__a22oi_m.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a22oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_0.v b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_0.v
index b967a90..bce55be 100644
--- a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_0.v
+++ b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_0.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_1.v b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_1.v
index 4979c64..3702e20 100644
--- a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_1.v
+++ b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_1.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_2.v b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_2.v
index 04b2cdc..e347b09 100644
--- a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_2.v
+++ b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_2.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_4.v b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_4.v
index 3f4984c..ab82e60 100644
--- a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_4.v
+++ b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_4.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_lp.v b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_lp.v
index e467a10..4085eec 100644
--- a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_lp.v
+++ b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_lp.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_m.v b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_m.v
index 99ec2b3..7096b8d 100644
--- a/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_m.v
+++ b/cells/a2bb2o/sky130_fd_sc_lp__a2bb2o_m.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_0.v b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_0.v
index 9a7503d..71c8b42 100644
--- a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_0.v
+++ b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_0.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_1.v b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_1.v
index 14270de..25da1b2 100644
--- a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_1.v
+++ b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_1.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_2.v b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_2.v
index eae76cd..dc507a3 100644
--- a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_2.v
+++ b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_2.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_4.v b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_4.v
index 217f6c8..d01a7d8 100644
--- a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_4.v
+++ b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_4.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_lp.v b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_lp.v
index 3ba73ff..0195f89 100644
--- a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_lp.v
+++ b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_lp.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_m.v b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_m.v
index c9527ab..a0fffac 100644
--- a/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_m.v
+++ b/cells/a2bb2oi/sky130_fd_sc_lp__a2bb2oi_m.v
@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_lp__a311o_0.v b/cells/a311o/sky130_fd_sc_lp__a311o_0.v
index a45db6a..4b02bef 100644
--- a/cells/a311o/sky130_fd_sc_lp__a311o_0.v
+++ b/cells/a311o/sky130_fd_sc_lp__a311o_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_lp__a311o_1.v b/cells/a311o/sky130_fd_sc_lp__a311o_1.v
index e6af660..196348c 100644
--- a/cells/a311o/sky130_fd_sc_lp__a311o_1.v
+++ b/cells/a311o/sky130_fd_sc_lp__a311o_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_lp__a311o_2.v b/cells/a311o/sky130_fd_sc_lp__a311o_2.v
index c523ecb..0aabb7f 100644
--- a/cells/a311o/sky130_fd_sc_lp__a311o_2.v
+++ b/cells/a311o/sky130_fd_sc_lp__a311o_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_lp__a311o_4.v b/cells/a311o/sky130_fd_sc_lp__a311o_4.v
index 7850884..3666518 100644
--- a/cells/a311o/sky130_fd_sc_lp__a311o_4.v
+++ b/cells/a311o/sky130_fd_sc_lp__a311o_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_lp__a311o_lp.v b/cells/a311o/sky130_fd_sc_lp__a311o_lp.v
index 611ef33..cccec3f 100644
--- a/cells/a311o/sky130_fd_sc_lp__a311o_lp.v
+++ b/cells/a311o/sky130_fd_sc_lp__a311o_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_lp__a311o_m.v b/cells/a311o/sky130_fd_sc_lp__a311o_m.v
index dcf8d2e..f8c1b8a 100644
--- a/cells/a311o/sky130_fd_sc_lp__a311o_m.v
+++ b/cells/a311o/sky130_fd_sc_lp__a311o_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_lp__a311oi_0.v b/cells/a311oi/sky130_fd_sc_lp__a311oi_0.v
index 4e6d311..3072be7 100644
--- a/cells/a311oi/sky130_fd_sc_lp__a311oi_0.v
+++ b/cells/a311oi/sky130_fd_sc_lp__a311oi_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_lp__a311oi_1.v b/cells/a311oi/sky130_fd_sc_lp__a311oi_1.v
index 096a4ca..9f35e51 100644
--- a/cells/a311oi/sky130_fd_sc_lp__a311oi_1.v
+++ b/cells/a311oi/sky130_fd_sc_lp__a311oi_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_lp__a311oi_2.v b/cells/a311oi/sky130_fd_sc_lp__a311oi_2.v
index ca7e106..b78c8fc 100644
--- a/cells/a311oi/sky130_fd_sc_lp__a311oi_2.v
+++ b/cells/a311oi/sky130_fd_sc_lp__a311oi_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_lp__a311oi_4.v b/cells/a311oi/sky130_fd_sc_lp__a311oi_4.v
index 0386923..7050a91 100644
--- a/cells/a311oi/sky130_fd_sc_lp__a311oi_4.v
+++ b/cells/a311oi/sky130_fd_sc_lp__a311oi_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_lp__a311oi_lp.v b/cells/a311oi/sky130_fd_sc_lp__a311oi_lp.v
index c4df75e..1b9e978 100644
--- a/cells/a311oi/sky130_fd_sc_lp__a311oi_lp.v
+++ b/cells/a311oi/sky130_fd_sc_lp__a311oi_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_lp__a311oi_m.v b/cells/a311oi/sky130_fd_sc_lp__a311oi_m.v
index dd21dec..5b47b01 100644
--- a/cells/a311oi/sky130_fd_sc_lp__a311oi_m.v
+++ b/cells/a311oi/sky130_fd_sc_lp__a311oi_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a311oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_lp__a31o_0.v b/cells/a31o/sky130_fd_sc_lp__a31o_0.v
index d7fb240..4bd3c7f 100644
--- a/cells/a31o/sky130_fd_sc_lp__a31o_0.v
+++ b/cells/a31o/sky130_fd_sc_lp__a31o_0.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_lp__a31o_1.v b/cells/a31o/sky130_fd_sc_lp__a31o_1.v
index 07ba008..52a44ff 100644
--- a/cells/a31o/sky130_fd_sc_lp__a31o_1.v
+++ b/cells/a31o/sky130_fd_sc_lp__a31o_1.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_lp__a31o_2.v b/cells/a31o/sky130_fd_sc_lp__a31o_2.v
index 70ca73e..b12bd60 100644
--- a/cells/a31o/sky130_fd_sc_lp__a31o_2.v
+++ b/cells/a31o/sky130_fd_sc_lp__a31o_2.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_lp__a31o_4.v b/cells/a31o/sky130_fd_sc_lp__a31o_4.v
index a477b74..418a3bb 100644
--- a/cells/a31o/sky130_fd_sc_lp__a31o_4.v
+++ b/cells/a31o/sky130_fd_sc_lp__a31o_4.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_lp__a31o_lp.v b/cells/a31o/sky130_fd_sc_lp__a31o_lp.v
index 216d2bd..4c37dd2 100644
--- a/cells/a31o/sky130_fd_sc_lp__a31o_lp.v
+++ b/cells/a31o/sky130_fd_sc_lp__a31o_lp.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_lp__a31o_m.v b/cells/a31o/sky130_fd_sc_lp__a31o_m.v
index e99ab8f..3f7e7d6 100644
--- a/cells/a31o/sky130_fd_sc_lp__a31o_m.v
+++ b/cells/a31o/sky130_fd_sc_lp__a31o_m.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_lp__a31oi_0.v b/cells/a31oi/sky130_fd_sc_lp__a31oi_0.v
index f5d6e0e..d18887f 100644
--- a/cells/a31oi/sky130_fd_sc_lp__a31oi_0.v
+++ b/cells/a31oi/sky130_fd_sc_lp__a31oi_0.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_lp__a31oi_1.v b/cells/a31oi/sky130_fd_sc_lp__a31oi_1.v
index f29d750..888bd31 100644
--- a/cells/a31oi/sky130_fd_sc_lp__a31oi_1.v
+++ b/cells/a31oi/sky130_fd_sc_lp__a31oi_1.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_lp__a31oi_2.v b/cells/a31oi/sky130_fd_sc_lp__a31oi_2.v
index bfff29e..719b308 100644
--- a/cells/a31oi/sky130_fd_sc_lp__a31oi_2.v
+++ b/cells/a31oi/sky130_fd_sc_lp__a31oi_2.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_lp__a31oi_4.v b/cells/a31oi/sky130_fd_sc_lp__a31oi_4.v
index 07cce88..4495a50 100644
--- a/cells/a31oi/sky130_fd_sc_lp__a31oi_4.v
+++ b/cells/a31oi/sky130_fd_sc_lp__a31oi_4.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_lp__a31oi_lp.v b/cells/a31oi/sky130_fd_sc_lp__a31oi_lp.v
index 97f4dd7..683cc35 100644
--- a/cells/a31oi/sky130_fd_sc_lp__a31oi_lp.v
+++ b/cells/a31oi/sky130_fd_sc_lp__a31oi_lp.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_lp__a31oi_m.v b/cells/a31oi/sky130_fd_sc_lp__a31oi_m.v
index fa795ec..52e6a33 100644
--- a/cells/a31oi/sky130_fd_sc_lp__a31oi_m.v
+++ b/cells/a31oi/sky130_fd_sc_lp__a31oi_m.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__a31oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_lp__a32o_0.v b/cells/a32o/sky130_fd_sc_lp__a32o_0.v
index 121b5fb..5cf0053 100644
--- a/cells/a32o/sky130_fd_sc_lp__a32o_0.v
+++ b/cells/a32o/sky130_fd_sc_lp__a32o_0.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_lp__a32o_1.v b/cells/a32o/sky130_fd_sc_lp__a32o_1.v
index 405c70c..f3f8a37 100644
--- a/cells/a32o/sky130_fd_sc_lp__a32o_1.v
+++ b/cells/a32o/sky130_fd_sc_lp__a32o_1.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_lp__a32o_2.v b/cells/a32o/sky130_fd_sc_lp__a32o_2.v
index 23e0c14..90b382d 100644
--- a/cells/a32o/sky130_fd_sc_lp__a32o_2.v
+++ b/cells/a32o/sky130_fd_sc_lp__a32o_2.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_lp__a32o_4.v b/cells/a32o/sky130_fd_sc_lp__a32o_4.v
index 66b414e..2b11649 100644
--- a/cells/a32o/sky130_fd_sc_lp__a32o_4.v
+++ b/cells/a32o/sky130_fd_sc_lp__a32o_4.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_lp__a32o_lp.v b/cells/a32o/sky130_fd_sc_lp__a32o_lp.v
index f1045b0..8a1eb0f 100644
--- a/cells/a32o/sky130_fd_sc_lp__a32o_lp.v
+++ b/cells/a32o/sky130_fd_sc_lp__a32o_lp.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_lp__a32o_m.v b/cells/a32o/sky130_fd_sc_lp__a32o_m.v
index 9587f54..518780d 100644
--- a/cells/a32o/sky130_fd_sc_lp__a32o_m.v
+++ b/cells/a32o/sky130_fd_sc_lp__a32o_m.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_lp__a32oi_0.v b/cells/a32oi/sky130_fd_sc_lp__a32oi_0.v
index 0d4675f..3c727e0 100644
--- a/cells/a32oi/sky130_fd_sc_lp__a32oi_0.v
+++ b/cells/a32oi/sky130_fd_sc_lp__a32oi_0.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_lp__a32oi_1.v b/cells/a32oi/sky130_fd_sc_lp__a32oi_1.v
index 27ed18e..218e451 100644
--- a/cells/a32oi/sky130_fd_sc_lp__a32oi_1.v
+++ b/cells/a32oi/sky130_fd_sc_lp__a32oi_1.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_lp__a32oi_2.v b/cells/a32oi/sky130_fd_sc_lp__a32oi_2.v
index ceef147..2169d13 100644
--- a/cells/a32oi/sky130_fd_sc_lp__a32oi_2.v
+++ b/cells/a32oi/sky130_fd_sc_lp__a32oi_2.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_lp__a32oi_4.v b/cells/a32oi/sky130_fd_sc_lp__a32oi_4.v
index b9f36bc..9ad9370 100644
--- a/cells/a32oi/sky130_fd_sc_lp__a32oi_4.v
+++ b/cells/a32oi/sky130_fd_sc_lp__a32oi_4.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_lp__a32oi_lp.v b/cells/a32oi/sky130_fd_sc_lp__a32oi_lp.v
index 009b60f..44ed52e 100644
--- a/cells/a32oi/sky130_fd_sc_lp__a32oi_lp.v
+++ b/cells/a32oi/sky130_fd_sc_lp__a32oi_lp.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_lp__a32oi_m.v b/cells/a32oi/sky130_fd_sc_lp__a32oi_m.v
index e1e5ab1..5891e91 100644
--- a/cells/a32oi/sky130_fd_sc_lp__a32oi_m.v
+++ b/cells/a32oi/sky130_fd_sc_lp__a32oi_m.v
@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a32oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_lp__a41o_0.v b/cells/a41o/sky130_fd_sc_lp__a41o_0.v
index 2da457a..2ff003e 100644
--- a/cells/a41o/sky130_fd_sc_lp__a41o_0.v
+++ b/cells/a41o/sky130_fd_sc_lp__a41o_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41o_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_lp__a41o_1.v b/cells/a41o/sky130_fd_sc_lp__a41o_1.v
index 320bdd5..5e8c642 100644
--- a/cells/a41o/sky130_fd_sc_lp__a41o_1.v
+++ b/cells/a41o/sky130_fd_sc_lp__a41o_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_lp__a41o_2.v b/cells/a41o/sky130_fd_sc_lp__a41o_2.v
index 03b7dde..af12ed9 100644
--- a/cells/a41o/sky130_fd_sc_lp__a41o_2.v
+++ b/cells/a41o/sky130_fd_sc_lp__a41o_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_lp__a41o_4.v b/cells/a41o/sky130_fd_sc_lp__a41o_4.v
index 9bded25..4828ea4 100644
--- a/cells/a41o/sky130_fd_sc_lp__a41o_4.v
+++ b/cells/a41o/sky130_fd_sc_lp__a41o_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_lp__a41o_lp.v b/cells/a41o/sky130_fd_sc_lp__a41o_lp.v
index d362f8f..c4cf37b 100644
--- a/cells/a41o/sky130_fd_sc_lp__a41o_lp.v
+++ b/cells/a41o/sky130_fd_sc_lp__a41o_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41o_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_lp__a41o_m.v b/cells/a41o/sky130_fd_sc_lp__a41o_m.v
index b61d46d..f6a5750 100644
--- a/cells/a41o/sky130_fd_sc_lp__a41o_m.v
+++ b/cells/a41o/sky130_fd_sc_lp__a41o_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41o_m (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_lp__a41oi_0.v b/cells/a41oi/sky130_fd_sc_lp__a41oi_0.v
index b8cb1dc..e2d0e36 100644
--- a/cells/a41oi/sky130_fd_sc_lp__a41oi_0.v
+++ b/cells/a41oi/sky130_fd_sc_lp__a41oi_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_lp__a41oi_1.v b/cells/a41oi/sky130_fd_sc_lp__a41oi_1.v
index 7aa9805..41d5f93 100644
--- a/cells/a41oi/sky130_fd_sc_lp__a41oi_1.v
+++ b/cells/a41oi/sky130_fd_sc_lp__a41oi_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_lp__a41oi_2.v b/cells/a41oi/sky130_fd_sc_lp__a41oi_2.v
index 1db712b..89b34c4 100644
--- a/cells/a41oi/sky130_fd_sc_lp__a41oi_2.v
+++ b/cells/a41oi/sky130_fd_sc_lp__a41oi_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_lp__a41oi_4.v b/cells/a41oi/sky130_fd_sc_lp__a41oi_4.v
index 22438c1..008f5d5 100644
--- a/cells/a41oi/sky130_fd_sc_lp__a41oi_4.v
+++ b/cells/a41oi/sky130_fd_sc_lp__a41oi_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_lp__a41oi_lp.v b/cells/a41oi/sky130_fd_sc_lp__a41oi_lp.v
index 30cadd9..7390818 100644
--- a/cells/a41oi/sky130_fd_sc_lp__a41oi_lp.v
+++ b/cells/a41oi/sky130_fd_sc_lp__a41oi_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41oi_lp (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_lp__a41oi_m.v b/cells/a41oi/sky130_fd_sc_lp__a41oi_m.v
index 91bbdbe..9a85b28 100644
--- a/cells/a41oi/sky130_fd_sc_lp__a41oi_m.v
+++ b/cells/a41oi/sky130_fd_sc_lp__a41oi_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__a41oi_m (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_lp__and2_0.v b/cells/and2/sky130_fd_sc_lp__and2_0.v
index dc80527..57abc98 100644
--- a/cells/and2/sky130_fd_sc_lp__and2_0.v
+++ b/cells/and2/sky130_fd_sc_lp__and2_0.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2_0 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_lp__and2_1.v b/cells/and2/sky130_fd_sc_lp__and2_1.v
index a2069a8..8b30d1e 100644
--- a/cells/and2/sky130_fd_sc_lp__and2_1.v
+++ b/cells/and2/sky130_fd_sc_lp__and2_1.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2_1 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_lp__and2_2.v b/cells/and2/sky130_fd_sc_lp__and2_2.v
index 239b82f..1638cb2 100644
--- a/cells/and2/sky130_fd_sc_lp__and2_2.v
+++ b/cells/and2/sky130_fd_sc_lp__and2_2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2_2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_lp__and2_4.v b/cells/and2/sky130_fd_sc_lp__and2_4.v
index d4951b1..0792cac 100644
--- a/cells/and2/sky130_fd_sc_lp__and2_4.v
+++ b/cells/and2/sky130_fd_sc_lp__and2_4.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2_4 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_lp__and2_lp.v b/cells/and2/sky130_fd_sc_lp__and2_lp.v
index 9c1ccea..129525a 100644
--- a/cells/and2/sky130_fd_sc_lp__and2_lp.v
+++ b/cells/and2/sky130_fd_sc_lp__and2_lp.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2_lp (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_lp__and2_lp2.v b/cells/and2/sky130_fd_sc_lp__and2_lp2.v
index a8ee5b6..c9345a3 100644
--- a/cells/and2/sky130_fd_sc_lp__and2_lp2.v
+++ b/cells/and2/sky130_fd_sc_lp__and2_lp2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2_lp2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_lp__and2_m.v b/cells/and2/sky130_fd_sc_lp__and2_m.v
index a4a5320..45b1194 100644
--- a/cells/and2/sky130_fd_sc_lp__and2_m.v
+++ b/cells/and2/sky130_fd_sc_lp__and2_m.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2_m (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_lp__and2b_1.v b/cells/and2b/sky130_fd_sc_lp__and2b_1.v
index d693e2b..eaf5f96 100644
--- a/cells/and2b/sky130_fd_sc_lp__and2b_1.v
+++ b/cells/and2b/sky130_fd_sc_lp__and2b_1.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_lp__and2b_2.v b/cells/and2b/sky130_fd_sc_lp__and2b_2.v
index 3a1740b..8cf28b5 100644
--- a/cells/and2b/sky130_fd_sc_lp__and2b_2.v
+++ b/cells/and2b/sky130_fd_sc_lp__and2b_2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_lp__and2b_4.v b/cells/and2b/sky130_fd_sc_lp__and2b_4.v
index 7a6be46..b150d8c 100644
--- a/cells/and2b/sky130_fd_sc_lp__and2b_4.v
+++ b/cells/and2b/sky130_fd_sc_lp__and2b_4.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_lp__and2b_lp.v b/cells/and2b/sky130_fd_sc_lp__and2b_lp.v
index ea0685c..9a00287 100644
--- a/cells/and2b/sky130_fd_sc_lp__and2b_lp.v
+++ b/cells/and2b/sky130_fd_sc_lp__and2b_lp.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2b_lp (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_lp__and2b_m.v b/cells/and2b/sky130_fd_sc_lp__and2b_m.v
index 79630b3..a9fd83b 100644
--- a/cells/and2b/sky130_fd_sc_lp__and2b_m.v
+++ b/cells/and2b/sky130_fd_sc_lp__and2b_m.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__and2b_m (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_lp__and3_0.v b/cells/and3/sky130_fd_sc_lp__and3_0.v
index 18125dd..f2774fd 100644
--- a/cells/and3/sky130_fd_sc_lp__and3_0.v
+++ b/cells/and3/sky130_fd_sc_lp__and3_0.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3_0 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_lp__and3_1.v b/cells/and3/sky130_fd_sc_lp__and3_1.v
index 15b6198..0fbdb90 100644
--- a/cells/and3/sky130_fd_sc_lp__and3_1.v
+++ b/cells/and3/sky130_fd_sc_lp__and3_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_lp__and3_2.v b/cells/and3/sky130_fd_sc_lp__and3_2.v
index 25364b5..15c0e4f 100644
--- a/cells/and3/sky130_fd_sc_lp__and3_2.v
+++ b/cells/and3/sky130_fd_sc_lp__and3_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_lp__and3_4.v b/cells/and3/sky130_fd_sc_lp__and3_4.v
index 429af41..45ea380 100644
--- a/cells/and3/sky130_fd_sc_lp__and3_4.v
+++ b/cells/and3/sky130_fd_sc_lp__and3_4.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_lp__and3_lp.v b/cells/and3/sky130_fd_sc_lp__and3_lp.v
index d6f6729..b1cb906 100644
--- a/cells/and3/sky130_fd_sc_lp__and3_lp.v
+++ b/cells/and3/sky130_fd_sc_lp__and3_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3_lp (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_lp__and3_m.v b/cells/and3/sky130_fd_sc_lp__and3_m.v
index 4edece8..e1fd2d8 100644
--- a/cells/and3/sky130_fd_sc_lp__and3_m.v
+++ b/cells/and3/sky130_fd_sc_lp__and3_m.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3_m (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_lp__and3b_1.v b/cells/and3b/sky130_fd_sc_lp__and3b_1.v
index 7c1fbad..4c8f0ef 100644
--- a/cells/and3b/sky130_fd_sc_lp__and3b_1.v
+++ b/cells/and3b/sky130_fd_sc_lp__and3b_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_lp__and3b_2.v b/cells/and3b/sky130_fd_sc_lp__and3b_2.v
index 508cbe9..346646b 100644
--- a/cells/and3b/sky130_fd_sc_lp__and3b_2.v
+++ b/cells/and3b/sky130_fd_sc_lp__and3b_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_lp__and3b_4.v b/cells/and3b/sky130_fd_sc_lp__and3b_4.v
index f5a7f20..a933112 100644
--- a/cells/and3b/sky130_fd_sc_lp__and3b_4.v
+++ b/cells/and3b/sky130_fd_sc_lp__and3b_4.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_lp__and3b_lp.v b/cells/and3b/sky130_fd_sc_lp__and3b_lp.v
index 1d9c4f6..ff71ade 100644
--- a/cells/and3b/sky130_fd_sc_lp__and3b_lp.v
+++ b/cells/and3b/sky130_fd_sc_lp__and3b_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3b_lp (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_lp__and3b_m.v b/cells/and3b/sky130_fd_sc_lp__and3b_m.v
index e829a7b..7a41c46 100644
--- a/cells/and3b/sky130_fd_sc_lp__and3b_m.v
+++ b/cells/and3b/sky130_fd_sc_lp__and3b_m.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__and3b_m (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_lp__and4_0.v b/cells/and4/sky130_fd_sc_lp__and4_0.v
index 95f69da..3a0dbb2 100644
--- a/cells/and4/sky130_fd_sc_lp__and4_0.v
+++ b/cells/and4/sky130_fd_sc_lp__and4_0.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4_0 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_lp__and4_1.v b/cells/and4/sky130_fd_sc_lp__and4_1.v
index 590e4f8..ad68b0b 100644
--- a/cells/and4/sky130_fd_sc_lp__and4_1.v
+++ b/cells/and4/sky130_fd_sc_lp__and4_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_lp__and4_2.v b/cells/and4/sky130_fd_sc_lp__and4_2.v
index 0dd8c89..f15f7c7 100644
--- a/cells/and4/sky130_fd_sc_lp__and4_2.v
+++ b/cells/and4/sky130_fd_sc_lp__and4_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_lp__and4_4.v b/cells/and4/sky130_fd_sc_lp__and4_4.v
index fbafd01..f843948 100644
--- a/cells/and4/sky130_fd_sc_lp__and4_4.v
+++ b/cells/and4/sky130_fd_sc_lp__and4_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_lp__and4_lp.v b/cells/and4/sky130_fd_sc_lp__and4_lp.v
index 4b65d31..08edad2 100644
--- a/cells/and4/sky130_fd_sc_lp__and4_lp.v
+++ b/cells/and4/sky130_fd_sc_lp__and4_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4_lp (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_lp__and4_lp2.v b/cells/and4/sky130_fd_sc_lp__and4_lp2.v
index b0d3b3e..26785f7 100644
--- a/cells/and4/sky130_fd_sc_lp__and4_lp2.v
+++ b/cells/and4/sky130_fd_sc_lp__and4_lp2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4_lp2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_lp__and4_m.v b/cells/and4/sky130_fd_sc_lp__and4_m.v
index 9e671b6..4503f4c 100644
--- a/cells/and4/sky130_fd_sc_lp__and4_m.v
+++ b/cells/and4/sky130_fd_sc_lp__and4_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4_m (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_lp__and4b_1.v b/cells/and4b/sky130_fd_sc_lp__and4b_1.v
index 38a606f..ba1d1fb 100644
--- a/cells/and4b/sky130_fd_sc_lp__and4b_1.v
+++ b/cells/and4b/sky130_fd_sc_lp__and4b_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_lp__and4b_2.v b/cells/and4b/sky130_fd_sc_lp__and4b_2.v
index 6b3eb12..74e71d8 100644
--- a/cells/and4b/sky130_fd_sc_lp__and4b_2.v
+++ b/cells/and4b/sky130_fd_sc_lp__and4b_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_lp__and4b_4.v b/cells/and4b/sky130_fd_sc_lp__and4b_4.v
index edded5b..23fb662 100644
--- a/cells/and4b/sky130_fd_sc_lp__and4b_4.v
+++ b/cells/and4b/sky130_fd_sc_lp__and4b_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_lp__and4b_lp.v b/cells/and4b/sky130_fd_sc_lp__and4b_lp.v
index f9818f6..baac757 100644
--- a/cells/and4b/sky130_fd_sc_lp__and4b_lp.v
+++ b/cells/and4b/sky130_fd_sc_lp__and4b_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4b_lp (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_lp__and4b_m.v b/cells/and4b/sky130_fd_sc_lp__and4b_m.v
index 6248c6c..1238242 100644
--- a/cells/and4b/sky130_fd_sc_lp__and4b_m.v
+++ b/cells/and4b/sky130_fd_sc_lp__and4b_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4b_m (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_lp__and4bb_1.v b/cells/and4bb/sky130_fd_sc_lp__and4bb_1.v
index 9c1063f..fecfd28 100644
--- a/cells/and4bb/sky130_fd_sc_lp__and4bb_1.v
+++ b/cells/and4bb/sky130_fd_sc_lp__and4bb_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4bb_1 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_lp__and4bb_2.v b/cells/and4bb/sky130_fd_sc_lp__and4bb_2.v
index 9c4ae20..7b94f49 100644
--- a/cells/and4bb/sky130_fd_sc_lp__and4bb_2.v
+++ b/cells/and4bb/sky130_fd_sc_lp__and4bb_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4bb_2 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_lp__and4bb_4.v b/cells/and4bb/sky130_fd_sc_lp__and4bb_4.v
index aabef02..09aff3a 100644
--- a/cells/and4bb/sky130_fd_sc_lp__and4bb_4.v
+++ b/cells/and4bb/sky130_fd_sc_lp__and4bb_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4bb_4 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_lp__and4bb_lp.v b/cells/and4bb/sky130_fd_sc_lp__and4bb_lp.v
index 8901d98..bdedd28 100644
--- a/cells/and4bb/sky130_fd_sc_lp__and4bb_lp.v
+++ b/cells/and4bb/sky130_fd_sc_lp__and4bb_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4bb_lp (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_lp__and4bb_m.v b/cells/and4bb/sky130_fd_sc_lp__and4bb_m.v
index b310a93..94f1e42 100644
--- a/cells/and4bb/sky130_fd_sc_lp__and4bb_m.v
+++ b/cells/and4bb/sky130_fd_sc_lp__and4bb_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__and4bb_m (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_0.v b/cells/buf/sky130_fd_sc_lp__buf_0.v
index 1b6bbb8..d15b2b1 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_0.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_0 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_1.v b/cells/buf/sky130_fd_sc_lp__buf_1.v
index 96dd64f..46c31cb 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_1.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_16.v b/cells/buf/sky130_fd_sc_lp__buf_16.v
index 8c06358..3dc9fc5 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_16.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_2.v b/cells/buf/sky130_fd_sc_lp__buf_2.v
index 3f79ecd..131b0cf 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_2.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_4.v b/cells/buf/sky130_fd_sc_lp__buf_4.v
index 3403329..0521789 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_4.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_8.v b/cells/buf/sky130_fd_sc_lp__buf_8.v
index 96b1851..5aa53f8 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_8.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_lp.v b/cells/buf/sky130_fd_sc_lp__buf_lp.v
index 9e8dea9..f583628 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_lp.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_lp.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_lp (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_lp__buf_m.v b/cells/buf/sky130_fd_sc_lp__buf_m.v
index d49b646..68883d0 100644
--- a/cells/buf/sky130_fd_sc_lp__buf_m.v
+++ b/cells/buf/sky130_fd_sc_lp__buf_m.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buf_m (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/bufbuf/sky130_fd_sc_lp__bufbuf_16.v b/cells/bufbuf/sky130_fd_sc_lp__bufbuf_16.v
index e65240c..39c5063 100644
--- a/cells/bufbuf/sky130_fd_sc_lp__bufbuf_16.v
+++ b/cells/bufbuf/sky130_fd_sc_lp__bufbuf_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufbuf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/bufbuf/sky130_fd_sc_lp__bufbuf_8.v b/cells/bufbuf/sky130_fd_sc_lp__bufbuf_8.v
index e7abe41..2ed8d67 100644
--- a/cells/bufbuf/sky130_fd_sc_lp__bufbuf_8.v
+++ b/cells/bufbuf/sky130_fd_sc_lp__bufbuf_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufbuf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/bufinv/sky130_fd_sc_lp__bufinv_16.v b/cells/bufinv/sky130_fd_sc_lp__bufinv_16.v
index e2db209..e2e8722 100644
--- a/cells/bufinv/sky130_fd_sc_lp__bufinv_16.v
+++ b/cells/bufinv/sky130_fd_sc_lp__bufinv_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufinv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/bufinv/sky130_fd_sc_lp__bufinv_8.v b/cells/bufinv/sky130_fd_sc_lp__bufinv_8.v
index aebed4d..4627b7d 100644
--- a/cells/bufinv/sky130_fd_sc_lp__bufinv_8.v
+++ b/cells/bufinv/sky130_fd_sc_lp__bufinv_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufinv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_1.v b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_1.v
index 481d175..cf408e4 100644
--- a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_1.v
+++ b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_1.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufkapwr_1 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_2.v b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_2.v
index 36edcdf..77779e8 100644
--- a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_2.v
+++ b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_2.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufkapwr_2 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_4.v b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_4.v
index fdbc04a..9838215 100644
--- a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_4.v
+++ b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_4.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufkapwr_4 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_8.v b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_8.v
index 333da73..342284f 100644
--- a/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_8.v
+++ b/cells/bufkapwr/sky130_fd_sc_lp__bufkapwr_8.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__bufkapwr_8 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/buflp/sky130_fd_sc_lp__buflp_0.v b/cells/buflp/sky130_fd_sc_lp__buflp_0.v
index 102e7c5..1c68920 100644
--- a/cells/buflp/sky130_fd_sc_lp__buflp_0.v
+++ b/cells/buflp/sky130_fd_sc_lp__buflp_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buflp_0 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buflp/sky130_fd_sc_lp__buflp_1.v b/cells/buflp/sky130_fd_sc_lp__buflp_1.v
index ddbd727..edbf37b 100644
--- a/cells/buflp/sky130_fd_sc_lp__buflp_1.v
+++ b/cells/buflp/sky130_fd_sc_lp__buflp_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buflp_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buflp/sky130_fd_sc_lp__buflp_2.v b/cells/buflp/sky130_fd_sc_lp__buflp_2.v
index 8e7f471..6058b8c 100644
--- a/cells/buflp/sky130_fd_sc_lp__buflp_2.v
+++ b/cells/buflp/sky130_fd_sc_lp__buflp_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buflp_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buflp/sky130_fd_sc_lp__buflp_4.v b/cells/buflp/sky130_fd_sc_lp__buflp_4.v
index 09808a6..bdf24a7 100644
--- a/cells/buflp/sky130_fd_sc_lp__buflp_4.v
+++ b/cells/buflp/sky130_fd_sc_lp__buflp_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buflp_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buflp/sky130_fd_sc_lp__buflp_8.v b/cells/buflp/sky130_fd_sc_lp__buflp_8.v
index 2b3de4f..1f21de6 100644
--- a/cells/buflp/sky130_fd_sc_lp__buflp_8.v
+++ b/cells/buflp/sky130_fd_sc_lp__buflp_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buflp_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/buflp/sky130_fd_sc_lp__buflp_m.v b/cells/buflp/sky130_fd_sc_lp__buflp_m.v
index 24d3491..c7e600a 100644
--- a/cells/buflp/sky130_fd_sc_lp__buflp_m.v
+++ b/cells/buflp/sky130_fd_sc_lp__buflp_m.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__buflp_m (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busdriver/sky130_fd_sc_lp__busdriver_20.v b/cells/busdriver/sky130_fd_sc_lp__busdriver_20.v
index 882169c..d369caf 100644
--- a/cells/busdriver/sky130_fd_sc_lp__busdriver_20.v
+++ b/cells/busdriver/sky130_fd_sc_lp__busdriver_20.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__busdriver_20 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busdriver2/sky130_fd_sc_lp__busdriver2_20.v b/cells/busdriver2/sky130_fd_sc_lp__busdriver2_20.v
index 8bb4555..7531cd3 100644
--- a/cells/busdriver2/sky130_fd_sc_lp__busdriver2_20.v
+++ b/cells/busdriver2/sky130_fd_sc_lp__busdriver2_20.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__busdriver2_20 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busdrivernovlp/sky130_fd_sc_lp__busdrivernovlp_20.v b/cells/busdrivernovlp/sky130_fd_sc_lp__busdrivernovlp_20.v
index f41f98c..7de83c4 100644
--- a/cells/busdrivernovlp/sky130_fd_sc_lp__busdrivernovlp_20.v
+++ b/cells/busdrivernovlp/sky130_fd_sc_lp__busdrivernovlp_20.v
@@ -75,20 +75,12 @@
 module sky130_fd_sc_lp__busdrivernovlp_20 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busdrivernovlp2/sky130_fd_sc_lp__busdrivernovlp2_20.v b/cells/busdrivernovlp2/sky130_fd_sc_lp__busdrivernovlp2_20.v
index 31cab29..74842c5 100644
--- a/cells/busdrivernovlp2/sky130_fd_sc_lp__busdrivernovlp2_20.v
+++ b/cells/busdrivernovlp2/sky130_fd_sc_lp__busdrivernovlp2_20.v
@@ -75,20 +75,12 @@
 module sky130_fd_sc_lp__busdrivernovlp2_20 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busdrivernovlpsleep/sky130_fd_sc_lp__busdrivernovlpsleep_20.v b/cells/busdrivernovlpsleep/sky130_fd_sc_lp__busdrivernovlpsleep_20.v
index 0f69c48..41f389e 100644
--- a/cells/busdrivernovlpsleep/sky130_fd_sc_lp__busdrivernovlpsleep_20.v
+++ b/cells/busdrivernovlpsleep/sky130_fd_sc_lp__busdrivernovlpsleep_20.v
@@ -82,23 +82,13 @@
     Z    ,
     A    ,
     TE_B ,
-    SLEEP,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output Z    ;
     input  A    ;
     input  TE_B ;
     input  SLEEP;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/bushold/sky130_fd_sc_lp__bushold_1.v b/cells/bushold/sky130_fd_sc_lp__bushold_1.v
index 1cdeb65..85683f3 100644
--- a/cells/bushold/sky130_fd_sc_lp__bushold_1.v
+++ b/cells/bushold/sky130_fd_sc_lp__bushold_1.v
@@ -71,19 +71,11 @@
 `celldefine
 module sky130_fd_sc_lp__bushold_1 (
     X    ,
-    RESET,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    RESET
 );
 
     inout X    ;
     input RESET;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/bushold0/sky130_fd_sc_lp__bushold0_1.v b/cells/bushold0/sky130_fd_sc_lp__bushold0_1.v
index da60f93..2f74d67 100644
--- a/cells/bushold0/sky130_fd_sc_lp__bushold0_1.v
+++ b/cells/bushold0/sky130_fd_sc_lp__bushold0_1.v
@@ -71,19 +71,11 @@
 `celldefine
 module sky130_fd_sc_lp__bushold0_1 (
     X    ,
-    RESET,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    RESET
 );
 
     inout X    ;
     input RESET;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busreceiver/sky130_fd_sc_lp__busreceiver_0.v b/cells/busreceiver/sky130_fd_sc_lp__busreceiver_0.v
index 7df0698..b52c1be 100644
--- a/cells/busreceiver/sky130_fd_sc_lp__busreceiver_0.v
+++ b/cells/busreceiver/sky130_fd_sc_lp__busreceiver_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__busreceiver_0 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busreceiver/sky130_fd_sc_lp__busreceiver_1.v b/cells/busreceiver/sky130_fd_sc_lp__busreceiver_1.v
index 97a5f61..cbe822c 100644
--- a/cells/busreceiver/sky130_fd_sc_lp__busreceiver_1.v
+++ b/cells/busreceiver/sky130_fd_sc_lp__busreceiver_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__busreceiver_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/busreceiver/sky130_fd_sc_lp__busreceiver_m.v b/cells/busreceiver/sky130_fd_sc_lp__busreceiver_m.v
index 0d92e14..52b9730 100644
--- a/cells/busreceiver/sky130_fd_sc_lp__busreceiver_m.v
+++ b/cells/busreceiver/sky130_fd_sc_lp__busreceiver_m.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__busreceiver_m (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_0.v b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_0.v
index 45136f5..2bac75e 100644
--- a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_0.v
+++ b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuf_0 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_1.v b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_1.v
index 697ac01..b340c28 100644
--- a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_1.v
+++ b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuf_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_16.v b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_16.v
index bbf9782..e2d9084 100644
--- a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_16.v
+++ b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_2.v b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_2.v
index d97d91a..7498e29 100644
--- a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_2.v
+++ b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuf_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_4.v b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_4.v
index cd5865a..234e476 100644
--- a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_4.v
+++ b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuf_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_8.v b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_8.v
index f49430a..01c5fcf 100644
--- a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_8.v
+++ b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_lp.v b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_lp.v
index ac0e283..6fe0afd 100644
--- a/cells/clkbuf/sky130_fd_sc_lp__clkbuf_lp.v
+++ b/cells/clkbuf/sky130_fd_sc_lp__clkbuf_lp.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuf_lp (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_16.v b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_16.v
index f4f137d..af54a90 100644
--- a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_16.v
+++ b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuflp_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_2.v b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_2.v
index 0760879..7990e72 100644
--- a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_2.v
+++ b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuflp_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_4.v b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_4.v
index 7567b40..4e3a512 100644
--- a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_4.v
+++ b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuflp_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_8.v b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_8.v
index 8553001..923354f 100644
--- a/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_8.v
+++ b/cells/clkbuflp/sky130_fd_sc_lp__clkbuflp_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkbuflp_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_1.v b/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_1.v
index 2736c21..41a4c87 100644
--- a/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_1.v
+++ b/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_1.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s15_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_2.v b/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_2.v
index 7aa468e..2a5bad5 100644
--- a/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_2.v
+++ b/cells/clkdlybuf4s15/sky130_fd_sc_lp__clkdlybuf4s15_2.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s15_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_1.v b/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_1.v
index ecc7ac3..bde528a 100644
--- a/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_1.v
+++ b/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_1.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s18_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_2.v b/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_2.v
index b5a4cf7..cc21ad3 100644
--- a/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_2.v
+++ b/cells/clkdlybuf4s18/sky130_fd_sc_lp__clkdlybuf4s18_2.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s18_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_1.v b/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_1.v
index beaf216..1386f5b 100644
--- a/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_1.v
+++ b/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_1.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s25_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_2.v b/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_2.v
index 8799ab2..54efee1 100644
--- a/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_2.v
+++ b/cells/clkdlybuf4s25/sky130_fd_sc_lp__clkdlybuf4s25_2.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s25_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_1.v b/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_1.v
index 41ba21c..dc6d5a2 100644
--- a/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_1.v
+++ b/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_1.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s50_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_2.v b/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_2.v
index a8863d2..0cce8cc 100644
--- a/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_2.v
+++ b/cells/clkdlybuf4s50/sky130_fd_sc_lp__clkdlybuf4s50_2.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkdlybuf4s50_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_0.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_0.v
index f59da63..f5dab22 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_0.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_0 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_1.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_1.v
index 82904a3..3aa7e2b 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_1.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_16.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_16.v
index 67671e4..31695ac 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_16.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_2.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_2.v
index 3ed2acc..dd6d7b0 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_2.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_4.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_4.v
index 932ce5e..2276011 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_4.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_8.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_8.v
index b3cb004..9981143 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_8.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_lp.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_lp.v
index 2dc033d..7d1be79 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_lp.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_lp.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_lp (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_lp__clkinv_lp2.v b/cells/clkinv/sky130_fd_sc_lp__clkinv_lp2.v
index ea8c79a..ffb1000 100644
--- a/cells/clkinv/sky130_fd_sc_lp__clkinv_lp2.v
+++ b/cells/clkinv/sky130_fd_sc_lp__clkinv_lp2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinv_lp2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_16.v b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_16.v
index 7b25957..1dfb15f 100644
--- a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_16.v
+++ b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinvlp_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_2.v b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_2.v
index 8d32bed..b3d05be 100644
--- a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_2.v
+++ b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinvlp_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_4.v b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_4.v
index 90f1133..b890900 100644
--- a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_4.v
+++ b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinvlp_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_8.v b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_8.v
index 0b96e2a..47a38ad 100644
--- a/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_8.v
+++ b/cells/clkinvlp/sky130_fd_sc_lp__clkinvlp_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__clkinvlp_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/conb/sky130_fd_sc_lp__conb_0.v b/cells/conb/sky130_fd_sc_lp__conb_0.v
index 956f599..5b8b131 100644
--- a/cells/conb/sky130_fd_sc_lp__conb_0.v
+++ b/cells/conb/sky130_fd_sc_lp__conb_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__conb_0 (
-    HI  ,
-    LO  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    HI,
+    LO
 );
 
-    output HI  ;
-    output LO  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output HI;
+    output LO;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/conb/sky130_fd_sc_lp__conb_1.v b/cells/conb/sky130_fd_sc_lp__conb_1.v
index 28ad2e4..4b74d00 100644
--- a/cells/conb/sky130_fd_sc_lp__conb_1.v
+++ b/cells/conb/sky130_fd_sc_lp__conb_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__conb_1 (
-    HI  ,
-    LO  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    HI,
+    LO
 );
 
-    output HI  ;
-    output LO  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output HI;
+    output LO;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/decap/sky130_fd_sc_lp__decap_12.v b/cells/decap/sky130_fd_sc_lp__decap_12.v
index ef74024..3f5d939 100644
--- a/cells/decap/sky130_fd_sc_lp__decap_12.v
+++ b/cells/decap/sky130_fd_sc_lp__decap_12.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decap_12 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__decap_12 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/decap/sky130_fd_sc_lp__decap_3.v b/cells/decap/sky130_fd_sc_lp__decap_3.v
index 64292ce..169579e 100644
--- a/cells/decap/sky130_fd_sc_lp__decap_3.v
+++ b/cells/decap/sky130_fd_sc_lp__decap_3.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decap_3 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__decap_3 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/decap/sky130_fd_sc_lp__decap_4.v b/cells/decap/sky130_fd_sc_lp__decap_4.v
index 9f69ded..b0240e8 100644
--- a/cells/decap/sky130_fd_sc_lp__decap_4.v
+++ b/cells/decap/sky130_fd_sc_lp__decap_4.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decap_4 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__decap_4 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/decap/sky130_fd_sc_lp__decap_6.v b/cells/decap/sky130_fd_sc_lp__decap_6.v
index f54d514..119549d 100644
--- a/cells/decap/sky130_fd_sc_lp__decap_6.v
+++ b/cells/decap/sky130_fd_sc_lp__decap_6.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decap_6 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__decap_6 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/decap/sky130_fd_sc_lp__decap_8.v b/cells/decap/sky130_fd_sc_lp__decap_8.v
index 3407ea3..03cd80a 100644
--- a/cells/decap/sky130_fd_sc_lp__decap_8.v
+++ b/cells/decap/sky130_fd_sc_lp__decap_8.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decap_8 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__decap_8 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_12.v b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_12.v
index a337a9b..e184a0d 100644
--- a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_12.v
+++ b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_12.v
@@ -65,20 +65,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decapkapwr_12 (
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input KAPWR;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_lp__decapkapwr_12 ();
     // Voltage supply signals
     supply1 KAPWR;
     supply1 VPWR ;
diff --git a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_3.v b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_3.v
index 039de11..893acf8 100644
--- a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_3.v
+++ b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_3.v
@@ -65,20 +65,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decapkapwr_3 (
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input KAPWR;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_lp__decapkapwr_3 ();
     // Voltage supply signals
     supply1 KAPWR;
     supply1 VPWR ;
diff --git a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_4.v b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_4.v
index ed3926a..017e555 100644
--- a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_4.v
+++ b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_4.v
@@ -65,20 +65,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decapkapwr_4 (
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input KAPWR;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_lp__decapkapwr_4 ();
     // Voltage supply signals
     supply1 KAPWR;
     supply1 VPWR ;
diff --git a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_6.v b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_6.v
index cdc455d..1a3d5a5 100644
--- a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_6.v
+++ b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_6.v
@@ -65,20 +65,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decapkapwr_6 (
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input KAPWR;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_lp__decapkapwr_6 ();
     // Voltage supply signals
     supply1 KAPWR;
     supply1 VPWR ;
diff --git a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_8.v b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_8.v
index 799b574..8820b93 100644
--- a/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_8.v
+++ b/cells/decapkapwr/sky130_fd_sc_lp__decapkapwr_8.v
@@ -65,20 +65,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__decapkapwr_8 (
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input KAPWR;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_lp__decapkapwr_8 ();
     // Voltage supply signals
     supply1 KAPWR;
     supply1 VPWR ;
diff --git a/cells/dfbbn/sky130_fd_sc_lp__dfbbn_1.v b/cells/dfbbn/sky130_fd_sc_lp__dfbbn_1.v
index bb7a813..cf7e39a 100644
--- a/cells/dfbbn/sky130_fd_sc_lp__dfbbn_1.v
+++ b/cells/dfbbn/sky130_fd_sc_lp__dfbbn_1.v
@@ -87,11 +87,7 @@
     D      ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfbbn/sky130_fd_sc_lp__dfbbn_2.v b/cells/dfbbn/sky130_fd_sc_lp__dfbbn_2.v
index 52f1ae3..8e14ae0 100644
--- a/cells/dfbbn/sky130_fd_sc_lp__dfbbn_2.v
+++ b/cells/dfbbn/sky130_fd_sc_lp__dfbbn_2.v
@@ -87,11 +87,7 @@
     D      ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfbbp/sky130_fd_sc_lp__dfbbp_1.v b/cells/dfbbp/sky130_fd_sc_lp__dfbbp_1.v
index 1cb7cbd..d82fb30 100644
--- a/cells/dfbbp/sky130_fd_sc_lp__dfbbp_1.v
+++ b/cells/dfbbp/sky130_fd_sc_lp__dfbbp_1.v
@@ -87,11 +87,7 @@
     D      ,
     CLK    ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK    ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfrbp/sky130_fd_sc_lp__dfrbp_1.v b/cells/dfrbp/sky130_fd_sc_lp__dfrbp_1.v
index 9461b61..3e96432 100644
--- a/cells/dfrbp/sky130_fd_sc_lp__dfrbp_1.v
+++ b/cells/dfrbp/sky130_fd_sc_lp__dfrbp_1.v
@@ -82,11 +82,7 @@
     Q_N    ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -94,10 +90,6 @@
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfrbp/sky130_fd_sc_lp__dfrbp_2.v b/cells/dfrbp/sky130_fd_sc_lp__dfrbp_2.v
index 7267205..ca95dcd 100644
--- a/cells/dfrbp/sky130_fd_sc_lp__dfrbp_2.v
+++ b/cells/dfrbp/sky130_fd_sc_lp__dfrbp_2.v
@@ -82,11 +82,7 @@
     Q_N    ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -94,10 +90,6 @@
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfrbp/sky130_fd_sc_lp__dfrbp_lp.v b/cells/dfrbp/sky130_fd_sc_lp__dfrbp_lp.v
index 82badca..0defeb2 100644
--- a/cells/dfrbp/sky130_fd_sc_lp__dfrbp_lp.v
+++ b/cells/dfrbp/sky130_fd_sc_lp__dfrbp_lp.v
@@ -82,11 +82,7 @@
     Q_N    ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -94,10 +90,6 @@
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfrtn/sky130_fd_sc_lp__dfrtn_1.v b/cells/dfrtn/sky130_fd_sc_lp__dfrtn_1.v
index 44076b4..8b5b967 100644
--- a/cells/dfrtn/sky130_fd_sc_lp__dfrtn_1.v
+++ b/cells/dfrtn/sky130_fd_sc_lp__dfrtn_1.v
@@ -79,21 +79,13 @@
     Q      ,
     CLK_N  ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK_N  ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfrtp/sky130_fd_sc_lp__dfrtp_1.v b/cells/dfrtp/sky130_fd_sc_lp__dfrtp_1.v
index 2b62455..d2e9b58 100644
--- a/cells/dfrtp/sky130_fd_sc_lp__dfrtp_1.v
+++ b/cells/dfrtp/sky130_fd_sc_lp__dfrtp_1.v
@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfrtp/sky130_fd_sc_lp__dfrtp_2.v b/cells/dfrtp/sky130_fd_sc_lp__dfrtp_2.v
index 1afa23d..6d45a17 100644
--- a/cells/dfrtp/sky130_fd_sc_lp__dfrtp_2.v
+++ b/cells/dfrtp/sky130_fd_sc_lp__dfrtp_2.v
@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfrtp/sky130_fd_sc_lp__dfrtp_4.v b/cells/dfrtp/sky130_fd_sc_lp__dfrtp_4.v
index 94e4376..a92b70c 100644
--- a/cells/dfrtp/sky130_fd_sc_lp__dfrtp_4.v
+++ b/cells/dfrtp/sky130_fd_sc_lp__dfrtp_4.v
@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfsbp/sky130_fd_sc_lp__dfsbp_1.v b/cells/dfsbp/sky130_fd_sc_lp__dfsbp_1.v
index bee7587..f47b54c 100644
--- a/cells/dfsbp/sky130_fd_sc_lp__dfsbp_1.v
+++ b/cells/dfsbp/sky130_fd_sc_lp__dfsbp_1.v
@@ -82,11 +82,7 @@
     Q_N  ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -94,10 +90,6 @@
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfsbp/sky130_fd_sc_lp__dfsbp_2.v b/cells/dfsbp/sky130_fd_sc_lp__dfsbp_2.v
index 2d03010..94099db 100644
--- a/cells/dfsbp/sky130_fd_sc_lp__dfsbp_2.v
+++ b/cells/dfsbp/sky130_fd_sc_lp__dfsbp_2.v
@@ -82,11 +82,7 @@
     Q_N  ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -94,10 +90,6 @@
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfsbp/sky130_fd_sc_lp__dfsbp_lp.v b/cells/dfsbp/sky130_fd_sc_lp__dfsbp_lp.v
index 34bba41..59d61d7 100644
--- a/cells/dfsbp/sky130_fd_sc_lp__dfsbp_lp.v
+++ b/cells/dfsbp/sky130_fd_sc_lp__dfsbp_lp.v
@@ -82,11 +82,7 @@
     Q_N  ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -94,10 +90,6 @@
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfstp/sky130_fd_sc_lp__dfstp_1.v b/cells/dfstp/sky130_fd_sc_lp__dfstp_1.v
index c8dba7f..cc2c34b 100644
--- a/cells/dfstp/sky130_fd_sc_lp__dfstp_1.v
+++ b/cells/dfstp/sky130_fd_sc_lp__dfstp_1.v
@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfstp/sky130_fd_sc_lp__dfstp_2.v b/cells/dfstp/sky130_fd_sc_lp__dfstp_2.v
index 4cf67b3..b392e53 100644
--- a/cells/dfstp/sky130_fd_sc_lp__dfstp_2.v
+++ b/cells/dfstp/sky130_fd_sc_lp__dfstp_2.v
@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfstp/sky130_fd_sc_lp__dfstp_4.v b/cells/dfstp/sky130_fd_sc_lp__dfstp_4.v
index 49f7da0..acb3387 100644
--- a/cells/dfstp/sky130_fd_sc_lp__dfstp_4.v
+++ b/cells/dfstp/sky130_fd_sc_lp__dfstp_4.v
@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfstp/sky130_fd_sc_lp__dfstp_lp.v b/cells/dfstp/sky130_fd_sc_lp__dfstp_lp.v
index 55cf9bd..24577a5 100644
--- a/cells/dfstp/sky130_fd_sc_lp__dfstp_lp.v
+++ b/cells/dfstp/sky130_fd_sc_lp__dfstp_lp.v
@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfxbp/sky130_fd_sc_lp__dfxbp_1.v b/cells/dfxbp/sky130_fd_sc_lp__dfxbp_1.v
index c0b8452..71b04a8 100644
--- a/cells/dfxbp/sky130_fd_sc_lp__dfxbp_1.v
+++ b/cells/dfxbp/sky130_fd_sc_lp__dfxbp_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__dfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfxbp/sky130_fd_sc_lp__dfxbp_2.v b/cells/dfxbp/sky130_fd_sc_lp__dfxbp_2.v
index 9d0f4b6..d4028b9 100644
--- a/cells/dfxbp/sky130_fd_sc_lp__dfxbp_2.v
+++ b/cells/dfxbp/sky130_fd_sc_lp__dfxbp_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__dfxbp_2 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfxbp/sky130_fd_sc_lp__dfxbp_lp.v b/cells/dfxbp/sky130_fd_sc_lp__dfxbp_lp.v
index ebd69ab..fb49365 100644
--- a/cells/dfxbp/sky130_fd_sc_lp__dfxbp_lp.v
+++ b/cells/dfxbp/sky130_fd_sc_lp__dfxbp_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__dfxbp_lp (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_1.v b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_1.v
index 2d84cd7..edc622a 100644
--- a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_1.v
+++ b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_1.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__dfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_2.v b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_2.v
index 5bf9e28..657cc3c 100644
--- a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_2.v
+++ b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__dfxtp_2 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_4.v b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_4.v
index 6de4c32..6eca179 100644
--- a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_4.v
+++ b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_4.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__dfxtp_4 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_lp.v b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_lp.v
index 92ecb84..650cb8e 100644
--- a/cells/dfxtp/sky130_fd_sc_lp__dfxtp_lp.v
+++ b/cells/dfxtp/sky130_fd_sc_lp__dfxtp_lp.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__dfxtp_lp (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/diode/sky130_fd_sc_lp__diode_0.v b/cells/diode/sky130_fd_sc_lp__diode_0.v
index 50bba30..da96509 100644
--- a/cells/diode/sky130_fd_sc_lp__diode_0.v
+++ b/cells/diode/sky130_fd_sc_lp__diode_0.v
@@ -66,18 +66,10 @@
 
 `celldefine
 module sky130_fd_sc_lp__diode_0 (
-    DIODE,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    DIODE
 );
 
     input DIODE;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/diode/sky130_fd_sc_lp__diode_1.v b/cells/diode/sky130_fd_sc_lp__diode_1.v
index c053d08..e631e60 100644
--- a/cells/diode/sky130_fd_sc_lp__diode_1.v
+++ b/cells/diode/sky130_fd_sc_lp__diode_1.v
@@ -66,18 +66,10 @@
 
 `celldefine
 module sky130_fd_sc_lp__diode_1 (
-    DIODE,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    DIODE
 );
 
     input DIODE;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_1.v b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_1.v
index 0fb5ca3..24c4c7a 100644
--- a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_1.v
+++ b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_1.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlclkp_1 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_2.v b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_2.v
index f4903d7..1cd7caa 100644
--- a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_2.v
+++ b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlclkp_2 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_4.v b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_4.v
index fbf69e8..d1c9844 100644
--- a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_4.v
+++ b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_4.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlclkp_4 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_lp.v b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_lp.v
index ba9b8cc..72f7c3d 100644
--- a/cells/dlclkp/sky130_fd_sc_lp__dlclkp_lp.v
+++ b/cells/dlclkp/sky130_fd_sc_lp__dlclkp_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlclkp_lp (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrbn/sky130_fd_sc_lp__dlrbn_1.v b/cells/dlrbn/sky130_fd_sc_lp__dlrbn_1.v
index eff9a89..4aa68fe 100644
--- a/cells/dlrbn/sky130_fd_sc_lp__dlrbn_1.v
+++ b/cells/dlrbn/sky130_fd_sc_lp__dlrbn_1.v
@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrbn/sky130_fd_sc_lp__dlrbn_2.v b/cells/dlrbn/sky130_fd_sc_lp__dlrbn_2.v
index 19ca2d2..f9242f5 100644
--- a/cells/dlrbn/sky130_fd_sc_lp__dlrbn_2.v
+++ b/cells/dlrbn/sky130_fd_sc_lp__dlrbn_2.v
@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrbn/sky130_fd_sc_lp__dlrbn_lp.v b/cells/dlrbn/sky130_fd_sc_lp__dlrbn_lp.v
index 688ee83..647a9bc 100644
--- a/cells/dlrbn/sky130_fd_sc_lp__dlrbn_lp.v
+++ b/cells/dlrbn/sky130_fd_sc_lp__dlrbn_lp.v
@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrbp/sky130_fd_sc_lp__dlrbp_1.v b/cells/dlrbp/sky130_fd_sc_lp__dlrbp_1.v
index 77c1cc6..2791690 100644
--- a/cells/dlrbp/sky130_fd_sc_lp__dlrbp_1.v
+++ b/cells/dlrbp/sky130_fd_sc_lp__dlrbp_1.v
@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrbp/sky130_fd_sc_lp__dlrbp_2.v b/cells/dlrbp/sky130_fd_sc_lp__dlrbp_2.v
index 9c432af..8faba58 100644
--- a/cells/dlrbp/sky130_fd_sc_lp__dlrbp_2.v
+++ b/cells/dlrbp/sky130_fd_sc_lp__dlrbp_2.v
@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrbp/sky130_fd_sc_lp__dlrbp_lp.v b/cells/dlrbp/sky130_fd_sc_lp__dlrbp_lp.v
index c7a5ad8..c58f7a8 100644
--- a/cells/dlrbp/sky130_fd_sc_lp__dlrbp_lp.v
+++ b/cells/dlrbp/sky130_fd_sc_lp__dlrbp_lp.v
@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_1.v b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_1.v
index 6de2c95..07a0f27 100644
--- a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_1.v
+++ b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_1.v
@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_2.v b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_2.v
index 6d2142e..813f798 100644
--- a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_2.v
+++ b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_2.v
@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_4.v b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_4.v
index 19f7070..70ba679 100644
--- a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_4.v
+++ b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_4.v
@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_lp.v b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_lp.v
index 1eb6133..2ead3c1 100644
--- a/cells/dlrtn/sky130_fd_sc_lp__dlrtn_lp.v
+++ b/cells/dlrtn/sky130_fd_sc_lp__dlrtn_lp.v
@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_1.v b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_1.v
index 0855980..c31f38b 100644
--- a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_1.v
+++ b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_1.v
@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_2.v b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_2.v
index 0d52b26..1e78835 100644
--- a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_2.v
+++ b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_2.v
@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_4.v b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_4.v
index 8c603d6..f46d456 100644
--- a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_4.v
+++ b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_4.v
@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp.v b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp.v
index 55e7533..fc67ce0 100644
--- a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp.v
+++ b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp.v
@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp2.v b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp2.v
index ba67822..ae127b4 100644
--- a/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp2.v
+++ b/cells/dlrtp/sky130_fd_sc_lp__dlrtp_lp2.v
@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxbn/sky130_fd_sc_lp__dlxbn_1.v b/cells/dlxbn/sky130_fd_sc_lp__dlxbn_1.v
index b5aadc5..304bd75 100644
--- a/cells/dlxbn/sky130_fd_sc_lp__dlxbn_1.v
+++ b/cells/dlxbn/sky130_fd_sc_lp__dlxbn_1.v
@@ -78,21 +78,13 @@
     Q     ,
     Q_N   ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     output Q_N   ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxbn/sky130_fd_sc_lp__dlxbn_2.v b/cells/dlxbn/sky130_fd_sc_lp__dlxbn_2.v
index 97e015c..4ac5f34 100644
--- a/cells/dlxbn/sky130_fd_sc_lp__dlxbn_2.v
+++ b/cells/dlxbn/sky130_fd_sc_lp__dlxbn_2.v
@@ -78,21 +78,13 @@
     Q     ,
     Q_N   ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     output Q_N   ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxbp/sky130_fd_sc_lp__dlxbp_1.v b/cells/dlxbp/sky130_fd_sc_lp__dlxbp_1.v
index bab0e4d..a92f0c5 100644
--- a/cells/dlxbp/sky130_fd_sc_lp__dlxbp_1.v
+++ b/cells/dlxbp/sky130_fd_sc_lp__dlxbp_1.v
@@ -78,21 +78,13 @@
     Q   ,
     Q_N ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     output Q_N ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp.v b/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp.v
index 9782aa5..2b9ff30 100644
--- a/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp.v
+++ b/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp.v
@@ -78,21 +78,13 @@
     Q   ,
     Q_N ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     output Q_N ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp2.v b/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp2.v
index a83b251..a6fad5d 100644
--- a/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp2.v
+++ b/cells/dlxbp/sky130_fd_sc_lp__dlxbp_lp2.v
@@ -78,21 +78,13 @@
     Q   ,
     Q_N ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     output Q_N ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxtn/sky130_fd_sc_lp__dlxtn_1.v b/cells/dlxtn/sky130_fd_sc_lp__dlxtn_1.v
index 47d558e..e6b1691 100644
--- a/cells/dlxtn/sky130_fd_sc_lp__dlxtn_1.v
+++ b/cells/dlxtn/sky130_fd_sc_lp__dlxtn_1.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlxtn_1 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxtn/sky130_fd_sc_lp__dlxtn_2.v b/cells/dlxtn/sky130_fd_sc_lp__dlxtn_2.v
index 6b9198f..0d6c6a5 100644
--- a/cells/dlxtn/sky130_fd_sc_lp__dlxtn_2.v
+++ b/cells/dlxtn/sky130_fd_sc_lp__dlxtn_2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlxtn_2 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxtn/sky130_fd_sc_lp__dlxtn_4.v b/cells/dlxtn/sky130_fd_sc_lp__dlxtn_4.v
index f7ca151..0078b4f 100644
--- a/cells/dlxtn/sky130_fd_sc_lp__dlxtn_4.v
+++ b/cells/dlxtn/sky130_fd_sc_lp__dlxtn_4.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlxtn_4 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxtp/sky130_fd_sc_lp__dlxtp_1.v b/cells/dlxtp/sky130_fd_sc_lp__dlxtp_1.v
index 6963ea7..f30036e 100644
--- a/cells/dlxtp/sky130_fd_sc_lp__dlxtp_1.v
+++ b/cells/dlxtp/sky130_fd_sc_lp__dlxtp_1.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlxtp_1 (
     Q   ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp.v b/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp.v
index 960a1c0..07399e4 100644
--- a/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp.v
+++ b/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlxtp_lp (
     Q   ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp2.v b/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp2.v
index bd6a3ea..6cf4ac8 100644
--- a/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp2.v
+++ b/cells/dlxtp/sky130_fd_sc_lp__dlxtp_lp2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__dlxtp_lp2 (
     Q   ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_1.v b/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_1.v
index abaf2de..1a493e5 100644
--- a/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_1.v
+++ b/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_1.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s15kapwr_1 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_2.v b/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_2.v
index 1c07243..1f056d7 100644
--- a/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_2.v
+++ b/cells/dlybuf4s15kapwr/sky130_fd_sc_lp__dlybuf4s15kapwr_2.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s15kapwr_2 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_1.v b/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_1.v
index bb22c4c..0bdb8fe 100644
--- a/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_1.v
+++ b/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_1.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s18kapwr_1 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_2.v b/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_2.v
index 74f4a55..faf665d 100644
--- a/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_2.v
+++ b/cells/dlybuf4s18kapwr/sky130_fd_sc_lp__dlybuf4s18kapwr_2.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s18kapwr_2 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_1.v b/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_1.v
index 271d351..a0b1ec4 100644
--- a/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_1.v
+++ b/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_1.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s25kapwr_1 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_2.v b/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_2.v
index fbadbf0..c4d5e6e 100644
--- a/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_2.v
+++ b/cells/dlybuf4s25kapwr/sky130_fd_sc_lp__dlybuf4s25kapwr_2.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s25kapwr_2 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_1.v b/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_1.v
index 5faba21..57bbf1a 100644
--- a/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_1.v
+++ b/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_1.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s50kapwr_1 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_2.v b/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_2.v
index 9f49114..f2cba4e 100644
--- a/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_2.v
+++ b/cells/dlybuf4s50kapwr/sky130_fd_sc_lp__dlybuf4s50kapwr_2.v
@@ -73,22 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlybuf4s50kapwr_2 (
-    X    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/dlygate4s15/sky130_fd_sc_lp__dlygate4s15_1.v b/cells/dlygate4s15/sky130_fd_sc_lp__dlygate4s15_1.v
index e8a9af3..b2f60ed 100644
--- a/cells/dlygate4s15/sky130_fd_sc_lp__dlygate4s15_1.v
+++ b/cells/dlygate4s15/sky130_fd_sc_lp__dlygate4s15_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlygate4s15_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlygate4s18/sky130_fd_sc_lp__dlygate4s18_1.v b/cells/dlygate4s18/sky130_fd_sc_lp__dlygate4s18_1.v
index 4df1d32..e834d5c 100644
--- a/cells/dlygate4s18/sky130_fd_sc_lp__dlygate4s18_1.v
+++ b/cells/dlygate4s18/sky130_fd_sc_lp__dlygate4s18_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlygate4s18_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlygate4s50/sky130_fd_sc_lp__dlygate4s50_1.v b/cells/dlygate4s50/sky130_fd_sc_lp__dlygate4s50_1.v
index 47eec5a..a811ab5 100644
--- a/cells/dlygate4s50/sky130_fd_sc_lp__dlygate4s50_1.v
+++ b/cells/dlygate4s50/sky130_fd_sc_lp__dlygate4s50_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlygate4s50_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlymetal6s2s/sky130_fd_sc_lp__dlymetal6s2s_1.v b/cells/dlymetal6s2s/sky130_fd_sc_lp__dlymetal6s2s_1.v
index 7f0e0e4..2055789 100644
--- a/cells/dlymetal6s2s/sky130_fd_sc_lp__dlymetal6s2s_1.v
+++ b/cells/dlymetal6s2s/sky130_fd_sc_lp__dlymetal6s2s_1.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlymetal6s2s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlymetal6s4s/sky130_fd_sc_lp__dlymetal6s4s_1.v b/cells/dlymetal6s4s/sky130_fd_sc_lp__dlymetal6s4s_1.v
index 65174ca..93ec4a3 100644
--- a/cells/dlymetal6s4s/sky130_fd_sc_lp__dlymetal6s4s_1.v
+++ b/cells/dlymetal6s4s/sky130_fd_sc_lp__dlymetal6s4s_1.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlymetal6s4s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/dlymetal6s6s/sky130_fd_sc_lp__dlymetal6s6s_1.v b/cells/dlymetal6s6s/sky130_fd_sc_lp__dlymetal6s6s_1.v
index 327f8a7..159c660 100644
--- a/cells/dlymetal6s6s/sky130_fd_sc_lp__dlymetal6s6s_1.v
+++ b/cells/dlymetal6s6s/sky130_fd_sc_lp__dlymetal6s6s_1.v
@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__dlymetal6s6s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_lp__ebufn_1.v b/cells/ebufn/sky130_fd_sc_lp__ebufn_1.v
index 7a14f1c..be95391 100644
--- a/cells/ebufn/sky130_fd_sc_lp__ebufn_1.v
+++ b/cells/ebufn/sky130_fd_sc_lp__ebufn_1.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__ebufn_1 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_lp__ebufn_2.v b/cells/ebufn/sky130_fd_sc_lp__ebufn_2.v
index 4f8cb1e..20f5f02 100644
--- a/cells/ebufn/sky130_fd_sc_lp__ebufn_2.v
+++ b/cells/ebufn/sky130_fd_sc_lp__ebufn_2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__ebufn_2 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_lp__ebufn_4.v b/cells/ebufn/sky130_fd_sc_lp__ebufn_4.v
index 1af3ff4..8e90746 100644
--- a/cells/ebufn/sky130_fd_sc_lp__ebufn_4.v
+++ b/cells/ebufn/sky130_fd_sc_lp__ebufn_4.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__ebufn_4 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_lp__ebufn_8.v b/cells/ebufn/sky130_fd_sc_lp__ebufn_8.v
index 219667d..9c0e26d 100644
--- a/cells/ebufn/sky130_fd_sc_lp__ebufn_8.v
+++ b/cells/ebufn/sky130_fd_sc_lp__ebufn_8.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__ebufn_8 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_lp__ebufn_lp.v b/cells/ebufn/sky130_fd_sc_lp__ebufn_lp.v
index d20d35c..418ffcc 100644
--- a/cells/ebufn/sky130_fd_sc_lp__ebufn_lp.v
+++ b/cells/ebufn/sky130_fd_sc_lp__ebufn_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__ebufn_lp (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_lp__ebufn_lp2.v b/cells/ebufn/sky130_fd_sc_lp__ebufn_lp2.v
index 90897d4..bf2c7dc 100644
--- a/cells/ebufn/sky130_fd_sc_lp__ebufn_lp2.v
+++ b/cells/ebufn/sky130_fd_sc_lp__ebufn_lp2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__ebufn_lp2 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/edfxbp/sky130_fd_sc_lp__edfxbp_1.v b/cells/edfxbp/sky130_fd_sc_lp__edfxbp_1.v
index 4e6d32e..7f27f09 100644
--- a/cells/edfxbp/sky130_fd_sc_lp__edfxbp_1.v
+++ b/cells/edfxbp/sky130_fd_sc_lp__edfxbp_1.v
@@ -79,26 +79,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__edfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    DE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    DE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  DE ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_lp__einvn_0.v b/cells/einvn/sky130_fd_sc_lp__einvn_0.v
index 439976b..b14b8b1 100644
--- a/cells/einvn/sky130_fd_sc_lp__einvn_0.v
+++ b/cells/einvn/sky130_fd_sc_lp__einvn_0.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__einvn_0 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_lp__einvn_1.v b/cells/einvn/sky130_fd_sc_lp__einvn_1.v
index 066bed8..8838c69 100644
--- a/cells/einvn/sky130_fd_sc_lp__einvn_1.v
+++ b/cells/einvn/sky130_fd_sc_lp__einvn_1.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__einvn_1 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_lp__einvn_2.v b/cells/einvn/sky130_fd_sc_lp__einvn_2.v
index ae62b7d..6659a5b 100644
--- a/cells/einvn/sky130_fd_sc_lp__einvn_2.v
+++ b/cells/einvn/sky130_fd_sc_lp__einvn_2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__einvn_2 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_lp__einvn_4.v b/cells/einvn/sky130_fd_sc_lp__einvn_4.v
index 598f3a6..e6b3d4c 100644
--- a/cells/einvn/sky130_fd_sc_lp__einvn_4.v
+++ b/cells/einvn/sky130_fd_sc_lp__einvn_4.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__einvn_4 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_lp__einvn_8.v b/cells/einvn/sky130_fd_sc_lp__einvn_8.v
index 5e313ac..c26a7be 100644
--- a/cells/einvn/sky130_fd_sc_lp__einvn_8.v
+++ b/cells/einvn/sky130_fd_sc_lp__einvn_8.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__einvn_8 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_lp__einvn_lp.v b/cells/einvn/sky130_fd_sc_lp__einvn_lp.v
index d1c4f68..49a64a7 100644
--- a/cells/einvn/sky130_fd_sc_lp__einvn_lp.v
+++ b/cells/einvn/sky130_fd_sc_lp__einvn_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__einvn_lp (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_lp__einvn_m.v b/cells/einvn/sky130_fd_sc_lp__einvn_m.v
index 6ea6082..6fa79a5 100644
--- a/cells/einvn/sky130_fd_sc_lp__einvn_m.v
+++ b/cells/einvn/sky130_fd_sc_lp__einvn_m.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__einvn_m (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_lp__einvp_0.v b/cells/einvp/sky130_fd_sc_lp__einvp_0.v
index 5f20f07..189c489 100644
--- a/cells/einvp/sky130_fd_sc_lp__einvp_0.v
+++ b/cells/einvp/sky130_fd_sc_lp__einvp_0.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__einvp_0 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_lp__einvp_1.v b/cells/einvp/sky130_fd_sc_lp__einvp_1.v
index 5fde30d..8fc3666 100644
--- a/cells/einvp/sky130_fd_sc_lp__einvp_1.v
+++ b/cells/einvp/sky130_fd_sc_lp__einvp_1.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__einvp_1 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_lp__einvp_2.v b/cells/einvp/sky130_fd_sc_lp__einvp_2.v
index b220f4e..0a3d6f5 100644
--- a/cells/einvp/sky130_fd_sc_lp__einvp_2.v
+++ b/cells/einvp/sky130_fd_sc_lp__einvp_2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__einvp_2 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_lp__einvp_4.v b/cells/einvp/sky130_fd_sc_lp__einvp_4.v
index 1a0d4c4..0b3de85 100644
--- a/cells/einvp/sky130_fd_sc_lp__einvp_4.v
+++ b/cells/einvp/sky130_fd_sc_lp__einvp_4.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__einvp_4 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_lp__einvp_8.v b/cells/einvp/sky130_fd_sc_lp__einvp_8.v
index 8d4c8cf..1f563b4 100644
--- a/cells/einvp/sky130_fd_sc_lp__einvp_8.v
+++ b/cells/einvp/sky130_fd_sc_lp__einvp_8.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__einvp_8 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_lp__einvp_lp.v b/cells/einvp/sky130_fd_sc_lp__einvp_lp.v
index 87ada41..831f19c 100644
--- a/cells/einvp/sky130_fd_sc_lp__einvp_lp.v
+++ b/cells/einvp/sky130_fd_sc_lp__einvp_lp.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__einvp_lp (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_lp__einvp_m.v b/cells/einvp/sky130_fd_sc_lp__einvp_m.v
index 07e7cf4..34d7d5a 100644
--- a/cells/einvp/sky130_fd_sc_lp__einvp_m.v
+++ b/cells/einvp/sky130_fd_sc_lp__einvp_m.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__einvp_m (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_lp__fa_0.v b/cells/fa/sky130_fd_sc_lp__fa_0.v
index 1942cab..c81cb4f 100644
--- a/cells/fa/sky130_fd_sc_lp__fa_0.v
+++ b/cells/fa/sky130_fd_sc_lp__fa_0.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_lp__fa_1.v b/cells/fa/sky130_fd_sc_lp__fa_1.v
index f2550da..ceae1e4 100644
--- a/cells/fa/sky130_fd_sc_lp__fa_1.v
+++ b/cells/fa/sky130_fd_sc_lp__fa_1.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_lp__fa_2.v b/cells/fa/sky130_fd_sc_lp__fa_2.v
index 772fa13..c7d50ed 100644
--- a/cells/fa/sky130_fd_sc_lp__fa_2.v
+++ b/cells/fa/sky130_fd_sc_lp__fa_2.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_lp__fa_4.v b/cells/fa/sky130_fd_sc_lp__fa_4.v
index 8c7ecdf..02309f0 100644
--- a/cells/fa/sky130_fd_sc_lp__fa_4.v
+++ b/cells/fa/sky130_fd_sc_lp__fa_4.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_lp__fa_lp.v b/cells/fa/sky130_fd_sc_lp__fa_lp.v
index 5eb3b5f..03769b9 100644
--- a/cells/fa/sky130_fd_sc_lp__fa_lp.v
+++ b/cells/fa/sky130_fd_sc_lp__fa_lp.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_lp__fa_m.v b/cells/fa/sky130_fd_sc_lp__fa_m.v
index 1752004..2117f1b 100644
--- a/cells/fa/sky130_fd_sc_lp__fa_m.v
+++ b/cells/fa/sky130_fd_sc_lp__fa_m.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fah/sky130_fd_sc_lp__fah_1.v b/cells/fah/sky130_fd_sc_lp__fah_1.v
index 0313488..b5ea323 100644
--- a/cells/fah/sky130_fd_sc_lp__fah_1.v
+++ b/cells/fah/sky130_fd_sc_lp__fah_1.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CI  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CI
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CI  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fahcin/sky130_fd_sc_lp__fahcin_1.v b/cells/fahcin/sky130_fd_sc_lp__fahcin_1.v
index 0e7156a..37cc55e 100644
--- a/cells/fahcin/sky130_fd_sc_lp__fahcin_1.v
+++ b/cells/fahcin/sky130_fd_sc_lp__fahcin_1.v
@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fahcon/sky130_fd_sc_lp__fahcon_1.v b/cells/fahcon/sky130_fd_sc_lp__fahcon_1.v
index 7465413..8b97ff4 100644
--- a/cells/fahcon/sky130_fd_sc_lp__fahcon_1.v
+++ b/cells/fahcon/sky130_fd_sc_lp__fahcon_1.v
@@ -82,11 +82,7 @@
     SUM   ,
     A     ,
     B     ,
-    CI    ,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    CI
 );
 
     output COUT_N;
@@ -94,10 +90,6 @@
     input  A     ;
     input  B     ;
     input  CI    ;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/fill/sky130_fd_sc_lp__fill_1.v b/cells/fill/sky130_fd_sc_lp__fill_1.v
index 7d13da8..346cc8b 100644
--- a/cells/fill/sky130_fd_sc_lp__fill_1.v
+++ b/cells/fill/sky130_fd_sc_lp__fill_1.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__fill_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__fill_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/fill/sky130_fd_sc_lp__fill_2.v b/cells/fill/sky130_fd_sc_lp__fill_2.v
index 9739394..b4fc8b0 100644
--- a/cells/fill/sky130_fd_sc_lp__fill_2.v
+++ b/cells/fill/sky130_fd_sc_lp__fill_2.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__fill_2 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__fill_2 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/fill/sky130_fd_sc_lp__fill_4.v b/cells/fill/sky130_fd_sc_lp__fill_4.v
index e79a846..f25e646 100644
--- a/cells/fill/sky130_fd_sc_lp__fill_4.v
+++ b/cells/fill/sky130_fd_sc_lp__fill_4.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__fill_4 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__fill_4 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/fill/sky130_fd_sc_lp__fill_8.v b/cells/fill/sky130_fd_sc_lp__fill_8.v
index 3843a86..ea71780 100644
--- a/cells/fill/sky130_fd_sc_lp__fill_8.v
+++ b/cells/fill/sky130_fd_sc_lp__fill_8.v
@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_lp__fill_8 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_lp__fill_8 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;
diff --git a/cells/ha/sky130_fd_sc_lp__ha_0.v b/cells/ha/sky130_fd_sc_lp__ha_0.v
index 5679e96..524330f 100644
--- a/cells/ha/sky130_fd_sc_lp__ha_0.v
+++ b/cells/ha/sky130_fd_sc_lp__ha_0.v
@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ha/sky130_fd_sc_lp__ha_1.v b/cells/ha/sky130_fd_sc_lp__ha_1.v
index 45dc924..2725769 100644
--- a/cells/ha/sky130_fd_sc_lp__ha_1.v
+++ b/cells/ha/sky130_fd_sc_lp__ha_1.v
@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ha/sky130_fd_sc_lp__ha_2.v b/cells/ha/sky130_fd_sc_lp__ha_2.v
index 8908b09..72d044f 100644
--- a/cells/ha/sky130_fd_sc_lp__ha_2.v
+++ b/cells/ha/sky130_fd_sc_lp__ha_2.v
@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ha/sky130_fd_sc_lp__ha_4.v b/cells/ha/sky130_fd_sc_lp__ha_4.v
index c0df051..d1bcbd7 100644
--- a/cells/ha/sky130_fd_sc_lp__ha_4.v
+++ b/cells/ha/sky130_fd_sc_lp__ha_4.v
@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ha/sky130_fd_sc_lp__ha_lp.v b/cells/ha/sky130_fd_sc_lp__ha_lp.v
index a1267d2..f4ffd1e 100644
--- a/cells/ha/sky130_fd_sc_lp__ha_lp.v
+++ b/cells/ha/sky130_fd_sc_lp__ha_lp.v
@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/ha/sky130_fd_sc_lp__ha_m.v b/cells/ha/sky130_fd_sc_lp__ha_m.v
index 0d6baa3..0c9bb3e 100644
--- a/cells/ha/sky130_fd_sc_lp__ha_m.v
+++ b/cells/ha/sky130_fd_sc_lp__ha_m.v
@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inputiso0n/sky130_fd_sc_lp__inputiso0n_lp.v b/cells/inputiso0n/sky130_fd_sc_lp__inputiso0n_lp.v
index 0e5921e..4f19e98 100644
--- a/cells/inputiso0n/sky130_fd_sc_lp__inputiso0n_lp.v
+++ b/cells/inputiso0n/sky130_fd_sc_lp__inputiso0n_lp.v
@@ -76,20 +76,12 @@
 module sky130_fd_sc_lp__inputiso0n_lp (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inputiso0p/sky130_fd_sc_lp__inputiso0p_lp.v b/cells/inputiso0p/sky130_fd_sc_lp__inputiso0p_lp.v
index e2e8710..4e81fa0 100644
--- a/cells/inputiso0p/sky130_fd_sc_lp__inputiso0p_lp.v
+++ b/cells/inputiso0p/sky130_fd_sc_lp__inputiso0p_lp.v
@@ -76,20 +76,12 @@
 module sky130_fd_sc_lp__inputiso0p_lp (
     X    ,
     A    ,
-    SLEEP,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inputiso1n/sky130_fd_sc_lp__inputiso1n_lp.v b/cells/inputiso1n/sky130_fd_sc_lp__inputiso1n_lp.v
index c7bd80e..024705d 100644
--- a/cells/inputiso1n/sky130_fd_sc_lp__inputiso1n_lp.v
+++ b/cells/inputiso1n/sky130_fd_sc_lp__inputiso1n_lp.v
@@ -76,20 +76,12 @@
 module sky130_fd_sc_lp__inputiso1n_lp (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inputiso1p/sky130_fd_sc_lp__inputiso1p_lp.v b/cells/inputiso1p/sky130_fd_sc_lp__inputiso1p_lp.v
index 0a06bc4..2a6fea6 100644
--- a/cells/inputiso1p/sky130_fd_sc_lp__inputiso1p_lp.v
+++ b/cells/inputiso1p/sky130_fd_sc_lp__inputiso1p_lp.v
@@ -76,20 +76,12 @@
 module sky130_fd_sc_lp__inputiso1p_lp (
     X    ,
     A    ,
-    SLEEP,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inputisolatch/sky130_fd_sc_lp__inputisolatch_lp.v b/cells/inputisolatch/sky130_fd_sc_lp__inputisolatch_lp.v
index 3f8cc67..a8e026a 100644
--- a/cells/inputisolatch/sky130_fd_sc_lp__inputisolatch_lp.v
+++ b/cells/inputisolatch/sky130_fd_sc_lp__inputisolatch_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__inputisolatch_lp (
     Q      ,
     D      ,
-    SLEEP_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output Q      ;
     input  D      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_0.v b/cells/inv/sky130_fd_sc_lp__inv_0.v
index 4175f94..f1666ca 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_0.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_0 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_1.v b/cells/inv/sky130_fd_sc_lp__inv_1.v
index dc62059..93fd62c 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_1.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_16.v b/cells/inv/sky130_fd_sc_lp__inv_16.v
index e59e721..33ee6fb 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_16.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_16.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_2.v b/cells/inv/sky130_fd_sc_lp__inv_2.v
index 6b90c01..2c9bb9a 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_2.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_4.v b/cells/inv/sky130_fd_sc_lp__inv_4.v
index f5c904c..268f620 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_4.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_8.v b/cells/inv/sky130_fd_sc_lp__inv_8.v
index 48c7b29..d880074 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_8.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_lp.v b/cells/inv/sky130_fd_sc_lp__inv_lp.v
index c23c99e..d9cd342 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_lp.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_lp.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_lp (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_lp__inv_m.v b/cells/inv/sky130_fd_sc_lp__inv_m.v
index 2c7a636..aed91a8 100644
--- a/cells/inv/sky130_fd_sc_lp__inv_m.v
+++ b/cells/inv/sky130_fd_sc_lp__inv_m.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__inv_m (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_1.v b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_1.v
index 4c7b18a..2e960ec 100644
--- a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_1.v
+++ b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_1.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invkapwr_1 (
-    Y    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_2.v b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_2.v
index 8d45d76..0688bb1 100644
--- a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_2.v
+++ b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_2.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invkapwr_2 (
-    Y    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_4.v b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_4.v
index 9a5e954..9559c7c 100644
--- a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_4.v
+++ b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_4.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invkapwr_4 (
-    Y    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_8.v b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_8.v
index 5f55d62..ee75426 100644
--- a/cells/invkapwr/sky130_fd_sc_lp__invkapwr_8.v
+++ b/cells/invkapwr/sky130_fd_sc_lp__invkapwr_8.v
@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invkapwr_8 (
-    Y    ,
-    A    ,
-    VPWR ,
-    VGND ,
-    KAPWR,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  KAPWR;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/invlp/sky130_fd_sc_lp__invlp_0.v b/cells/invlp/sky130_fd_sc_lp__invlp_0.v
index 726a1ae..89d4eac 100644
--- a/cells/invlp/sky130_fd_sc_lp__invlp_0.v
+++ b/cells/invlp/sky130_fd_sc_lp__invlp_0.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invlp_0 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/invlp/sky130_fd_sc_lp__invlp_1.v b/cells/invlp/sky130_fd_sc_lp__invlp_1.v
index f0cfeda..3b7d7dd 100644
--- a/cells/invlp/sky130_fd_sc_lp__invlp_1.v
+++ b/cells/invlp/sky130_fd_sc_lp__invlp_1.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invlp_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/invlp/sky130_fd_sc_lp__invlp_2.v b/cells/invlp/sky130_fd_sc_lp__invlp_2.v
index fd47ca2..3a1cafa 100644
--- a/cells/invlp/sky130_fd_sc_lp__invlp_2.v
+++ b/cells/invlp/sky130_fd_sc_lp__invlp_2.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invlp_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/invlp/sky130_fd_sc_lp__invlp_4.v b/cells/invlp/sky130_fd_sc_lp__invlp_4.v
index 6bd238d..a2beb71 100644
--- a/cells/invlp/sky130_fd_sc_lp__invlp_4.v
+++ b/cells/invlp/sky130_fd_sc_lp__invlp_4.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invlp_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/invlp/sky130_fd_sc_lp__invlp_8.v b/cells/invlp/sky130_fd_sc_lp__invlp_8.v
index 06c133d..f72aa53 100644
--- a/cells/invlp/sky130_fd_sc_lp__invlp_8.v
+++ b/cells/invlp/sky130_fd_sc_lp__invlp_8.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invlp_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/invlp/sky130_fd_sc_lp__invlp_m.v b/cells/invlp/sky130_fd_sc_lp__invlp_m.v
index 2d53913..13660b9 100644
--- a/cells/invlp/sky130_fd_sc_lp__invlp_m.v
+++ b/cells/invlp/sky130_fd_sc_lp__invlp_m.v
@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__invlp_m (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/iso0n/sky130_fd_sc_lp__iso0n_lp.v b/cells/iso0n/sky130_fd_sc_lp__iso0n_lp.v
index 72405df..5c729dd 100644
--- a/cells/iso0n/sky130_fd_sc_lp__iso0n_lp.v
+++ b/cells/iso0n/sky130_fd_sc_lp__iso0n_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso0n_lp (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    KAGND  ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  KAGND  ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/iso0n/sky130_fd_sc_lp__iso0n_lp2.v b/cells/iso0n/sky130_fd_sc_lp__iso0n_lp2.v
index d01c5b5..0bec289 100644
--- a/cells/iso0n/sky130_fd_sc_lp__iso0n_lp2.v
+++ b/cells/iso0n/sky130_fd_sc_lp__iso0n_lp2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso0n_lp2 (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    KAGND  ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  KAGND  ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/iso0p/sky130_fd_sc_lp__iso0p_lp.v b/cells/iso0p/sky130_fd_sc_lp__iso0p_lp.v
index 516e375..f97f662 100644
--- a/cells/iso0p/sky130_fd_sc_lp__iso0p_lp.v
+++ b/cells/iso0p/sky130_fd_sc_lp__iso0p_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso0p_lp (
     X    ,
     A    ,
-    SLEEP,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  KAPWR;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 KAPWR;
diff --git a/cells/iso0p/sky130_fd_sc_lp__iso0p_lp2.v b/cells/iso0p/sky130_fd_sc_lp__iso0p_lp2.v
index bd53250..68f4621 100644
--- a/cells/iso0p/sky130_fd_sc_lp__iso0p_lp2.v
+++ b/cells/iso0p/sky130_fd_sc_lp__iso0p_lp2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso0p_lp2 (
     X    ,
     A    ,
-    SLEEP,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  KAPWR;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 KAPWR;
diff --git a/cells/iso1n/sky130_fd_sc_lp__iso1n_lp.v b/cells/iso1n/sky130_fd_sc_lp__iso1n_lp.v
index ed9be67..28e7ed1 100644
--- a/cells/iso1n/sky130_fd_sc_lp__iso1n_lp.v
+++ b/cells/iso1n/sky130_fd_sc_lp__iso1n_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso1n_lp (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    KAGND  ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  KAGND  ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/iso1n/sky130_fd_sc_lp__iso1n_lp2.v b/cells/iso1n/sky130_fd_sc_lp__iso1n_lp2.v
index fc83605..34e2455 100644
--- a/cells/iso1n/sky130_fd_sc_lp__iso1n_lp2.v
+++ b/cells/iso1n/sky130_fd_sc_lp__iso1n_lp2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso1n_lp2 (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    KAGND  ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  KAGND  ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR ;
diff --git a/cells/iso1p/sky130_fd_sc_lp__iso1p_lp.v b/cells/iso1p/sky130_fd_sc_lp__iso1p_lp.v
index 56430cf..c89507c 100644
--- a/cells/iso1p/sky130_fd_sc_lp__iso1p_lp.v
+++ b/cells/iso1p/sky130_fd_sc_lp__iso1p_lp.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso1p_lp (
     X    ,
     A    ,
-    SLEEP,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  KAPWR;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 KAPWR;
diff --git a/cells/iso1p/sky130_fd_sc_lp__iso1p_lp2.v b/cells/iso1p/sky130_fd_sc_lp__iso1p_lp2.v
index 3e171c2..f8eb7d2 100644
--- a/cells/iso1p/sky130_fd_sc_lp__iso1p_lp2.v
+++ b/cells/iso1p/sky130_fd_sc_lp__iso1p_lp2.v
@@ -74,20 +74,12 @@
 module sky130_fd_sc_lp__iso1p_lp2 (
     X    ,
     A    ,
-    SLEEP,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  KAPWR;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 KAPWR;
diff --git a/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_1.v b/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_1.v
index 14d3265..72eddf6 100644
--- a/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_1.v
+++ b/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_1.v
@@ -76,20 +76,12 @@
 module sky130_fd_sc_lp__isobufsrc_1 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_2.v b/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_2.v
index 241f457..6336d21 100644
--- a/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_2.v
+++ b/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_2.v
@@ -76,20 +76,12 @@
 module sky130_fd_sc_lp__isobufsrc_2 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_4.v b/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_4.v
index 5a68336..373ab94 100644
--- a/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_4.v
+++ b/cells/isobufsrc/sky130_fd_sc_lp__isobufsrc_4.v
@@ -76,20 +76,12 @@
 module sky130_fd_sc_lp__isobufsrc_4 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/isolatch/sky130_fd_sc_lp__isolatch_lp.v b/cells/isolatch/sky130_fd_sc_lp__isolatch_lp.v
index 76ea68b..479ce12 100644
--- a/cells/isolatch/sky130_fd_sc_lp__isolatch_lp.v
+++ b/cells/isolatch/sky130_fd_sc_lp__isolatch_lp.v
@@ -77,22 +77,12 @@
 module sky130_fd_sc_lp__isolatch_lp (
     Q      ,
     D      ,
-    SLEEP_B,
-    KAPWR  ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output Q      ;
     input  D      ;
     input  SLEEP_B;
-    input  KAPWR  ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 KAPWR;
diff --git a/cells/lsbuf/sky130_fd_sc_lp__lsbuf_lp.v b/cells/lsbuf/sky130_fd_sc_lp__lsbuf_lp.v
index b02e5fa..39e55d0 100644
--- a/cells/lsbuf/sky130_fd_sc_lp__lsbuf_lp.v
+++ b/cells/lsbuf/sky130_fd_sc_lp__lsbuf_lp.v
@@ -75,24 +75,12 @@
 
 `celldefine
 module sky130_fd_sc_lp__lsbuf_lp (
-    X      ,
-    A      ,
-    DESTPWR,
-    VPWR   ,
-    VGND   ,
-    DESTVPB,
-    VPB    ,
-    VNB
+    X,
+    A
 );
 
-    output X      ;
-    input  A      ;
-    input  DESTPWR;
-    input  VPWR   ;
-    input  VGND   ;
-    input  DESTVPB;
-    input  VPB    ;
-    input  VNB    ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 DESTPWR;
diff --git a/cells/lsbufiso0p/sky130_fd_sc_lp__lsbufiso0p_lp.v b/cells/lsbufiso0p/sky130_fd_sc_lp__lsbufiso0p_lp.v
index bd9dcda..345d578 100644
--- a/cells/lsbufiso0p/sky130_fd_sc_lp__lsbufiso0p_lp.v
+++ b/cells/lsbufiso0p/sky130_fd_sc_lp__lsbufiso0p_lp.v
@@ -78,26 +78,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__lsbufiso0p_lp (
-    X      ,
-    SLEEP  ,
-    A      ,
-    DESTPWR,
-    VPWR   ,
-    VGND   ,
-    DESTVPB,
-    VPB    ,
-    VNB
+    X    ,
+    SLEEP,
+    A
 );
 
-    output X      ;
-    input  SLEEP  ;
-    input  A      ;
-    input  DESTPWR;
-    input  VPWR   ;
-    input  VGND   ;
-    input  DESTVPB;
-    input  VPB    ;
-    input  VNB    ;
+    output X    ;
+    input  SLEEP;
+    input  A    ;
 
     // Voltage supply signals
     supply1 DESTPWR;
diff --git a/cells/lsbufiso1p/sky130_fd_sc_lp__lsbufiso1p_lp.v b/cells/lsbufiso1p/sky130_fd_sc_lp__lsbufiso1p_lp.v
index e0daffa..8ee8a6b 100644
--- a/cells/lsbufiso1p/sky130_fd_sc_lp__lsbufiso1p_lp.v
+++ b/cells/lsbufiso1p/sky130_fd_sc_lp__lsbufiso1p_lp.v
@@ -78,26 +78,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__lsbufiso1p_lp (
-    X      ,
-    A      ,
-    SLEEP  ,
-    DESTPWR,
-    VPWR   ,
-    VGND   ,
-    DESTVPB,
-    VPB    ,
-    VNB
+    X    ,
+    A    ,
+    SLEEP
 );
 
-    output X      ;
-    input  A      ;
-    input  SLEEP  ;
-    input  DESTPWR;
-    input  VPWR   ;
-    input  VGND   ;
-    input  DESTVPB;
-    input  VPB    ;
-    input  VNB    ;
+    output X    ;
+    input  A    ;
+    input  SLEEP;
 
     // Voltage supply signals
     supply1 DESTPWR;
diff --git a/cells/maj3/sky130_fd_sc_lp__maj3_0.v b/cells/maj3/sky130_fd_sc_lp__maj3_0.v
index 52aa5ca..259649c 100644
--- a/cells/maj3/sky130_fd_sc_lp__maj3_0.v
+++ b/cells/maj3/sky130_fd_sc_lp__maj3_0.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__maj3_0 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_lp__maj3_1.v b/cells/maj3/sky130_fd_sc_lp__maj3_1.v
index 3679b2e..f69f0a4 100644
--- a/cells/maj3/sky130_fd_sc_lp__maj3_1.v
+++ b/cells/maj3/sky130_fd_sc_lp__maj3_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__maj3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_lp__maj3_2.v b/cells/maj3/sky130_fd_sc_lp__maj3_2.v
index 4c4c9ec..5e2c3a9 100644
--- a/cells/maj3/sky130_fd_sc_lp__maj3_2.v
+++ b/cells/maj3/sky130_fd_sc_lp__maj3_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__maj3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_lp__maj3_4.v b/cells/maj3/sky130_fd_sc_lp__maj3_4.v
index d3e857c..a430852 100644
--- a/cells/maj3/sky130_fd_sc_lp__maj3_4.v
+++ b/cells/maj3/sky130_fd_sc_lp__maj3_4.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__maj3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_lp__maj3_lp.v b/cells/maj3/sky130_fd_sc_lp__maj3_lp.v
index f197476..baebc94 100644
--- a/cells/maj3/sky130_fd_sc_lp__maj3_lp.v
+++ b/cells/maj3/sky130_fd_sc_lp__maj3_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__maj3_lp (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_lp__maj3_m.v b/cells/maj3/sky130_fd_sc_lp__maj3_m.v
index d067d43..f3c7645 100644
--- a/cells/maj3/sky130_fd_sc_lp__maj3_m.v
+++ b/cells/maj3/sky130_fd_sc_lp__maj3_m.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__maj3_m (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_0.v b/cells/mux2/sky130_fd_sc_lp__mux2_0.v
index fa0c467..f15ff4b 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_0.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_0.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_0 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_1.v b/cells/mux2/sky130_fd_sc_lp__mux2_1.v
index fc5c709..c19d40e 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_1.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_1 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_2.v b/cells/mux2/sky130_fd_sc_lp__mux2_2.v
index 17437bb..ee2cea8 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_2.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_2 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_4.v b/cells/mux2/sky130_fd_sc_lp__mux2_4.v
index 0748ae4..0c37338 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_4.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_4.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_4 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_8.v b/cells/mux2/sky130_fd_sc_lp__mux2_8.v
index 584cd84..be42c0d 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_8.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_8.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_8 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_lp.v b/cells/mux2/sky130_fd_sc_lp__mux2_lp.v
index 2b488cc..601147c 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_lp.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_lp (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_lp2.v b/cells/mux2/sky130_fd_sc_lp__mux2_lp2.v
index 36caee3..299434c 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_lp2.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_lp2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_lp2 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_lp__mux2_m.v b/cells/mux2/sky130_fd_sc_lp__mux2_m.v
index b74fea4..06a5167 100644
--- a/cells/mux2/sky130_fd_sc_lp__mux2_m.v
+++ b/cells/mux2/sky130_fd_sc_lp__mux2_m.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2_m (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_lp__mux2i_0.v b/cells/mux2i/sky130_fd_sc_lp__mux2i_0.v
index b001fa2..8fc709b 100644
--- a/cells/mux2i/sky130_fd_sc_lp__mux2i_0.v
+++ b/cells/mux2i/sky130_fd_sc_lp__mux2i_0.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2i_0 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_lp__mux2i_1.v b/cells/mux2i/sky130_fd_sc_lp__mux2i_1.v
index 4625719..d1b8cef 100644
--- a/cells/mux2i/sky130_fd_sc_lp__mux2i_1.v
+++ b/cells/mux2i/sky130_fd_sc_lp__mux2i_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2i_1 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_lp__mux2i_2.v b/cells/mux2i/sky130_fd_sc_lp__mux2i_2.v
index ff8e3e5..df03b30 100644
--- a/cells/mux2i/sky130_fd_sc_lp__mux2i_2.v
+++ b/cells/mux2i/sky130_fd_sc_lp__mux2i_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2i_2 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_lp__mux2i_4.v b/cells/mux2i/sky130_fd_sc_lp__mux2i_4.v
index c53fdc0..2c8cee7 100644
--- a/cells/mux2i/sky130_fd_sc_lp__mux2i_4.v
+++ b/cells/mux2i/sky130_fd_sc_lp__mux2i_4.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2i_4 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_lp__mux2i_lp.v b/cells/mux2i/sky130_fd_sc_lp__mux2i_lp.v
index fe6dcc5..d28a405 100644
--- a/cells/mux2i/sky130_fd_sc_lp__mux2i_lp.v
+++ b/cells/mux2i/sky130_fd_sc_lp__mux2i_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2i_lp (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_lp__mux2i_lp2.v b/cells/mux2i/sky130_fd_sc_lp__mux2i_lp2.v
index dd9043d..e12f766 100644
--- a/cells/mux2i/sky130_fd_sc_lp__mux2i_lp2.v
+++ b/cells/mux2i/sky130_fd_sc_lp__mux2i_lp2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2i_lp2 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_lp__mux2i_m.v b/cells/mux2i/sky130_fd_sc_lp__mux2i_m.v
index 2bbb931..671f066 100644
--- a/cells/mux2i/sky130_fd_sc_lp__mux2i_m.v
+++ b/cells/mux2i/sky130_fd_sc_lp__mux2i_m.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux2i_m (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_lp__mux4_0.v b/cells/mux4/sky130_fd_sc_lp__mux4_0.v
index 77eba5e..e36aa1c 100644
--- a/cells/mux4/sky130_fd_sc_lp__mux4_0.v
+++ b/cells/mux4/sky130_fd_sc_lp__mux4_0.v
@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux4_0 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_lp__mux4_1.v b/cells/mux4/sky130_fd_sc_lp__mux4_1.v
index 4da8d38..99a6f5f 100644
--- a/cells/mux4/sky130_fd_sc_lp__mux4_1.v
+++ b/cells/mux4/sky130_fd_sc_lp__mux4_1.v
@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux4_1 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_lp__mux4_2.v b/cells/mux4/sky130_fd_sc_lp__mux4_2.v
index b4eca75..cee9cf4 100644
--- a/cells/mux4/sky130_fd_sc_lp__mux4_2.v
+++ b/cells/mux4/sky130_fd_sc_lp__mux4_2.v
@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux4_2 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_lp__mux4_4.v b/cells/mux4/sky130_fd_sc_lp__mux4_4.v
index 77ccd27..ab4f030 100644
--- a/cells/mux4/sky130_fd_sc_lp__mux4_4.v
+++ b/cells/mux4/sky130_fd_sc_lp__mux4_4.v
@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux4_4 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_lp__mux4_lp.v b/cells/mux4/sky130_fd_sc_lp__mux4_lp.v
index 1abbfbc..cdb28e4 100644
--- a/cells/mux4/sky130_fd_sc_lp__mux4_lp.v
+++ b/cells/mux4/sky130_fd_sc_lp__mux4_lp.v
@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux4_lp (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_lp__mux4_m.v b/cells/mux4/sky130_fd_sc_lp__mux4_m.v
index 3c3963e..0f001df 100644
--- a/cells/mux4/sky130_fd_sc_lp__mux4_m.v
+++ b/cells/mux4/sky130_fd_sc_lp__mux4_m.v
@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_lp__mux4_m (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_0.v b/cells/nand2/sky130_fd_sc_lp__nand2_0.v
index 1d7e0eb..f6c94d6 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_0.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_0.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_0 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_1.v b/cells/nand2/sky130_fd_sc_lp__nand2_1.v
index 6d587aa..d3e65bd 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_1.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_1.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_2.v b/cells/nand2/sky130_fd_sc_lp__nand2_2.v
index 2403ae3..4c8a017 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_2.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_4.v b/cells/nand2/sky130_fd_sc_lp__nand2_4.v
index f212391..46b5e4f 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_4.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_4.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_8.v b/cells/nand2/sky130_fd_sc_lp__nand2_8.v
index ab72a35..6f91b1e 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_8.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_8.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_8 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_lp.v b/cells/nand2/sky130_fd_sc_lp__nand2_lp.v
index 2049528..3293a4b 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_lp.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_lp.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_lp (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_lp2.v b/cells/nand2/sky130_fd_sc_lp__nand2_lp2.v
index c0d621f..cad2253 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_lp2.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_lp2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_lp2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_lp__nand2_m.v b/cells/nand2/sky130_fd_sc_lp__nand2_m.v
index e4df016..d69e71d 100644
--- a/cells/nand2/sky130_fd_sc_lp__nand2_m.v
+++ b/cells/nand2/sky130_fd_sc_lp__nand2_m.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2_m (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_lp__nand2b_1.v b/cells/nand2b/sky130_fd_sc_lp__nand2b_1.v
index 6960d12..89a4ae6 100644
--- a/cells/nand2b/sky130_fd_sc_lp__nand2b_1.v
+++ b/cells/nand2b/sky130_fd_sc_lp__nand2b_1.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_lp__nand2b_2.v b/cells/nand2b/sky130_fd_sc_lp__nand2b_2.v
index 6be9aca..bfeabfb 100644
--- a/cells/nand2b/sky130_fd_sc_lp__nand2b_2.v
+++ b/cells/nand2b/sky130_fd_sc_lp__nand2b_2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_lp__nand2b_4.v b/cells/nand2b/sky130_fd_sc_lp__nand2b_4.v
index 72dba0d..4860c08 100644
--- a/cells/nand2b/sky130_fd_sc_lp__nand2b_4.v
+++ b/cells/nand2b/sky130_fd_sc_lp__nand2b_4.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_lp__nand2b_lp.v b/cells/nand2b/sky130_fd_sc_lp__nand2b_lp.v
index 8576780..8656098 100644
--- a/cells/nand2b/sky130_fd_sc_lp__nand2b_lp.v
+++ b/cells/nand2b/sky130_fd_sc_lp__nand2b_lp.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2b_lp (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_lp__nand2b_m.v b/cells/nand2b/sky130_fd_sc_lp__nand2b_m.v
index 97b5721..bb03a02 100644
--- a/cells/nand2b/sky130_fd_sc_lp__nand2b_m.v
+++ b/cells/nand2b/sky130_fd_sc_lp__nand2b_m.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand2b_m (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_lp__nand3_0.v b/cells/nand3/sky130_fd_sc_lp__nand3_0.v
index c218638..3001ec9 100644
--- a/cells/nand3/sky130_fd_sc_lp__nand3_0.v
+++ b/cells/nand3/sky130_fd_sc_lp__nand3_0.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3_0 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_lp__nand3_1.v b/cells/nand3/sky130_fd_sc_lp__nand3_1.v
index 3c5cd69..1da67aa 100644
--- a/cells/nand3/sky130_fd_sc_lp__nand3_1.v
+++ b/cells/nand3/sky130_fd_sc_lp__nand3_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_lp__nand3_2.v b/cells/nand3/sky130_fd_sc_lp__nand3_2.v
index 7637f7e..1af14df 100644
--- a/cells/nand3/sky130_fd_sc_lp__nand3_2.v
+++ b/cells/nand3/sky130_fd_sc_lp__nand3_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_lp__nand3_4.v b/cells/nand3/sky130_fd_sc_lp__nand3_4.v
index b46639d..a1eaecd 100644
--- a/cells/nand3/sky130_fd_sc_lp__nand3_4.v
+++ b/cells/nand3/sky130_fd_sc_lp__nand3_4.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_lp__nand3_lp.v b/cells/nand3/sky130_fd_sc_lp__nand3_lp.v
index d774632..ab312ee 100644
--- a/cells/nand3/sky130_fd_sc_lp__nand3_lp.v
+++ b/cells/nand3/sky130_fd_sc_lp__nand3_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3_lp (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_lp__nand3_m.v b/cells/nand3/sky130_fd_sc_lp__nand3_m.v
index 673cfdc..4985f2a 100644
--- a/cells/nand3/sky130_fd_sc_lp__nand3_m.v
+++ b/cells/nand3/sky130_fd_sc_lp__nand3_m.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3_m (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_lp__nand3b_1.v b/cells/nand3b/sky130_fd_sc_lp__nand3b_1.v
index b3d9f92..bb11bb8 100644
--- a/cells/nand3b/sky130_fd_sc_lp__nand3b_1.v
+++ b/cells/nand3b/sky130_fd_sc_lp__nand3b_1.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_lp__nand3b_2.v b/cells/nand3b/sky130_fd_sc_lp__nand3b_2.v
index 8170ec7..a0e744a 100644
--- a/cells/nand3b/sky130_fd_sc_lp__nand3b_2.v
+++ b/cells/nand3b/sky130_fd_sc_lp__nand3b_2.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_lp__nand3b_4.v b/cells/nand3b/sky130_fd_sc_lp__nand3b_4.v
index 7eee016..9d04d39 100644
--- a/cells/nand3b/sky130_fd_sc_lp__nand3b_4.v
+++ b/cells/nand3b/sky130_fd_sc_lp__nand3b_4.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_lp__nand3b_lp.v b/cells/nand3b/sky130_fd_sc_lp__nand3b_lp.v
index ef5b956..22682dc 100644
--- a/cells/nand3b/sky130_fd_sc_lp__nand3b_lp.v
+++ b/cells/nand3b/sky130_fd_sc_lp__nand3b_lp.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3b_lp (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_lp__nand3b_m.v b/cells/nand3b/sky130_fd_sc_lp__nand3b_m.v
index b441f69..fdc0cff 100644
--- a/cells/nand3b/sky130_fd_sc_lp__nand3b_m.v
+++ b/cells/nand3b/sky130_fd_sc_lp__nand3b_m.v
@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand3b_m (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_lp__nand4_0.v b/cells/nand4/sky130_fd_sc_lp__nand4_0.v
index 3de9e7c..78fa665 100644
--- a/cells/nand4/sky130_fd_sc_lp__nand4_0.v
+++ b/cells/nand4/sky130_fd_sc_lp__nand4_0.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4_0 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_lp__nand4_1.v b/cells/nand4/sky130_fd_sc_lp__nand4_1.v
index cd38c63..71ecba3 100644
--- a/cells/nand4/sky130_fd_sc_lp__nand4_1.v
+++ b/cells/nand4/sky130_fd_sc_lp__nand4_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_lp__nand4_2.v b/cells/nand4/sky130_fd_sc_lp__nand4_2.v
index cce051c..956ef3a 100644
--- a/cells/nand4/sky130_fd_sc_lp__nand4_2.v
+++ b/cells/nand4/sky130_fd_sc_lp__nand4_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_lp__nand4_4.v b/cells/nand4/sky130_fd_sc_lp__nand4_4.v
index bf13265..c6d603f 100644
--- a/cells/nand4/sky130_fd_sc_lp__nand4_4.v
+++ b/cells/nand4/sky130_fd_sc_lp__nand4_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_lp__nand4_lp.v b/cells/nand4/sky130_fd_sc_lp__nand4_lp.v
index 6ff3dcb..3f47e20 100644
--- a/cells/nand4/sky130_fd_sc_lp__nand4_lp.v
+++ b/cells/nand4/sky130_fd_sc_lp__nand4_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4_lp (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_lp__nand4_m.v b/cells/nand4/sky130_fd_sc_lp__nand4_m.v
index d193bc2..ecf2092 100644
--- a/cells/nand4/sky130_fd_sc_lp__nand4_m.v
+++ b/cells/nand4/sky130_fd_sc_lp__nand4_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4_m (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_lp__nand4b_1.v b/cells/nand4b/sky130_fd_sc_lp__nand4b_1.v
index 3b161be..5ea9c0b 100644
--- a/cells/nand4b/sky130_fd_sc_lp__nand4b_1.v
+++ b/cells/nand4b/sky130_fd_sc_lp__nand4b_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_lp__nand4b_2.v b/cells/nand4b/sky130_fd_sc_lp__nand4b_2.v
index 84f3bad..9c5a14d 100644
--- a/cells/nand4b/sky130_fd_sc_lp__nand4b_2.v
+++ b/cells/nand4b/sky130_fd_sc_lp__nand4b_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_lp__nand4b_4.v b/cells/nand4b/sky130_fd_sc_lp__nand4b_4.v
index 98dc813..6662c23 100644
--- a/cells/nand4b/sky130_fd_sc_lp__nand4b_4.v
+++ b/cells/nand4b/sky130_fd_sc_lp__nand4b_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_lp__nand4b_lp.v b/cells/nand4b/sky130_fd_sc_lp__nand4b_lp.v
index 3f02b9e..c874eae 100644
--- a/cells/nand4b/sky130_fd_sc_lp__nand4b_lp.v
+++ b/cells/nand4b/sky130_fd_sc_lp__nand4b_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4b_lp (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_lp__nand4b_m.v b/cells/nand4b/sky130_fd_sc_lp__nand4b_m.v
index 04cd2d6..2d1bf54 100644
--- a/cells/nand4b/sky130_fd_sc_lp__nand4b_m.v
+++ b/cells/nand4b/sky130_fd_sc_lp__nand4b_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4b_m (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_1.v b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_1.v
index dd72adb..1d2c309 100644
--- a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_1.v
+++ b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4bb_1 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_2.v b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_2.v
index dd64fbb..f6d0376 100644
--- a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_2.v
+++ b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4bb_2 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_4.v b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_4.v
index d7e3a7a..0dabf5e 100644
--- a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_4.v
+++ b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4bb_4 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_lp.v b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_lp.v
index 22c37f5..2f43798 100644
--- a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_lp.v
+++ b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4bb_lp (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_m.v b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_m.v
index e706bf8..e4b0f3f 100644
--- a/cells/nand4bb/sky130_fd_sc_lp__nand4bb_m.v
+++ b/cells/nand4bb/sky130_fd_sc_lp__nand4bb_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nand4bb_m (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_0.v b/cells/nor2/sky130_fd_sc_lp__nor2_0.v
index 6a045df..bc6c6a7 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_0.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_0.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_0 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_1.v b/cells/nor2/sky130_fd_sc_lp__nor2_1.v
index bdcd95a..768779f 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_1.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_1.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_2.v b/cells/nor2/sky130_fd_sc_lp__nor2_2.v
index 4981334..92ede7a 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_2.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_4.v b/cells/nor2/sky130_fd_sc_lp__nor2_4.v
index 0d228b3..298d2e9 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_4.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_4.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_8.v b/cells/nor2/sky130_fd_sc_lp__nor2_8.v
index 168dfbb..8bcddec 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_8.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_8.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_8 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_lp.v b/cells/nor2/sky130_fd_sc_lp__nor2_lp.v
index eaffb03..f2c7da9 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_lp.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_lp.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_lp (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_lp2.v b/cells/nor2/sky130_fd_sc_lp__nor2_lp2.v
index 0ddf207..d21f32c 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_lp2.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_lp2.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_lp2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_lp__nor2_m.v b/cells/nor2/sky130_fd_sc_lp__nor2_m.v
index 6aaefc8..4bf30f5 100644
--- a/cells/nor2/sky130_fd_sc_lp__nor2_m.v
+++ b/cells/nor2/sky130_fd_sc_lp__nor2_m.v
@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2_m (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_lp__nor2b_1.v b/cells/nor2b/sky130_fd_sc_lp__nor2b_1.v
index 38ba18f..d70116a 100644
--- a/cells/nor2b/sky130_fd_sc_lp__nor2b_1.v
+++ b/cells/nor2b/sky130_fd_sc_lp__nor2b_1.v
@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2b_1 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_lp__nor2b_2.v b/cells/nor2b/sky130_fd_sc_lp__nor2b_2.v
index 4a9be3c..e1dd0d2 100644
--- a/cells/nor2b/sky130_fd_sc_lp__nor2b_2.v
+++ b/cells/nor2b/sky130_fd_sc_lp__nor2b_2.v
@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2b_2 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_lp__nor2b_4.v b/cells/nor2b/sky130_fd_sc_lp__nor2b_4.v
index f61eaa5..3a73c22 100644
--- a/cells/nor2b/sky130_fd_sc_lp__nor2b_4.v
+++ b/cells/nor2b/sky130_fd_sc_lp__nor2b_4.v
@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2b_4 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_lp__nor2b_lp.v b/cells/nor2b/sky130_fd_sc_lp__nor2b_lp.v
index 4ac57fd..a1b85ea 100644
--- a/cells/nor2b/sky130_fd_sc_lp__nor2b_lp.v
+++ b/cells/nor2b/sky130_fd_sc_lp__nor2b_lp.v
@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2b_lp (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_lp__nor2b_m.v b/cells/nor2b/sky130_fd_sc_lp__nor2b_m.v
index 2d08432..66ac9c4 100644
--- a/cells/nor2b/sky130_fd_sc_lp__nor2b_m.v
+++ b/cells/nor2b/sky130_fd_sc_lp__nor2b_m.v
@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor2b_m (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_lp__nor3_0.v b/cells/nor3/sky130_fd_sc_lp__nor3_0.v
index f547d55..3332cd0 100644
--- a/cells/nor3/sky130_fd_sc_lp__nor3_0.v
+++ b/cells/nor3/sky130_fd_sc_lp__nor3_0.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3_0 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_lp__nor3_1.v b/cells/nor3/sky130_fd_sc_lp__nor3_1.v
index f16dd4e..262aac7 100644
--- a/cells/nor3/sky130_fd_sc_lp__nor3_1.v
+++ b/cells/nor3/sky130_fd_sc_lp__nor3_1.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_lp__nor3_2.v b/cells/nor3/sky130_fd_sc_lp__nor3_2.v
index 40bad36..a0b91bd 100644
--- a/cells/nor3/sky130_fd_sc_lp__nor3_2.v
+++ b/cells/nor3/sky130_fd_sc_lp__nor3_2.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_lp__nor3_4.v b/cells/nor3/sky130_fd_sc_lp__nor3_4.v
index 7e52b12..06f435d 100644
--- a/cells/nor3/sky130_fd_sc_lp__nor3_4.v
+++ b/cells/nor3/sky130_fd_sc_lp__nor3_4.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_lp__nor3_lp.v b/cells/nor3/sky130_fd_sc_lp__nor3_lp.v
index 984bcf9..352a836 100644
--- a/cells/nor3/sky130_fd_sc_lp__nor3_lp.v
+++ b/cells/nor3/sky130_fd_sc_lp__nor3_lp.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3_lp (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_lp__nor3_m.v b/cells/nor3/sky130_fd_sc_lp__nor3_m.v
index 0ee5fcc..e5f8974 100644
--- a/cells/nor3/sky130_fd_sc_lp__nor3_m.v
+++ b/cells/nor3/sky130_fd_sc_lp__nor3_m.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3_m (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_lp__nor3b_1.v b/cells/nor3b/sky130_fd_sc_lp__nor3b_1.v
index 14e9b4d..dfb9523 100644
--- a/cells/nor3b/sky130_fd_sc_lp__nor3b_1.v
+++ b/cells/nor3b/sky130_fd_sc_lp__nor3b_1.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3b_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_lp__nor3b_2.v b/cells/nor3b/sky130_fd_sc_lp__nor3b_2.v
index 0fcede7..c5094b2 100644
--- a/cells/nor3b/sky130_fd_sc_lp__nor3b_2.v
+++ b/cells/nor3b/sky130_fd_sc_lp__nor3b_2.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3b_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_lp__nor3b_4.v b/cells/nor3b/sky130_fd_sc_lp__nor3b_4.v
index 8b96f38..024b7c3 100644
--- a/cells/nor3b/sky130_fd_sc_lp__nor3b_4.v
+++ b/cells/nor3b/sky130_fd_sc_lp__nor3b_4.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3b_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_lp__nor3b_lp.v b/cells/nor3b/sky130_fd_sc_lp__nor3b_lp.v
index 7412fb3..5a20837 100644
--- a/cells/nor3b/sky130_fd_sc_lp__nor3b_lp.v
+++ b/cells/nor3b/sky130_fd_sc_lp__nor3b_lp.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3b_lp (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_lp__nor3b_m.v b/cells/nor3b/sky130_fd_sc_lp__nor3b_m.v
index 79b1ac5..bfb5fa4 100644
--- a/cells/nor3b/sky130_fd_sc_lp__nor3b_m.v
+++ b/cells/nor3b/sky130_fd_sc_lp__nor3b_m.v
@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor3b_m (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_lp__nor4_0.v b/cells/nor4/sky130_fd_sc_lp__nor4_0.v
index 94bb32f..046cb56 100644
--- a/cells/nor4/sky130_fd_sc_lp__nor4_0.v
+++ b/cells/nor4/sky130_fd_sc_lp__nor4_0.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4_0 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_lp__nor4_1.v b/cells/nor4/sky130_fd_sc_lp__nor4_1.v
index a9e43a4..72b549e 100644
--- a/cells/nor4/sky130_fd_sc_lp__nor4_1.v
+++ b/cells/nor4/sky130_fd_sc_lp__nor4_1.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_lp__nor4_2.v b/cells/nor4/sky130_fd_sc_lp__nor4_2.v
index 00cda8c..c93f7a3 100644
--- a/cells/nor4/sky130_fd_sc_lp__nor4_2.v
+++ b/cells/nor4/sky130_fd_sc_lp__nor4_2.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_lp__nor4_4.v b/cells/nor4/sky130_fd_sc_lp__nor4_4.v
index 03c5643..8de5efe 100644
--- a/cells/nor4/sky130_fd_sc_lp__nor4_4.v
+++ b/cells/nor4/sky130_fd_sc_lp__nor4_4.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_lp__nor4_lp.v b/cells/nor4/sky130_fd_sc_lp__nor4_lp.v
index d8b0d4f..c6dc255 100644
--- a/cells/nor4/sky130_fd_sc_lp__nor4_lp.v
+++ b/cells/nor4/sky130_fd_sc_lp__nor4_lp.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4_lp (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_lp__nor4_m.v b/cells/nor4/sky130_fd_sc_lp__nor4_m.v
index 5686faf..e6b7677 100644
--- a/cells/nor4/sky130_fd_sc_lp__nor4_m.v
+++ b/cells/nor4/sky130_fd_sc_lp__nor4_m.v
@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4_m (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_lp__nor4b_1.v b/cells/nor4b/sky130_fd_sc_lp__nor4b_1.v
index 4f68cd7..f953ac9 100644
--- a/cells/nor4b/sky130_fd_sc_lp__nor4b_1.v
+++ b/cells/nor4b/sky130_fd_sc_lp__nor4b_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4b_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_lp__nor4b_2.v b/cells/nor4b/sky130_fd_sc_lp__nor4b_2.v
index a450352..2ab9c61 100644
--- a/cells/nor4b/sky130_fd_sc_lp__nor4b_2.v
+++ b/cells/nor4b/sky130_fd_sc_lp__nor4b_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4b_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_lp__nor4b_4.v b/cells/nor4b/sky130_fd_sc_lp__nor4b_4.v
index 183376e..bb403d1 100644
--- a/cells/nor4b/sky130_fd_sc_lp__nor4b_4.v
+++ b/cells/nor4b/sky130_fd_sc_lp__nor4b_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4b_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_lp__nor4b_lp.v b/cells/nor4b/sky130_fd_sc_lp__nor4b_lp.v
index f92f671..6138809 100644
--- a/cells/nor4b/sky130_fd_sc_lp__nor4b_lp.v
+++ b/cells/nor4b/sky130_fd_sc_lp__nor4b_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4b_lp (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_lp__nor4b_m.v b/cells/nor4b/sky130_fd_sc_lp__nor4b_m.v
index 054f353..82fb9f6 100644
--- a/cells/nor4b/sky130_fd_sc_lp__nor4b_m.v
+++ b/cells/nor4b/sky130_fd_sc_lp__nor4b_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4b_m (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_1.v b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_1.v
index 24579a8..8cd3ceb 100644
--- a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_1.v
+++ b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_1.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4bb_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_2.v b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_2.v
index e180d15..5e36805 100644
--- a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_2.v
+++ b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_2.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4bb_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_4.v b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_4.v
index 98479e2..f0031c7 100644
--- a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_4.v
+++ b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_4.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4bb_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_lp.v b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_lp.v
index 6549e9d..fcc36bf 100644
--- a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_lp.v
+++ b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_lp.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4bb_lp (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_m.v b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_m.v
index 6ecccae..92d9561 100644
--- a/cells/nor4bb/sky130_fd_sc_lp__nor4bb_m.v
+++ b/cells/nor4bb/sky130_fd_sc_lp__nor4bb_m.v
@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_lp__nor4bb_m (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_lp__o2111a_0.v b/cells/o2111a/sky130_fd_sc_lp__o2111a_0.v
index 38bd99d..75bcb2c 100644
--- a/cells/o2111a/sky130_fd_sc_lp__o2111a_0.v
+++ b/cells/o2111a/sky130_fd_sc_lp__o2111a_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111a_0 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_lp__o2111a_1.v b/cells/o2111a/sky130_fd_sc_lp__o2111a_1.v
index cf83513..772f543 100644
--- a/cells/o2111a/sky130_fd_sc_lp__o2111a_1.v
+++ b/cells/o2111a/sky130_fd_sc_lp__o2111a_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_lp__o2111a_2.v b/cells/o2111a/sky130_fd_sc_lp__o2111a_2.v
index 61bd7e5..a786aff 100644
--- a/cells/o2111a/sky130_fd_sc_lp__o2111a_2.v
+++ b/cells/o2111a/sky130_fd_sc_lp__o2111a_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_lp__o2111a_4.v b/cells/o2111a/sky130_fd_sc_lp__o2111a_4.v
index ca48b52..1afb6e8 100644
--- a/cells/o2111a/sky130_fd_sc_lp__o2111a_4.v
+++ b/cells/o2111a/sky130_fd_sc_lp__o2111a_4.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_lp__o2111a_lp.v b/cells/o2111a/sky130_fd_sc_lp__o2111a_lp.v
index 854a921..7b12129 100644
--- a/cells/o2111a/sky130_fd_sc_lp__o2111a_lp.v
+++ b/cells/o2111a/sky130_fd_sc_lp__o2111a_lp.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111a_lp (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_lp__o2111a_m.v b/cells/o2111a/sky130_fd_sc_lp__o2111a_m.v
index 8e5b5de..8095a0b 100644
--- a/cells/o2111a/sky130_fd_sc_lp__o2111a_m.v
+++ b/cells/o2111a/sky130_fd_sc_lp__o2111a_m.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111a_m (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111ai/sky130_fd_sc_lp__o2111ai_0.v b/cells/o2111ai/sky130_fd_sc_lp__o2111ai_0.v
index b76ce2c..da3b3d3 100644
--- a/cells/o2111ai/sky130_fd_sc_lp__o2111ai_0.v
+++ b/cells/o2111ai/sky130_fd_sc_lp__o2111ai_0.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111ai_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111ai/sky130_fd_sc_lp__o2111ai_1.v b/cells/o2111ai/sky130_fd_sc_lp__o2111ai_1.v
index 27b8f5e..844133d 100644
--- a/cells/o2111ai/sky130_fd_sc_lp__o2111ai_1.v
+++ b/cells/o2111ai/sky130_fd_sc_lp__o2111ai_1.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;
diff --git a/cells/o2111ai/sky130_fd_sc_lp__o2111ai_2.v b/cells/o2111ai/sky130_fd_sc_lp__o2111ai_2.v
index 8b6ba98..95e860e 100644
--- a/cells/o2111ai/sky130_fd_sc_lp__o2111ai_2.v
+++ b/cells/o2111ai/sky130_fd_sc_lp__o2111ai_2.v
@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_lp__o2111ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input