| commit | 6dc60815830e2a6c26a4974475a782f2f94571d8 | [log] [tgz] |
|---|---|---|
| author | Tim 'mithro' Ansell <me@mith.ro> | Fri Oct 02 10:01:02 2020 -0700 |
| committer | Tim 'mithro' Ansell <tansell@google.com> | Fri Oct 02 10:01:02 2020 -0700 |
| tree | 54c27556d89619328f81c59fed7cfd057c4ed41c | |
| parent | bf24011c437604adfa80dc20182fd5e9920c3861 [diff] | |
| parent | a94c8163a66304bd2b850537739392ad27ba388b [diff] |
verilog: Fixing usage of cell reserved word. `cell` is a Verilog reserved word. Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>