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Physical Verification | |
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.. rst-class:: center | |
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**DESIGN RULE FOR 0.18UM 1.8V/5V(6V)/NON-ISOLATED | |
30V(35V) BCDlite TECHNOLOGY** | |
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**0.18UM CMOS LOGIC/ANALOG/RF TECHNOLOGY** | |
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**Topological And Reliability** | |
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**Design Rules** | |
.. toctree:: | |
:name: Physical Verification | |
design_manual/Design_Manual | |