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Physical Verification
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.. rst-class:: center

.. centered::
    **DESIGN RULE FOR 0.18UM 1.8V/5V(6V)/NON-ISOLATED
        30V(35V) BCDlite TECHNOLOGY**
.. centered::
    **0.18UM CMOS LOGIC/ANALOG/RF TECHNOLOGY**
.. centered::
    **Topological And Reliability**
.. centered::
    **Design Rules**

.. toctree::
    :name: Physical Verification

    design_manual/Design_Manual