| commit | 82c98835fa554a26f68d3a19daa82b5bc0b3b558 | [log] [tgz] |
|---|---|---|
| author | Radheshyam <sharmaradhe2022@gmail.com> | Sat Dec 31 05:43:19 2022 +0530 |
| committer | Radheshyam <sharmaradhe2022@gmail.com> | Sat Dec 31 05:43:19 2022 +0530 |
| tree | 4d5c393de4dc7ffb9e9c0f37be227800c4a34071 | |
| parent | c86660b6dc1507c08aa5f7ab3260655c767de64c [diff] | |
| parent | f1706ea267d2f80b529f6bfe2ab697c3078ce261 [diff] |
Merge branch 'mpw8' of https://github.com/komalg27/IIT_Indore_Dadda_Multiplier_mpw8 into mpw8
Dadda proposed a method of reduction which achieves the reduced two-rowed Partial products in a minimum number of reduction stages. Dadda succeeded this, by placing the [3,2] and [2,2] counters in maximum Critical path in optimal manner. For an N-bit multiplier and multiplicand, there results a N by N partial products. These partial products are arranged in the form a Matrix. Dadda reduced these Matrix height to a two-rowed matrix, through a sequence a reduction stages.