update info.yaml
diff --git a/info.yaml b/info.yaml
index 592d198..4577f2d 100644
--- a/info.yaml
+++ b/info.yaml
@@ -4,7 +4,7 @@
wokwi_id: 0 # If using wokwi, set this to your project's ID
source_files: # If using an HDL, set wokwi_id as 0 and uncomment and list your source files here
- verilog/rtl/vga_clock.v
- top_module: "thorkn_vgaclock" # put the name of your top module here, make it unique by prepending your github username
+ top_module: "thorkn_vgaclock_top" # put the name of your top module here, make it unique by prepending your github username
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
# it does and how to operate it.