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foss-eda-tools / third_party / shuttle / sky130 / mpw-008 / slot-028 / 036939b7d94da387b59387c8c98762921b5eaffb
commit036939b7d94da387b59387c8c98762921b5eaffb[log] [tgz]
authorAnmol-S314 <Anmol.Shetty@iiitb.ac.in>Sat Dec 17 12:08:29 2022 +0530
committerAnmol-S314 <Anmol.Shetty@iiitb.ac.in>Sat Dec 17 12:08:29 2022 +0530
treebd60df9a039cd17e213bc5e487848a58bb558dee
parent9802adc22dc08a125eecca055f34bc4bb84a9bf7 [diff]
final commit
22 files changed
tree: bd60df9a039cd17e213bc5e487848a58bb558dee
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. spi/
  11. verilog/
  12. .gitignore
  13. LICENSE
  14. Makefile
  15. README.md
README.md

Caravel User Project

This project simulates a synchronous FIFO where data is written in a sequential manner into a memory buffer using a clock signal, and the data is read out in the same manner as it was entered from the memory array using the same clock signal.