deleted: gds/macro_10.gds.gz
deleted: gds/macro_15.gds.gz
deleted: gds/macro_7.gds.gz
deleted: gds/macro_decap_12.gds.gz
deleted: gds/macro_decap_3.gds.gz
deleted: gds/macro_golden.gds.gz
deleted: gds/macro_nodecap.gds.gz
deleted: gds/macro_nofill.gds.gz
deleted: gds/user_proj_example.gds.gz
new file: gds/user_project_wrapper.gds
deleted: gds/user_project_wrapper.gds.gz
modified: mag/user_project_wrapper.mag
modified: maglef/user_project_wrapper.mag
modified: sdc/user_project_wrapper.sdc
modified: sdf/multicorner/max/user_project_wrapper.ff.sdf
modified: sdf/multicorner/max/user_project_wrapper.ss.sdf
modified: sdf/multicorner/max/user_project_wrapper.tt.sdf
modified: sdf/multicorner/min/user_project_wrapper.ff.sdf
modified: sdf/multicorner/min/user_project_wrapper.ss.sdf
modified: sdf/multicorner/min/user_project_wrapper.tt.sdf
modified: sdf/multicorner/nom/user_project_wrapper.ff.sdf
modified: sdf/multicorner/nom/user_project_wrapper.ss.sdf
modified: sdf/multicorner/nom/user_project_wrapper.tt.sdf
modified: sdf/user_project_wrapper.sdf
modified: signoff/user_project_wrapper/metrics.csv
modified: verilog/gl/user_project_wrapper.v
modified: verilog/rtl/user_project_wrapper.v
diff --git a/gds/macro_10.gds.gz b/gds/macro_10.gds.gz
deleted file mode 100644
index 63702e5..0000000
--- a/gds/macro_10.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/macro_15.gds.gz b/gds/macro_15.gds.gz
deleted file mode 100644
index facd899..0000000
--- a/gds/macro_15.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/macro_7.gds.gz b/gds/macro_7.gds.gz
deleted file mode 100644
index f83d68a..0000000
--- a/gds/macro_7.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/macro_decap_12.gds.gz b/gds/macro_decap_12.gds.gz
deleted file mode 100644
index aa78fc6..0000000
--- a/gds/macro_decap_12.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/macro_decap_3.gds.gz b/gds/macro_decap_3.gds.gz
deleted file mode 100644
index 9c80271..0000000
--- a/gds/macro_decap_3.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/macro_golden.gds.gz b/gds/macro_golden.gds.gz
deleted file mode 100644
index b3ef045..0000000
--- a/gds/macro_golden.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/macro_nodecap.gds.gz b/gds/macro_nodecap.gds.gz
deleted file mode 100644
index 5f47103..0000000
--- a/gds/macro_nodecap.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/macro_nofill.gds.gz b/gds/macro_nofill.gds.gz
deleted file mode 100644
index 9973329..0000000
--- a/gds/macro_nofill.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/user_proj_example.gds.gz b/gds/user_proj_example.gds.gz
deleted file mode 100644
index c14b010..0000000
--- a/gds/user_proj_example.gds.gz
+++ /dev/null
Binary files differ
diff --git a/gds/user_project_wrapper.gds b/gds/user_project_wrapper.gds
new file mode 100644
index 0000000..c0554a4
--- /dev/null
+++ b/gds/user_project_wrapper.gds
Binary files differ
diff --git a/gds/user_project_wrapper.gds.gz b/gds/user_project_wrapper.gds.gz
deleted file mode 100644
index b630057..0000000
--- a/gds/user_project_wrapper.gds.gz
+++ /dev/null
Binary files differ
diff --git a/mag/user_project_wrapper.mag b/mag/user_project_wrapper.mag
index d971501..078101c 100644
--- a/mag/user_project_wrapper.mag
+++ b/mag/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
-timestamp 1672278875
+timestamp 1672290021
<< metal1 >>
rect 348786 700612 348792 700664
rect 348844 700652 348850 700664
diff --git a/maglef/user_project_wrapper.mag b/maglef/user_project_wrapper.mag
index bcec7cd..18f7c16 100644
--- a/maglef/user_project_wrapper.mag
+++ b/maglef/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
-timestamp 1672278948
+timestamp 1672290065
<< obsli1 >>
rect 61104 82159 418880 517681
<< obsm1 >>
@@ -3750,7 +3750,7 @@
string LEFclass BLOCK
string LEFview TRUE
string GDS_END 23036000
-string GDS_FILE /opt/caravel_mpw8/openlane/user_project_wrapper/runs/22_12_28_20_48/results/signoff/user_project_wrapper.magic.gds
+string GDS_FILE /opt/caravel_mpw8/openlane/user_project_wrapper/runs/22_12_28_23_56/results/signoff/user_project_wrapper.magic.gds
string GDS_START 13739858
<< end >>
diff --git a/sdc/user_project_wrapper.sdc b/sdc/user_project_wrapper.sdc
index b09403f..dd3b022 100644
--- a/sdc/user_project_wrapper.sdc
+++ b/sdc/user_project_wrapper.sdc
@@ -1,6 +1,6 @@
###############################################################################
# Created by write_sdc
-# Thu Dec 29 01:48:53 2022
+# Thu Dec 29 04:56:12 2022
###############################################################################
current_design user_project_wrapper
###############################################################################
diff --git a/sdf/multicorner/max/user_project_wrapper.ff.sdf b/sdf/multicorner/max/user_project_wrapper.ff.sdf
index 60a6ba0..34156e0 100644
--- a/sdf/multicorner/max/user_project_wrapper.ff.sdf
+++ b/sdf/multicorner/max/user_project_wrapper.ff.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:53:59 2022")
+ (DATE "Thu Dec 29 04:59:55 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/max/user_project_wrapper.ss.sdf b/sdf/multicorner/max/user_project_wrapper.ss.sdf
index 6380495..e5339b3 100644
--- a/sdf/multicorner/max/user_project_wrapper.ss.sdf
+++ b/sdf/multicorner/max/user_project_wrapper.ss.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:53:59 2022")
+ (DATE "Thu Dec 29 04:59:55 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/max/user_project_wrapper.tt.sdf b/sdf/multicorner/max/user_project_wrapper.tt.sdf
index 2e8812a..3727678 100644
--- a/sdf/multicorner/max/user_project_wrapper.tt.sdf
+++ b/sdf/multicorner/max/user_project_wrapper.tt.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:53:59 2022")
+ (DATE "Thu Dec 29 04:59:55 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/min/user_project_wrapper.ff.sdf b/sdf/multicorner/min/user_project_wrapper.ff.sdf
index fb0d9cc..533a8c2 100644
--- a/sdf/multicorner/min/user_project_wrapper.ff.sdf
+++ b/sdf/multicorner/min/user_project_wrapper.ff.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:53:37 2022")
+ (DATE "Thu Dec 29 04:59:41 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/min/user_project_wrapper.ss.sdf b/sdf/multicorner/min/user_project_wrapper.ss.sdf
index ca1c2f0..6ad5de4 100644
--- a/sdf/multicorner/min/user_project_wrapper.ss.sdf
+++ b/sdf/multicorner/min/user_project_wrapper.ss.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:53:37 2022")
+ (DATE "Thu Dec 29 04:59:41 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/min/user_project_wrapper.tt.sdf b/sdf/multicorner/min/user_project_wrapper.tt.sdf
index 8c624c9..e0f1797 100644
--- a/sdf/multicorner/min/user_project_wrapper.tt.sdf
+++ b/sdf/multicorner/min/user_project_wrapper.tt.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:53:37 2022")
+ (DATE "Thu Dec 29 04:59:41 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/nom/user_project_wrapper.ff.sdf b/sdf/multicorner/nom/user_project_wrapper.ff.sdf
index 50810d8..2854649 100644
--- a/sdf/multicorner/nom/user_project_wrapper.ff.sdf
+++ b/sdf/multicorner/nom/user_project_wrapper.ff.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:54:15 2022")
+ (DATE "Thu Dec 29 05:00:08 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/nom/user_project_wrapper.ss.sdf b/sdf/multicorner/nom/user_project_wrapper.ss.sdf
index 115184a..f7dcc30 100644
--- a/sdf/multicorner/nom/user_project_wrapper.ss.sdf
+++ b/sdf/multicorner/nom/user_project_wrapper.ss.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:54:15 2022")
+ (DATE "Thu Dec 29 05:00:08 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/nom/user_project_wrapper.tt.sdf b/sdf/multicorner/nom/user_project_wrapper.tt.sdf
index b4e6e6f..f1c5bf5 100644
--- a/sdf/multicorner/nom/user_project_wrapper.tt.sdf
+++ b/sdf/multicorner/nom/user_project_wrapper.tt.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:54:15 2022")
+ (DATE "Thu Dec 29 05:00:08 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/user_project_wrapper.sdf b/sdf/user_project_wrapper.sdf
index 05408cd..b6bc02e 100644
--- a/sdf/user_project_wrapper.sdf
+++ b/sdf/user_project_wrapper.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Thu Dec 29 01:54:26 2022")
+ (DATE "Thu Dec 29 05:00:15 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/signoff/user_project_wrapper/metrics.csv b/signoff/user_project_wrapper/metrics.csv
index 9f33fb1..4ab2cf6 100644
--- a/signoff/user_project_wrapper/metrics.csv
+++ b/signoff/user_project_wrapper/metrics.csv
@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
-/opt/caravel_mpw8/openlane/user_project_wrapper,user_project_wrapper,22_12_28_20_48,flow completed,0h13m37s0ms,0h4m37s0ms,-2.0,-1,-1,-1,886.83,8,0,0,0,0,0,0,0,-1,0,-1,-1,4353365,23705,0.0,-1,-1,0.0,0.0,0.0,-1,-1,0.0,0.0,-1,0.0,6.52,14.42,4.59,11.23,-1,29,957,29,957,0,0,0,8,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,10173980.1536,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10,AREA 0,10,50,1,180,180,0.55,0.3,sky130_fd_sc_hd,0
+/opt/caravel_mpw8/openlane/user_project_wrapper,user_project_wrapper,22_12_28_23_56,flow completed,0h9m34s0ms,0h3m23s0ms,-2.0,-1,-1,-1,873.77,8,0,0,0,0,0,0,0,-1,0,-1,-1,4353365,23705,0.0,-1,-1,0.0,0.0,0.0,-1,-1,0.0,0.0,-1,0.0,6.52,14.42,4.59,11.23,-1,29,957,29,957,0,0,0,8,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,10173980.1536,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10,AREA 0,10,50,1,180,180,0.55,0.3,sky130_fd_sc_hd,0
diff --git a/verilog/gl/user_project_wrapper.v b/verilog/gl/user_project_wrapper.v
index d0fc3e9..1dfb355 100644
--- a/verilog/gl/user_project_wrapper.v
+++ b/verilog/gl/user_project_wrapper.v
@@ -53,7 +53,7 @@
output [31:0] wbs_dat_o;
input [3:0] wbs_sel_i;
-/*
+
macro_10 u_macro_10 (.io_active(la_data_in[3]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -660,10 +660,6 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-
-
-///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//
macro_15 u_macro_15 (.io_active(la_data_in[4]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -1270,10 +1266,6 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-
-
-////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-
macro_7 u_macro_7 (.io_active(la_data_in[2]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -1880,9 +1872,6 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-
macro_decap_12 u_macro_decap_12 (.io_active(la_data_in[6]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -2489,10 +2478,6 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-
macro_decap_3 u_macro_decap_3 (.io_active(la_data_in[5]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -3099,10 +3084,6 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-
-
-///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-*/
macro_golden u_macro_golden (.io_active(la_data_in[1]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -3709,9 +3690,6 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-
-/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-/*
macro_nodecap u_macro_nodecap (.io_active(la_data_in[7]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -4318,10 +4296,6 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-
macro_nofill u_macro_nofill (.io_active(la_data_in[8]),
.vccd1(vccd1),
.vssd1(vssd1),
@@ -4928,5 +4902,4 @@
wbs_sel_i[2],
wbs_sel_i[1],
wbs_sel_i[0]}));
-*/
endmodule
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v
index 1450111..7eff199 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_project_wrapper.v
@@ -1,69 +1,85 @@
// SPDX-FileCopyrightText: 2020 Efabless Corporation
-// //
-// // Licensed under the Apache License, Version 2.0 (the "License");
-// // you may not use this file except in compliance with the License.
-// // You may obtain a copy of the License at
-// //
-// // http://www.apache.org/licenses/LICENSE-2.0
-// //
-// // Unless required by applicable law or agreed to in writing, software
-// // distributed under the License is distributed on an "AS IS" BASIS,
-// // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// // See the License for the specific language governing permissions and
-// // limitations under the License.
-// // SPDX-License-Identifier: Apache-2.0
-
-
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
`default_nettype none
+/*
+ *-------------------------------------------------------------
+ *
+ * user_project_wrapper
+ *
+ * This wrapper enumerates all of the pins available to the
+ * user for the user project.
+ *
+ * An example user project is provided in this wrapper. The
+ * example should be removed and replaced with the actual
+ * user project.
+ *
+ * THIS FILE HAS BEEN GENERATED USING multi_tools_project CODEGEN
+ * IF YOU NEED TO MAKE EDITS TO IT, EDIT codegen/caravel_iface_header.txt
+ *
+ *-------------------------------------------------------------
+ */
-`ifndef MPRJ_IO_PADS
- `define MPRJ_IO_PADS 38
+module user_project_wrapper #(
+ parameter BITS = 32
+)(
+`ifdef USE_POWER_PINS
+ inout vdda1, // User area 1 3.3V supply
+ inout vdda2, // User area 2 3.3V supply
+ inout vssa1, // User area 1 analog ground
+ inout vssa2, // User area 2 analog ground
+ inout vccd1, // User area 1 1.8V supply
+ inout vccd2, // User area 2 1.8v supply
+ inout vssd1, // User area 1 digital ground
+ inout vssd2, // User area 2 digital ground
`endif
-module user_project_wrapper (
- `ifdef USE_POWER_PINS
- inout vdda1, // User area 1 3.3V supply
- inout vdda2, // User area 2 3.3V supply
- inout vssa1, // User area 1 analog ground
- inout vssa2, // User area 2 analog ground
- inout vccd1, // User area 1 1.8V supply
- inout vccd2, // User area 2 1.8v supply
- inout vssd1, // User area 1 digital ground
- inout vssd2, // User area 2 digital ground
- `endif
+ // Wishbone Slave ports (WB MI A)
+ input wb_clk_i,
+ input wb_rst_i,
+ input wbs_stb_i,
+ input wbs_cyc_i,
+ input wbs_we_i,
+ input [3:0] wbs_sel_i,
+ input [31:0] wbs_dat_i,
+ input [31:0] wbs_adr_i,
+ output wbs_ack_o,
+ output [31:0] wbs_dat_o,
-// Wishbone Slave ports (WB MI A)
- input wb_clk_i,
- input wb_rst_i,
- input wbs_stb_i,
- input wbs_cyc_i,
- input wbs_we_i,
- input [3:0] wbs_sel_i,
- input [31:0] wbs_dat_i,
- input [31:0] wbs_adr_i,
+ // Logic Analyzer Signals
+ input [127:0] la_data_in,
+ output [127:0] la_data_out,
+ input [127:0] la_oenb,
- output wbs_ack_o,
- output [31:0] wbs_dat_o,
+ // IOs
+ input [`MPRJ_IO_PADS-1:0] io_in,
+ output [`MPRJ_IO_PADS-1:0] io_out,
+ output [`MPRJ_IO_PADS-1:0] io_oeb,
-// Logic Analyzer Signals
- input [127:0] la_data_in,
- output [127:0] la_data_out,
- input [127:0] la_oenb,
+ // Analog (direct connection to GPIO pad---use with caution)
+ // Note that analog I/O is not available on the 7 lowest-numbered
+ // GPIO pads, and so the analog_io indexing is offset from the
+ // GPIO indexing by 7 (also upper 2 GPIOs do not have analog_io).
+ inout [`MPRJ_IO_PADS-10:0] analog_io,
-// IOs
- input [`MPRJ_IO_PADS-1:0] io_in,
- output [`MPRJ_IO_PADS-1:0] io_out,
- output [`MPRJ_IO_PADS-1:0] io_oeb,
+ // Independent clock (on independent integer divider)
+ input user_clock2,
- inout [`MPRJ_IO_PADS-10:0] analog_io,
-
-// Independent clock (on independent integer divider)
- input user_clock2,
-
-// User maskable interrupt signals
- output [2:0] user_irq
- );
+ // User maskable interrupt signals
+ output [2:0] user_irq
+);
/*--------------------------------------*/
/* User project is instantiated here */
