Initial version for mpw8 submission
32 files changed
tree: 3b7f156908a118f567f361d40c5bfbf1ff52e9f7
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. spi/
  11. verilog/
  12. .gitignore
  13. .gitmodules
  14. LICENSE
  15. Makefile
  16. README.md
README.md

Wishbone connected HyperRAM controller for Skywater 130nm

Wishbone HyperRAM controller RTL: https://github.com/embelon/wb_hyperram

PCB: https://github.com/embelon/hyperram_asic_pcb