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foss-eda-tools / third_party / shuttle / sky130 / mpw-008 / slot-020 / d79dc5b415ad859453cb54f72d28b4be2cc94735 / verilog / dv / mprj_stimulus / Makefile
  1. ab6cfe1 - minimize dv makefiles by exporting variables when running docker by kareem · 3 years, 1 month ago
  2. 96d63c5 litex integration iteration - only wb_port not working by Marwan Abbas · 3 years, 1 month ago
  3. 51a1096 initial commit to integrating litex tb with caravel_user_project mprj by Marwan Abbas · 3 years, 1 month ago
  4. 54348ea Updated the mprj_stimulus testbench so that it works with the by Tim Edwards · 3 years, 3 months ago
  5. ee54cee Update Makefile to work with efabless style by manarabdelaty · 3 years, 7 months ago
  6. f02cd32 Update Makefile PDK_PATH by manarabdelaty · 3 years, 7 months ago
  7. 340cc4a Update full chip simulation to run from root by manarabdelaty · 4 years ago
  8. 22f3cd0 Submodule caravel-lite by manarabdelaty · 4 years ago
  9. c0f458a Update DV Makefile by manarabdelaty · 4 years ago
  10. eac56e8 Rename CARAVEL_MASTER -> CARAVEL_ROOT by manarabdelaty · 4 years ago
  11. 8dbabc1 Update DV Makefiles by manarabdelaty · 4 years ago
  12. f989c64 Corrected the user_project_wrapper verilog to have the correct by Tim Edwards · 4 years ago
  13. a7929f3 Added mprj_stimulus test by manarabdelaty · 4 years ago