commit	4e613c308f23ad92ff9b79c707a18dbfa00b9014	[log] [tgz]
author	dineshannayya <dinesh.annayya@gmail.com>	Sat Dec 31 09:10:52 2022 +0530
committer	dineshannayya <dinesh.annayya@gmail.com>	Sat Dec 31 09:10:52 2022 +0530
tree	b086cbeb4f8251a46a67266d734edfa061248626
parent	ff14a076c4b0c667f104775626ae97706aca5740 [diff]

bus repeater addition

gds/user_project_wrapper.gds.gz[diff]
lef/user_project_wrapper.lef.gz[diff]
openlane/bus_rep_east/config.tcl[Added - diff]
openlane/bus_rep_east/interactive.tcl[Added - diff]
openlane/bus_rep_east/macro.cfg[Added - diff]
openlane/bus_rep_east/pdn.tcl[Added - diff]
openlane/bus_rep_east/pin_order.cfg[Added - diff]
openlane/bus_rep_north/config.tcl[Added - diff]
openlane/bus_rep_north/interactive.tcl[Added - diff]
openlane/bus_rep_north/macro.cfg[Added - diff]
openlane/bus_rep_north/pdn.tcl[Added - diff]
openlane/bus_rep_north/pin_order.cfg[Added - diff]
openlane/bus_rep_south/config.tcl[Added - diff]
openlane/bus_rep_south/interactive.tcl[Added - diff]
openlane/bus_rep_south/macro.cfg[Added - diff]
openlane/bus_rep_south/pdn.tcl[Added - diff]
openlane/bus_rep_south/pin_order.cfg[Added - diff]
openlane/bus_rep_west/config.tcl[Added - diff]
openlane/bus_rep_west/interactive.tcl[Added - diff]
openlane/bus_rep_west/macro.cfg[Added - diff]
openlane/bus_rep_west/pdn.tcl[Added - diff]
openlane/bus_rep_west/pin_order.cfg[Added - diff]
openlane/mac_wrapper/base.sdc[diff]
openlane/pinmux_top/base.sdc[diff]
openlane/pinmux_top/config.tcl[diff]
openlane/user_project_wrapper/config.tcl[diff]
openlane/user_project_wrapper/macro.cfg[diff]
openlane/user_project_wrapper/pdn_cfg.tcl[diff]
sdc/bus_rep_east.sdc[Added - diff]
sdc/bus_rep_north.sdc[Added - diff]
sdc/bus_rep_south.sdc[Added - diff]
sdc/bus_rep_west.sdc[Added - diff]
sdc/mac_wrapper.sdc[diff]
sdc/pinmux_top.sdc[diff]
sdc/user_project_wrapper.sdc[diff]
verilog/gl/user_project_wrapper.v.gz[diff]
verilog/includes/includes.rtl.caravel_user_project[diff]
verilog/rtl/bus_rep/bus_rep_east.sv[Added - diff]
verilog/rtl/bus_rep/bus_rep_north.sv[Added - diff]
verilog/rtl/bus_rep/bus_rep_south.sv[Added - diff]
verilog/rtl/bus_rep/bus_rep_west.sv[Added - diff]
verilog/rtl/bus_repeater.sv[Added - diff]
verilog/rtl/glbl/src/glbl_cfg.sv[diff]
verilog/rtl/lib/ctech_cells.sv[diff]
verilog/rtl/pinmux/src/clkgen.sv[Added - diff]
verilog/rtl/pinmux/src/pinmux.sv[diff]
verilog/rtl/pinmux/src/pinmux_top.sv[diff]
verilog/rtl/user_project_wrapper.v[diff]

48 files changed

tree: b086cbeb4f8251a46a67266d734edfa061248626

README.md

riscduino_pxt1

Riscduino Peripheral Extension Chip Set-1

Reference

turbo8051 https://opencores.org/projects/turbo8051
Julien OURY MPW Project https://github.com/JulienOury/ChristmasTreeController.git
opengfx430 https://github.com/olgirard/opengfx430
openMSP430 https://opencores.org/websvn/filedetails?repname=openmsp430&path=%2Fopenmsp430%2Ftrunk%2Fdoc%2FopenMSP430.pdf
slau049f https://www.ti.com/lit/ug/slau049f/slau049f.pdf
LT24 Card http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=68&No=892&PartNo=2#heading