| commit | e765ebf48ea44c26986d8248a6ac5af4b04a4905 | [log] [tgz] |
|---|---|---|
| author | Po-Chun Huang <hpcalex@terpmail.umd.edu> | Thu Dec 15 09:53:52 2022 -0500 |
| committer | Po-Chun Huang <hpcalex@terpmail.umd.edu> | Thu Dec 15 09:53:52 2022 -0500 |
| tree | 78cccc34ce8974e9d131ab2e38af8f3e6029f134 | |
| parent | ddfc1e16319d709e62d214143c3f423b64c1b309 [diff] |
update gds file
| :exclamation: Important Note |
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This project contains array of various sizes of 1T1R devices and a 1T1R 256x256 ReRAM module for device performance characterization, e.g. I-V, transient, R-ratio, and variations, and ReRAM simulation model verification. The goal is to design a low power ReRAM controller optimized for write/read latency, endurance, and power consumption based on the actual measurement results of sky130 ReRAM devices.
| :warning: | Use this sample project for analog user projects. |
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Refer to README for this sample project documentation.