Sign in
foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-008
/
slot-010
/
f7d1e07a636e9721b4c6c9c61c6c12d4f310a892
/
.
/
verilog
/
dv
/
scan_controller_la
tree: 09708789b87536c6e221e8c474fd7621bf95f4a4 [
path history
]
[
tgz
]
Makefile
README.md
scan_controller.c
scan_controller.hex
scan_controller_la.gtkw
scan_controller_tb.v
test_scan_controller.py
verilog/dv/scan_controller_la/README.md
logic analyser test
run
./configure.py --update-caravel --limit 20 --test
before starting test