| commit | 4e64a763abee93fc505bac3df56d0c00b9fe330d | [log] [tgz] |
|---|---|---|
| author | vijayan <85787913+vijayank88@users.noreply.github.com> | Tue Nov 29 08:55:55 2022 +0530 |
| committer | GitHub <noreply@github.com> | Tue Nov 29 08:55:55 2022 +0530 |
| tree | 0a282010ad61611ac2cb614b94436995b4de20c7 | |
| parent | 2fac8fda9fc05e3b1b4ff0a07fe1fc6dbb0f9fdc [diff] | |
| parent | c4a2ba678ac2001236cfc75c90c8893326eaf265 [diff] |
Merge pull request #2 from vijayank88/mpw7_resubmit_gc user_define update
| :exclamation: Important Note |
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The openGFX430 is a synthesizable Graphic controller written in Verilog and tailored for the openMSP430 core.
The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog. It is compatible with Texas Instruments' MSP430 microcontroller family and can execute the code generated by any MSP430 toolchain in a near cycle accurate way.
The core comes with some peripherals (16x16 Hardware Multiplier, Watchdog, GPIO, TimerA, generic templates), with a DMA interface, and most notably with a two-wire Serial Debug Interface supporting the MSPGCC GNU Debugger (GDB) for in-system software debugging.
While being fully FPGA friendly, this design is also particularly suited for ASIC implementations (typically mixed signal ICs with strong area and low-power requirements). In a nutshell, the openMSP430 brings with it:
Support following graphic modes:
