commit 7a3b43682d83e0b3ebdf2bbffd0a36958d667573
author Mehmet Burak AYKENAR <aykenar.burak@gmail.com> Fri Sep 09 23:32:09 2022 +0300
committer GitHub <noreply@github.com> Fri Sep 09 23:32:09 2022 +0300
tree af965b1b05ff23ab741ce6ddad67aa21a8a1c899
parent 928a16a18a8e39edfe1efaaacdac0b7ec8470e10

Update README.md

README.md

diff --git a/README.md b/README.md
index c55d839..e1e20f1 100644
--- a/README.md
+++ b/README.md
@@ -1,14 +1,5 @@
-# Caravel User Project
+This is a 32-bit RISCV-IMC instruction set compatible SoC design with peripherals like UART, SPI and I2C
 
-[![License](https://img.shields.io/badge/License-Apache%202.0-blue.svg)](https://opensource.org/licenses/Apache-2.0) [![UPRJ_CI](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml/badge.svg)](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml) [![Caravel Build](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml/badge.svg)](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml)
+The design is based on famous pulp team's pulpino. We (Yongatek Microelectronics from Turkiye) try to tape-out this MCU to gain experience on openlane flow with MPW7 with minor modifications from the original pulpino work
 
-| :exclamation: Important Note            |
-|-----------------------------------------|
-
-## Please fill in your project documentation in this README.md file 
-
-Refer to [README](docs/source/quickstart.rst) for a quick start of how to use caravel_user_project
-
-Refer to [README](docs/source/index.rst) for this sample project documentation. 
-
-## YONGATEK SoC MPW7 TAPEOUT
+Our main aim is to add our previous MPW submissions such as CAN, MODBUS and Ethernet to YONGA-MCU by modifying and enhancing it and tape-out in MPW8 our final MCU system