| commit | 7a3b43682d83e0b3ebdf2bbffd0a36958d667573 | [log] [tgz] |
|---|---|---|
| author | Mehmet Burak AYKENAR <aykenar.burak@gmail.com> | Fri Sep 09 23:32:09 2022 +0300 |
| committer | GitHub <noreply@github.com> | Fri Sep 09 23:32:09 2022 +0300 |
| tree | af965b1b05ff23ab741ce6ddad67aa21a8a1c899 | |
| parent | 928a16a18a8e39edfe1efaaacdac0b7ec8470e10 [diff] |
Update README.md
This is a 32-bit RISCV-IMC instruction set compatible SoC design with peripherals like UART, SPI and I2C
The design is based on famous pulp team's pulpino. We (Yongatek Microelectronics from Turkiye) try to tape-out this MCU to gain experience on openlane flow with MPW7 with minor modifications from the original pulpino work
Our main aim is to add our previous MPW submissions such as CAN, MODBUS and Ethernet to YONGA-MCU by modifying and enhancing it and tape-out in MPW8 our final MCU system