removed symbols and schematics
58 files changed
tree: f1e0e519b7d8ded883b21bf46364b41ccb11a285
  1. .github/
  2. docs/
  3. gds/
  4. mag/
  5. netgen/
  6. openlane/
  7. verilog/
  8. xschem/
  9. .gitignore
  10. LICENSE
  11. Makefile
  12. README.md
README.md

ReRAM 16x16 array characterisation, including forming, incremental set and reset, and parallel analog read for vector-matrix multiplication. All characterisation is fully digitally controlled over the logic analyser.