commit c70869bfaed92ad8ea9c1511585f48ca9fcf0ebf
author dineshannayya <dinesh.annayya@gmail.com> Tue Mar 29 18:01:55 2022 +0530
committer dineshannayya <dinesh.annayya@gmail.com> Tue Mar 29 18:01:55 2022 +0530
tree 31ce007a5453dce7dca529e5bb70e017f36c05f6
parent 91e243cbbea9ac38b8afabcc035c0ceecdf1d582

Doc update

README.md

diff --git a/README.md b/README.md
index b6d92a9..a0a7e16 100644
--- a/README.md
+++ b/README.md
@@ -612,8 +612,8 @@
     <td  align="center"> 18-June-2021  </td>
     <td  align="center"> YiFive</td>
     <td  align="center"> Single 32bit RISCV core without cache + SDRAM Controller + WB Interconnect</td>
-    <td  align="center"> <a href="https://github.com/dineshannayya/yifive">Github</td>
-    <td  align="center"> <a href="https://platform.efabless.com/projects/152">Efabless</td>
+    <td  align="center"> <a href="https://github.com/dineshannayya/yifive">Github</a></td>
+    <td  align="center"> <a href="https://platform.efabless.com/projects/152">Efabless</a></td>
   </tr>
   <tr>
     <td  align="center"> MPW-3 </td>