commit 91e243cbbea9ac38b8afabcc035c0ceecdf1d582
author dineshannayya <dinesh.annayya@gmail.com> Tue Mar 29 18:01:40 2022 +0530
committer dineshannayya <dinesh.annayya@gmail.com> Tue Mar 29 18:01:40 2022 +0530
tree f26f8ea62f71f1f182364101ece4d393c2a32d93
parent aa82449e7437f09b78f3624eebbbf8082129f5e0

Doc update

README.md

diff --git a/README.md b/README.md
index a0a7e16..b6d92a9 100644
--- a/README.md
+++ b/README.md
@@ -612,8 +612,8 @@
     <td  align="center"> 18-June-2021  </td>
     <td  align="center"> YiFive</td>
     <td  align="center"> Single 32bit RISCV core without cache + SDRAM Controller + WB Interconnect</td>
-    <td  align="center"> <a href="https://github.com/dineshannayya/yifive">Github</a></td>
-    <td  align="center"> <a href="https://platform.efabless.com/projects/152">Efabless</a></td>
+    <td  align="center"> <a href="https://github.com/dineshannayya/yifive">Github</td>
+    <td  align="center"> <a href="https://platform.efabless.com/projects/152">Efabless</td>
   </tr>
   <tr>
     <td  align="center"> MPW-3 </td>