tree: c1305d278256535961a9c31d3d90df1f4c643bc7 [path history] [tgz]
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. spi/
  11. verilog/
  12. .gitignore
  13. LICENSE
  14. Makefile
  15. README.md
README.md

Caravel User Project

License UPRJ_CI Caravel Build

:exclamation: Important Note

This project demonstrates a customized Rocket Chip SoC, generated from Chipyard. The SoC was implemented in Sky130nm using the Openlane flow.