commit	1bb08a0ab81e4cf2b100a669abd2c9b3f01d99fa	[log] [tgz]
author	Jeff DiCorpo <jeffdi@efabless.com>	Sat Dec 17 11:47:55 2022 -0800
committer	Jeff DiCorpo <jeffdi@efabless.com>	Sat Dec 17 11:47:55 2022 -0800
tree	77c5c0bca2443e7527d7a0ab73ed9acb5f8592fe
parent	2c4bc1cb5cfff26731845c85d25a87dcb40e4877 [diff]

final gds oasis

gds/user_proj_example.gds[Deleted - diff]
gds/user_proj_example.gds.gz[Added - diff]
mpw_precheck/logs/gds.info[Added - diff]
mpw_precheck/logs/git.info[Added - diff]
mpw_precheck/logs/klayout_beol_check.log[Added - diff]
mpw_precheck/logs/klayout_beol_check.total[Added - diff]
mpw_precheck/logs/klayout_feol_check.log[Added - diff]
mpw_precheck/logs/klayout_feol_check.total[Added - diff]
mpw_precheck/logs/klayout_met_min_ca_density_check.log[Added - diff]
mpw_precheck/logs/klayout_met_min_ca_density_check.total[Added - diff]
mpw_precheck/logs/klayout_offgrid_check.log[Added - diff]
mpw_precheck/logs/klayout_offgrid_check.total[Added - diff]
mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log[Added - diff]
mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total[Added - diff]
mpw_precheck/logs/klayout_zeroarea_check.log[Added - diff]
mpw_precheck/logs/klayout_zeroarea_check.total[Added - diff]
mpw_precheck/logs/magic_drc_check.log[Added - diff]
mpw_precheck/logs/magic_drc_check.total[Added - diff]
mpw_precheck/logs/pdks.info[Added - diff]
mpw_precheck/logs/precheck.log[Added - diff]
mpw_precheck/logs/spdx_compliance_report.log[Added - diff]
mpw_precheck/logs/tools.info[Added - diff]
mpw_precheck/logs/xor_check.log[Added - diff]
mpw_precheck/logs/xor_check.total[Added - diff]
mpw_precheck/outputs/reports/gpio_defines.report[Added - diff]
mpw_precheck/outputs/reports/klayout_beol_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_feol_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_offgrid_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_zeroarea_check.xml[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.drc.report[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.rdb[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.tcl[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.tr[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.xml[Added - diff]
mpw_precheck/outputs/user_project_wrapper.filtered.v[Added - diff]
mpw_precheck/outputs/user_project_wrapper.magic.drc.mag[Added - diff]
mpw_precheck/outputs/user_project_wrapper.xor.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_empty_erased.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_erased.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz[Added - diff]
signoff/.gitignore[Added - diff]
signoff/assigned_slot[Added - diff]
signoff/caravel_layout.png[Added - diff]
tapeout/logs/compose.log[Added - diff]
tapeout/logs/fill_final.log[Added - diff]
tapeout/logs/fill_initial.log[Added - diff]
tapeout/logs/fill_intermediate.log[Added - diff]
tapeout/logs/gds.info[Added - diff]
tapeout/logs/gen_gpio_defaults.log[Added - diff]
tapeout/logs/git_clone.log[Added - diff]
tapeout/logs/klayout_beol.log[Added - diff]
tapeout/logs/klayout_feol.log[Added - diff]
tapeout/logs/klayout_fom_density.log[Added - diff]
tapeout/logs/klayout_gds2oas.log[Added - diff]
tapeout/logs/klayout_met_density.log[Added - diff]
tapeout/logs/klayout_missing_cells.log[Added - diff]
tapeout/logs/klayout_zero_area.log[Added - diff]
tapeout/logs/missing_cells.info[Added - diff]
tapeout/logs/oasis.info[Added - diff]
tapeout/logs/pdks.info[Added - diff]
tapeout/logs/rram.info[Added - diff]
tapeout/logs/set_user_id.log[Added - diff]
tapeout/logs/ship_truck.log[Added - diff]
tapeout/logs/tools.info[Added - diff]
tapeout/logs/uncompress.log[Added - diff]
tapeout/outputs/gds/caravel_00071c47.gds.gz.00.split[Added - diff]
tapeout/outputs/gds/caravel_00071c47.gds.gz.01.split[Added - diff]
tapeout/outputs/gds/caravel_00071c47.gds.gz.02.split[Added - diff]
tapeout/outputs/gds/caravel_00071c47.gds.gz.03.split[Added - diff]
tapeout/outputs/gds/caravel_00071c47.gds.gz.04.split[Added - diff]
tapeout/outputs/gds/caravel_00071c47.gds.gz.05.split[Added - diff]
tapeout/outputs/gds/caravel_00071c47.gds.gz.06.split[Added - diff]
tapeout/outputs/klayout_beol_report.xml[Added - diff]
tapeout/outputs/klayout_beol_report.xml.summary[Added - diff]
tapeout/outputs/klayout_feol_report.xml[Added - diff]
tapeout/outputs/klayout_feol_report.xml.summary[Added - diff]
tapeout/outputs/klayout_fom_density_report.xml[Added - diff]
tapeout/outputs/klayout_fom_density_report.xml.summary[Added - diff]
tapeout/outputs/klayout_met_density_report.xml[Added - diff]
tapeout/outputs/klayout_met_density_report.xml.summary[Added - diff]
tapeout/outputs/mag/.magicrc[Added - diff]
tapeout/outputs/mag/caravel.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_0403.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_0801.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_1801.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_1803.mag[Added - diff]
tapeout/outputs/mag/user_id_prog_zero.mag[Added - diff]
tapeout/outputs/mag/user_id_programming.mag[Added - diff]
tapeout/outputs/mag/user_id_textblock.mag[Added - diff]
tapeout/outputs/oas/caravel_00071c47.oas[Added - diff]
tapeout/outputs/verilog/gl/caravel.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v[Added - diff]
tapeout/outputs/verilog/gl/user_id_programming.v[Added - diff]
tapeout/outputs/verilog/rtl/caravel.v[Added - diff]

99 files changed

tree: 77c5c0bca2443e7527d7a0ab73ed9acb5f8592fe

README.md

Caravel User Project

:exclamation: Important Note

This project demonstrates a customized Rocket Chip SoC, generated from Chipyard. The SoC was implemented in Sky130nm using the Openlane flow.