add 7 segment seconds
21 files changed
tree: 5ead9e2c2322b47f085d040decfc26cfb558ec36
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. spi/
  11. verilog/
  12. .gitignore
  13. configure.py
  14. integrate_new_projects.sh
  15. LICENSE
  16. lint.sh
  17. Makefile
  18. missing_power_rings.gds
  19. post_build.sh
  20. powerring.lyp
  21. project_urls.py
  22. projects.pkl
  23. README.md
  24. requirements.txt
  25. tinytapeout.png
  26. upw_post.v
  27. upw_pre.v
README.md

tinytapeout

TinyTapeout

See https://tinytapeout.com for more information on the project and how to get involved.

tiny tapeout

Instructions to build

Fetch all the projects

./configure --update-projects

Configure Caravel

./configure --update-caravel

Build the GDS

make user_project_wrapper

Dev notes

  • PDN hang issues https://github.com/The-OpenROAD-Project/OpenLane/issues/1173
  • Also discovered PDN hangs if extra lefs/defs are not deduplicated
  • with PDN set so dense, tapeout job fails with density checks
  • with unused PDN straps turned off, precheck fails
  • copied the erased version (just power rings) and deleted the first digital power rings, copy pasted that over final gds
  • precheck fails with missing power ports
  • manually added missing power ports to gl verilog of user_project_wrapper
  • precheck passes. Will try tapeout job
  • tapeout job failed with DRC, was because outer power ring was too thin. I think due to configuration rather than being cutoff for precheck
  • updated missing_power_rings with correct rings and repeated, this time tapeout passes
  • Tim suggests doing this as a module/cell to make it easier to reproduce
  • Maximo suggests editing pdn_cfg.tcl and using the -nets option with add_pdn_stripe to force only 1st voltage domain
  • This worked, see the new openlane/user_project_wrapper/pdn_cfg.tcl config