Datapoint Definitions

*NOTE: The value -1, if not meaningful, indicates that the report/log from which the information is extracted wasn't found (the stage responsible for it was skipped or failed).

Default Printed Information Variables

VariableDescription
designThe directory of the design
design_nameThe name of the top level module of the design
configThe name of the configurations file of the design
flow_statusThe status of the flow at the end of the run. Extracted from total_runtime.txt
total_runtimeThe total runtime of running the process on the design. Extracted from total_runtime.txt
routed_runtimeThe runtime of running the process up to (including) detailed routing on the design. Extracted from routed_runtime.txt
DIEAREA_mm^2The diearea in mm2 as reported from the def file.
CellPer_mm^2The number of cells in the design as reported by yosys divided by the diearea in mm2.
(Cell/mm^2)/Core_UtilThe number of cells in the design as reported by yosys divided by the diearea in mm2, all divided by the FP_CORE_UTIL configuration parameter.
OpenDP_UtilThe core utilization of the design. Extracted from openDP logs.
Peak_Memory_Usage_MBThe peak memory usage of Tritonroute during optimization iterations. Extracted from tritonRoute logs.
cell_countThe number of cells in the design. Extracted from yosys logs.
tritonRoute_ViolationsThe total number of violations from running TritonRoute. Extracted from tritonRoute logs.
Short_ViolationsThe total number of shorts violations from running TritonRoute. Extracted from tritonRoute drc.
MetSpc_violationsThe total number of MetSpc violations from running TritonRoute. Extracted from tritonRoute drc.
OffGrid_violationsThe total number of off-grid violations from running TritonRoute. Extracted from tritonRoute drc.
MinHole_violationsThe total number of MinHole violations from running TritonRoute. Extracted from tritonRoute drc.
Other_violationsThe total number of other types of violations from running TritonRoute. Extracted from tritonRoute drc.
Magic_violationsThe total number of magic drc violations in the design. Extracted from Magic drc.
antenna_violationsThe total number of antenna violations in the design. Extracted from Magic antenna check or OpenROAD ARC.
lvs_total_errorsThe total number of mismatches and differences between the final layout and the netlist of the design. Extracted from Netgen LVS report.
cvc_total_errorsThe total number of electric errors detected by CVC. Extracted from CVC report.
klayout_violationsThe total number of klayout drc violations in the design. Extracted from klayout drc report ran on the magic generated GDS-II.
wire_lengthThe total wire length in the design. Extracted from tritonRoute logs.
viasThe number of vias in the final design. Extracted from tritonRoute logs.
wnsWorst Negative Slack. Reported after Synthesis. Extracted from OpenSTA.
pl_wnsWorst Negative Slack. Reported after global placement and before optimizations using estimate parasitics. Extracted from RePlAce/OpenSTA. If the report wasn't found, the value from the previous STA report is used.
opt_wnsWorst Negative Slack. Extracted from OpenSTA. If the report wasn't found, the value from the previous STA report is used.
fastroute_tnsWorst Negative Slack. Reported after global routing using estimate parasitics. Extracted from FastRoute/OpenSTA. If the report wasn't found, the value from the previous STA report is used.
spef_wnsWorst Negative Slack. Reported after routing and spef extraction. Extracted from OpenSTA. If the report wasn't found, the value from the previous STA report is used.
tnsTotal Negative Slack. Reported after Synthesis. Extracted from OpenSTA.
pl_tnsTotal Negative Slack. Reported after global placement and before optimizations using estimate parasitics. Extracted from RePlAce/OpenSTA. If the report wasn't found, the value from the previous STA report is used.
opt_tnsTotal Negative Slack. Reported after OpenPhySyn optimizations. Extracted from OpenSTA. If the report wasn't found, the value from the previous STA report is used.
fastroute_tnsTotal Negative Slack. Reported after global routing using estimate parasitics. Extracted from FastRoute/OpenSTA. If the report wasn't found, the value from the previous STA report is used.
spef_tnsTotal Negative Slack. Reported after routing and spef extraction. Extracted from OpenSTA. If the report wasn't found, the value from the previous STA report is used.
HPWLFinal value for the half-perimeter wire length. Extracted from RePlace logs.
routing_layer1_pctThe percentage usage of routing resources on layer 1 in global routing. Extracted from fastroute log.
routing_layer2_pctThe percentage usage of routing resources on layer 2 in global routing. Extracted from fastroute log.
routing_layer3_pctThe percentage usage of routing resources on layer 3 in global routing. Extracted from fastroute log.
routing_layer4_pctThe percentage usage of routing resources on layer 4 in global routing. Extracted from fastroute log.
routing_layer5_pctThe percentage usage of routing resources on layer 5 in global routing. Extracted from fastroute log.
routing_layer6_pctThe percentage usage of routing resources on layer 6 in global routing. Extracted from fastroute log.
wires_countThe number of wires in the design. Extracted from yosys logs.
wire_bitsThe number of wire bits in the design. Extracted from yosys logs.
public_wires_countThe number of public wires in the design. Extracted from yosys logs.
public_wire_bitsThe number of public wire bits in the design. Extracted from yosys logs.
memories_countThe number of memories in the design. Extracted from yosys logs.
memory_bitsThe number of memory bits in the design. Extracted from yosys logs.
cells_pre_abcThe number of cells before ABC. Extracted from yosys logs.
ANDThe number of AND gates in the design. Extracted from yosys logs.
DFFThe number of flip flops in the design. Extracted from yosys logs.
NANDThe number of NAND gates in the design. Extracted from yosys logs.
NORThe number of NOR gates in the design. Extracted from yosys logs.
ORThe number of OR gates in the design. Extracted from yosys logs.
XORThe number of XOR gates in the design. Extracted from yosys logs.
XNORThe number of XNOR gates in the design. Extracted from yosys logs.
MUXThe number of multiplexers in the design. Extracted from yosys logs.
inputsThe number of inputs in the design. Extracted from yosys logs.
outputsThe number of outputs in the design. Extracted from yosys logs.
levelThe number of levels in the final design. Extracted from yosys logs.
EndCapsThe number of endcaps in the final design. Extracted from tapcell log.
TapCellsThe number of tapcells in the final design. Extracted from tapcell log.
DiodesThe number of diodes in the final design. Extracted from diode logs or Fastroute log based on the used diode insertion strategy.
Total_Physical_CellsThe sum of endcaps, tapcells, and diodes in the final design.
suggested_clock_frequencyThe suggested clock frequency to be used with the design. Calculated based on the value of spef_wns, and reported in MHz.
suggested_clock_periodTThe suggested clock period to be used with the design. Calculated based on the value of spef_wns, and reported in ns.

Default Printed Configuration Variables

VariableDescription
CLOCK_PERIODThe clock period for the design in ns
SYNTH_STRATEGYStrategies for abc logic synthesis and technology mapping
Possible values are "DELAY
SYNTH_MAX_FANOUTThe max load that the output ports can drive.
(Default: 5 cells)
FP_CORE_UTILThe core utilization percentage.
(Default: 50 percent)
FP_ASPECT_RATIOThe core's aspect ratio (height / width).
(Default: 1)
FP_PDN_VPITCHThe pitch of the vertical power stripes on the metal layer 4 in the power distribution network
(Default: 153.6)
FP_PDN_HPITCHThe pitch of the horizontal power stripes on the metal layer 5 in the power distribution network
(Default: 153.18)
PL_TARGET_DENSITYThe desired placement density of cells. It reflects how spread the cells would be on the core area. 1 = closely dense. 0 = widely spread
(Default: 0.55)
GLB_RT_ADJUSTMENTReduction in the routing capacity of the edges between the cells in the global routing graph. Values range from 0 to 1.
1 = most reduction, 0 = least reduction
(Default: 0.2)
STD_CELL_LIBRARYSpecifies the standard cell library used.
(Default: sky130_fd_sc_hd )
CELL_PADCell padding; increases the width of cells.
(Default: 2 microns -- 2 sites)

Optional variables

These variables are optional that can be specified in the configuration parameters file. Please refere to this file for the full list of configurations.